Patents by Inventor Nobuo Nakamura

Nobuo Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060013076
    Abstract: A magnetic optical element having a Faraday rotator and a polarizer provided integrally on the light transmitting surface of the Faraday rotator; the magnetic optical element being characterized by being constituted of i) a Faraday rotator on each side of which an anti-reflection film has been formed and ii) a polarizer comprising photonic crystals which has been formed on one anti-reflection film. Then, in this magnetic optical element, insofar as no substrate for the polarizer is present, the whole magnetic optical element integrally made up of the Faraday rotator and the photonic-crystal polarizer can be made small in thickness, and hence, when cut into small chips, the chips can not easily scatter, also having the effect of enabling production of inexpensive optical isolators.
    Type: Application
    Filed: November 11, 2003
    Publication date: January 19, 2006
    Applicant: Sumitomo Metal Mining Co., Ltd.
    Inventors: Toshiki Kishimoto, Nobuo Nakamura
  • Publication number: 20060001751
    Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell (30) includes two pixels (31) and (32). Upper and lower photoelectric converters (33) and (34), transfer transistors (35) and (36) connected to the upper and lower photoelectric converters, respectively, a reset transistor (37), and an amplifying transistor (38) form the two pixels (31) and (32). A full-face signal line 39 is connected to the respective drains of the reset transistor (37) and the amplifying transistor (38). Controlling the full-face signal line (39), along with transfer signal lines (42) and (43) and a reset signal line (41), to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.
    Type: Application
    Filed: November 19, 2003
    Publication date: January 5, 2006
    Inventors: Takashi Abe, Nobuo Nakamura, Tomoyuki Umeda, Keiji Mabuchi, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
  • Publication number: 20050231619
    Abstract: An image pickup apparatus comprising an array of unit cells, vertical signal lines, and a control circuit. The unit cells are arranged in rows and columns. Each unit cell has a light-receiving device for receiving light and generating an electric charge corresponding to the light, a charge-accumulating section for accumulating the electric charge generated by the light-receiving device, a transfer device for transferring the electric charge from the light-receiving device to the charge-accumulating section, and a charge-limiting device for limiting the electric charge accumulated in the charge-accumulating section. The vertical signal lines extend along the columns of unit cells, respectively, each for receiving a electric data item corresponding to the electric charge accumulated in the charge-accumulating section of any unit cell of the associated column.
    Type: Application
    Filed: June 17, 2005
    Publication date: October 20, 2005
    Inventors: Nobuo Nakamura, Yoriko Tanaka, Yoshitaka Egawa, Shinji Ohsawa, Tadashi Sugiki, Yukio Endo
  • Publication number: 20050224841
    Abstract: A solid-state imaging device for enlarging an operating margin of a pixel portion and achieving complete transfer of a signal charge by using a plurality of power supply voltages, wherein a plurality of power supplies having different power supply voltage values are supplied to portions of a semiconductor chip 1.
    Type: Application
    Filed: April 4, 2003
    Publication date: October 13, 2005
    Inventors: Nobuo Nakamura, Tomoyuki Umeda, Keiji Mabuchi, Hiroaki Fujita, Takashi Abe, Eiichi Funatsu, Hiroki Sato
  • Patent number: 6947087
    Abstract: A solid-state imaging device includes unit cells, arranged in a matrix of rows and columns, each having a photodiode for photoelectrically converting incident light to store signal charges, a readout transistor Td for reading out the signal charges and amplifying transistor Tb for amplifying signals readout at a detection node, a plurality of vertical shift registers for generating signal charge readout pulses ESi, DRi, ROi and a voltage switching circuit for setting a voltage VDR of the readout pulse DRi for dynamic range control lower than voltages of both a readout pulse ESi for an electronic shutter and a usual readout pulse ROi. The solid-state imaging device provides excellent images without clipping from a small signal region to large signal region.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: September 20, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshitaka Egawa, Shinji Ohsawa, Yukio Endo, Nobuo Nakamura
  • Publication number: 20050179795
    Abstract: In a MOS solid-state image pickup device including two capacitors storing electric charges of pixels in two rows for each column and two charge-voltage conversion amplifiers for outputting pixel signals corresponding to the electric charges stored in the capacitors, a switch for selectively short-circuiting input terminals of the charge-voltage conversion amplifiers and a switch for short-circuiting output terminals of the charge-voltage amplifiers are provided. In a first driving mode, the switches are not short-circuited so that analog signals are read in the form of dual-rail outputs. In a second driving mode, the switches are short-circuited so that an average of the analog signals is read.
    Type: Application
    Filed: February 8, 2005
    Publication date: August 18, 2005
    Inventors: Eiichi Funatsu, Keiji Mabuchi, Nobuo Nakamura, Takashi Abe
  • Patent number: 6930722
    Abstract: An image pickup apparatus comprising an array of unit cells, vertical signal lines, and a control circuit. The unit cells are arranged in rows and columns. Each unit cell has a light-receiving device for receiving light and generating an electric charge corresponding to the light, a charge-accumulating section for accumulating the electric charge generated by the light-receiving device, a transfer device for transferring the electric charge from the light-receiving device to the charge-accumulating section, and a charge-limiting device for limiting the electric charge accumulated in the charge-accumulating section. The vertical signal lines extend along the columns of unit cells, respectively, each for receiving a electric data item corresponding to the electric charge accumulated in the charge-accumulating section of any unit cell of the associated column.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: August 16, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Nakamura, Yoriko Tanaka, Yoshitaka Egawa, Shinji Ohsawa, Tadashi Sugiki, Yukio Endo
  • Publication number: 20050168602
    Abstract: A pre-amplifier (column region unit) of a solid-state imaging device includes a pixel-signal controller. The pixel-signal controller, for each vertical signal line, detects the level of each pixel signal independently by a pixel-signal detector on the output side of a pixel-signal amplifier, and sets a gain independently to the pixel-signal amplifier according to the level of the signal. At a subsequent stage of the solid-state imaging device, an analog-to-digital (A/D) converter and a signal extending unit are provided. The A/D converter digitizes a pixel signal, and the digitized pixel signal is corrected by a gain set to the pixel-signal amplifier with reference to a classification signal from the pixel-signal detector, so that the dynamic range of signals of one screen is extended.
    Type: Application
    Filed: November 24, 2004
    Publication date: August 4, 2005
    Inventors: Hirofumi Sumi, Nobuo Nakamura, Shoji Kawahito
  • Publication number: 20050058430
    Abstract: This invention proposes to an editing system and a control method thereof capable of significantly improving efficiency of editing work. The editing system is provided with: a server for storing and keeping the video data of edit material; a memory for storing and keeping video data read from the server, the memory having accessibility faster than the server; and an editing terminal for reading, processing, and editing required video data from the memory based on an edit list stored in a selected file, in order to create edited video based on the edit list. When opening the selected file, the editing terminal makes the server read the video data required for creating the edited video based on the edit list being stored in the file and makes the memory store and keep the video data.
    Type: Application
    Filed: July 27, 2004
    Publication date: March 17, 2005
    Inventors: Nobuo Nakamura, Fumio Shimizu, Hideaki Miyauchi, Takeshi Kawamura
  • Publication number: 20050056902
    Abstract: Forming a back-illuminated type CMOS image sensor, includes process for formation of a registration mark on the wiring side of a silicon substrate during formation of an active region or a gate electrode. A silicide film using an active region may also be used for the registration mark. Thereafter, the registration mark is read from the back side by use of red light or near infrared rays, and registration of the stepper is accomplished. It is also possible to form a registration mark in a silicon oxide film on the back side (illuminated side) in registry with the registration mark on the wiring side, and to achieve the desired registration by use of the registration mark thus formed.
    Type: Application
    Filed: September 30, 2004
    Publication date: March 17, 2005
    Inventors: Takashi Abe, Nobuo Nakamura, Keiji Mabuchi, Tomoyuki Umeda, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
  • Publication number: 20050041159
    Abstract: An editing method for producing edited images by connecting a first material image and a second material image in response to an external operation is adapted to conducting a transition effect producing process of passing from the first material image to the second material image and shifting the starting point of the transition effect producing process depending on the video format when conducting the transition effect producing process. With this arrangement, the editing method can prevent the starting point of a transition effect from being displaced when the video format is converted for the outcome of an editing operation involving a transition effect producing process.
    Type: Application
    Filed: June 9, 2004
    Publication date: February 24, 2005
    Inventors: Nobuo Nakamura, Fumio Shimizu, Toshihiro Shiraishi, Hiroshi Yamauchi
  • Publication number: 20050025454
    Abstract: This invention realizes an editing system and control method thereof capable of significantly improving working efficiency of editing work. A proxy editing terminal device creates an EDL with low-resolution video/audio data, resulting in reducing time to create the EDL. Further, the low-resolution video/audio data and high-resolution video/audio data having the same contents and different resolutions are previously stored, so that the creation of a final edit list with the high-resolution video/audio data based on the EDL can be started in a short time after the EDL is created with the low-resolution video/audio data. Thus working efficiency of the editing work can be significantly reduced with reducing time to create the EDL and the final edit list.
    Type: Application
    Filed: July 26, 2004
    Publication date: February 3, 2005
    Inventors: Nobuo Nakamura, Fumio Shimizu, Hideaki Miyauchi, Takeshi Kawamura
  • Publication number: 20050012839
    Abstract: An MOS-type solid-state imaging apparatus includes an imaging region formed by two-dimensionally arranging unit cells serving as photoelectric conversion portions on a semiconductor substrate, a plurality of vertical address lines arranged in a row direction of the imaging region to select a row of unit cells to be addressed, a plurality of vertical signal lines arranged in a column direction of the imaging region to read out signals from the unit cells in each column, a plurality of load transistors each connected to one end of each of the vertical signal lines, and a plurality of horizontal selection transistors each connected to the other end of each of the vertical signal lines.
    Type: Application
    Filed: August 12, 2004
    Publication date: January 20, 2005
    Inventors: Yoshiyuki Matsunaga, Shinji Ohsawa, Nobuo Nakamura, Hirofumi Yamashita, Hiroki Miura
  • Patent number: 6821809
    Abstract: Forming a back-illuminated type CMOS image sensor, includes process for formation of a registration mark on the wiring side of a silicon substrate during formation of an active region or a gate electrode. A silicide film using an active region may also be used for the registration mark. Thereafter, the registration mark is read from the back side by use of red light or near infrared rays, and registration of the stepper is accomplished. It is also possible to form a registration mark in a silicon oxide film on the back side (illuminated side) in registry with the registration mark on the wiring side, and to achieve the desired registration by use of the registration mark thus formed.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: November 23, 2004
    Assignee: Sony Corporation
    Inventors: Takashi Abe, Nobuo Nakamura, Keiji Mabuchi, Tomoyuki Umeda, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
  • Patent number: 6795121
    Abstract: An MOS-type solid-state imaging apparatus includes an imaging region formed by two-dimensionally arranging unit cells serving as photoelectric conversion portions on a semiconductor substrate, a plurality of vertical address lines arranged in a row direction of the imaging region to select a row of unit cells to be addressed, a plurality of vertical signal lines arranged in a column direction of the imaging region to read out signals from the unit cells in each column, a plurality of load transistors each connected to one end of each of the vertical signal lines, and a plurality of horizontal selection transistors each connected to the other end of each of the vertical signal lines.
    Type: Grant
    Filed: December 12, 2000
    Date of Patent: September 21, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Matsunaga, Shinji Ohsawa, Nobuo Nakamura, Hirofumi Yamashita, Hiroki Miura
  • Publication number: 20040108502
    Abstract: The present invention provides a solid-state image pickup apparatus which is able to easily discharge signal charges in a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise in a dark state, an image-lag and so forth even if the pixel size of the MOS solid-state image pickup apparatus is reduced, the voltage of a reading gate is lowered and the concentration in the well is raised. The solid-state image pickup apparatus according to the present invention incorporates a p-type silicon substrate having a surface on which a p+ diffusion layer for constituting a photoelectric conversion region and a drain of a reading MOS field effect transistor are formed. A signal accumulating section formed by an n-type diffusion layer is formed below the p+ diffusion layer. A gate electrode of the MOS field effect transistor is, on the surface of the substrate, formed between the p+ diffusion layer and the drain.
    Type: Application
    Filed: December 5, 2003
    Publication date: June 10, 2004
    Inventors: Nobuo Nakamura, Hisanori Ihara, Ikuko Inoue, Hidenori Shibata, Akiko Nomachi, Yoshiyuki Shioyama, Hidetoshi Nozaki, Masako Hori, Akira Makabe, Hiroshi Naruse, Hideki Inokuma, Seigo Abe, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Publication number: 20040080629
    Abstract: The invention makes it possible to perform effective A/D conversion on pixel signals read from a pixel array part, to achieve a reduction in power consumption and reductions in the size and the price of an image pickup device as well as simplification of the construction of the device, and to realize a high-quality image output. The device includes an pixel array part having a plurality of unit pixels, a CDS (correlated double sampling) circuit, and an A/D converter. A pixel signal read from a pixel array part via a signal line is subjected to CDS processing (noise elimination processing) in the CDS circuit, and then this pixel signal is inputted into the A/D converter which performs A/D conversion on the pixel signal. The A/D converter includes a &Dgr;&Sgr; modulator and a digital filter to perform highly accurate A/D conversion. The invention can also be applied to a construction in which an A/D converter is provided at the front stage of the CDS circuit.
    Type: Application
    Filed: June 2, 2003
    Publication date: April 29, 2004
    Inventors: Hiroki Sato, Keiji Mabuchi, Nobuo Nakamura, Tetsuya Iizuka
  • Publication number: 20040080637
    Abstract: An image sensor controls the gain of a pixel signal on a pixel-by-pixel basis and extends a dynamic range while maintaining a S/N ratio at a favorable level. A column unit in an image sensor is independently detects a level of each pixel signal and independently sets a gain for level of the signal. A photoelectric converting region unit has pixels arranged two-dimensionally with a vertical signal line for each pixel column to output each pixel signal. The column unit is on an output side of the vertical signal line. The column unit for each pixel column has a pixel signal level detecting circuit, a programmable gain control, a sample and hold (S/H) circuit. Gain correction is performed according to a result of a detected level of the pixel signal.
    Type: Application
    Filed: June 10, 2003
    Publication date: April 29, 2004
    Inventors: Nobuo Nakamura, Shoji Kawahito, Hiroki Sato, Mizuho Higashi
  • Publication number: 20040079505
    Abstract: A loudspeaker diaphragm manufacturing apparatus of the present invention comprises; a paper tank, a pulp dispersion reservoir tank connected to the paper tank, a stirring means provided in the paper tank, a water inlet unit connected to the paper tank, a drain unit disposed under the paper tank, and a paper mold disposed at the bottom of the paper tank or in the drain unit, wherein a sectional area of the drain unit is larger than the plane area of the paper mold. The drain unit may be further provided with a water flow control plate in a draining direction of the paper mold. According to the manufacturing apparatus and the manufacturing method of the present invention, diaphragms with very uniform internal composition and diaphragms with intentionally varied internal composition in accordance with required sound characteristics can be mass-produced with good reproducibility.
    Type: Application
    Filed: September 8, 2003
    Publication date: April 29, 2004
    Inventors: Yukinori Morohoshi, Shinya Mizone, Nobuo Nakamura, Kazuto Nakamura
  • Publication number: 20040075759
    Abstract: A solid-state image pickup device and a pixel defect testing method thereof are disclosed. A solid-state image pickup device including: a pixel unit having a plurality of unit pixels that perform photoelectric conversion; a driving circuit for driving the pixel unit to control output of a pixel output signal; an output signal processing circuit for subjecting the pixel output signal outputted from the pixel unit according to the driving of the driving circuit to predetermined signal processing, and outputting a resulting pixel output signal; a pixel defect determining circuit for capturing the pixel output signal outputted from the pixel unit according to the driving of the driving circuit, and determining a pixel defect by comparing the pixel output signal with a predetermined reference signal; and a timing generator for supplying a predetermined operating pulse to the driving circuit, the output signal processing circuit, and the pixel defect determining circuit.
    Type: Application
    Filed: June 26, 2003
    Publication date: April 22, 2004
    Inventors: Hiroki Sato, Nobuo Nakamura, Keiji Mabuchi, Takashi Abe, Tomoyuki Umeda, Hiroaki Fujita, Eiichi Funatsu