Patents by Inventor Norihiro Kobayashi

Norihiro Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240100866
    Abstract: A printing device includes a printing section and a tray support section. The printing section performs printing on a medium. The tray support section supports a tray. The tray includes a placement surface configured to support the medium. The tray support section includes a positioning section that determines a placement position of the medium with respect to the tray.
    Type: Application
    Filed: September 27, 2023
    Publication date: March 28, 2024
    Inventors: Norihiro YAMASHITA, Mafumi KOBAYASHI
  • Patent number: 10566196
    Abstract: A method for manufacturing a bonded SOI wafer, including depositing a polycrystalline silicon layer on a base wafer, forming an insulator film on a bond wafer, bonding the bond wafer and a polished surface of the silicon layer with the insulator film interposed, and thinning the bond wafer, wherein a silicon single crystal wafer having a resistivity of 100 ?·cm or more is the base wafer, the step of depositing the silicon layer includes a stage of forming an oxide film on the surface of the base wafer, and the silicon layer is deposited between 1050° C. and 1200° C. Accordingly, the method enables a polycrystalline silicon layer to be deposited while preventing the progress of single crystallization even through a heat treatment step in the SOI wafer manufacturing process or a heat treatment step in the device manufacturing process and can improve throughput in the polycrystalline silicon layer depositing step.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: February 18, 2020
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Norihiro Kobayashi, Osamu Ishikawa, Kenji Meguro, Taishi Wakabayashi, Hiroyuki Oonishi
  • Patent number: 10529615
    Abstract: A bonded SOI wafer is manufactured by bonding a bond and a base wafer, each composed of a silicon single crystal, via an insulator film, depositing a polycrystalline silicon layer on the bonding surface side of the base wafer, polishing a surface of the polycrystalline silicon layer, forming the insulator film on the bonding surface of the bond wafer, bonding the polished surface of the polycrystalline silicon layer and the bond wafer via the insulator film, and thinning the bonded bond wafer to form an SOI layer; wherein, the base wafer is a silicon single crystal wafer having a resistivity of 100 ?·cm or more, depositing the polycrystalline silicon layer further includes a stage for previously forming an oxide film on the surface of the base wafer on which the polycrystalline silicon layer is deposited, and the polycrystalline silicon layer is deposited at a temperature of 900° C. or more.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: January 7, 2020
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kenji Meguro, Taishi Wakabayashi, Norihiro Kobayashi
  • Patent number: 10490440
    Abstract: Method for manufacturing bonded SOI wafer by bonding bond wafer and base wafer each composed of silicon single crystal with insulator film being interposed therebetween, including steps of: depositing polycrystalline silicon layer on bonding surface side of base wafer; polishing surface of polycrystalline silicon layer to obtain polished surface; forming thermal oxide film on polished surface; forming insulator film on bonding surface of bond wafer; bonding step of bonding bond and base wafers by bringing insulator and oxide films into close contact with each other; and thinning bonded bond wafer to form SOI layer, wherein silicon single crystal wafer having resistivity of 100 ?·cm or more is used as base wafer, thermal oxide film formed on polished surface has thickness of 15 nm or more with RMS of 0.6 nm or less, and any heat treatment after bonding step is performed with maximum treatment temperature of 1150° C. or less.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: November 26, 2019
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Norihiro Kobayashi, Hiroji Aga
  • Patent number: 10424484
    Abstract: Method for manufacturing a bonded SOI wafer by bonding a bond wafer and base wafer, each composed of a silicon single crystal, via an insulator film, including the steps: depositing a polycrystalline silicon layer on the base wafer bonding surface side, polishing the polycrystalline silicon layer surface, forming the insulator film on the bonding surface of the bond wafer, bonding the polished surface of the base wafer polycrystalline silicon layer and bond wafer via the insulator film; thinning the bonded bond wafer to form an SOI layer; wherein, in the step of depositing the polycrystalline silicon layer, a wafer having a chemically etched surface as base wafer; chemically etched surface is subjected to primary polishing followed by depositing the polycrystalline silicon layer on surface subjected to the primary polishing, and in the step polishing the polycrystalline silicon layer surface, which is subjected to secondary polishing or secondary and finish polishing.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: September 24, 2019
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Toru Ishizuka, Norihiro Kobayashi, Masatake Nakano
  • Publication number: 20190221470
    Abstract: Method for manufacturing bonded SOI wafer by bonding bond wafer and base wafer each composed of silicon single crystal with insulator film being interposed therebetween, including steps of: depositing polycrystalline silicon layer on bonding surface side of base wafer; polishing surface of polycrystalline silicon layer to obtain polished surface; forming thermal oxide film on polished surface; forming insulator film on bonding surface of bond wafer; bonding step of bonding bond and base wafers by bringing insulator and oxide films into close contact with each other; and thinning bonded bond wafer to form SOI layer, wherein silicon single crystal wafer having resistivity of 100 ?·cm or more is used as base wafer, thermal oxide film formed on polished surface has thickness of 15 nm or more with RMS of 0.6 nm or less, and any heat treatment after bonding step is performed with maximum treatment temperature of 1150° C. or less.
    Type: Application
    Filed: April 25, 2017
    Publication date: July 18, 2019
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Norihiro KOBAYASHI, Hiroji AGA
  • Patent number: 10204824
    Abstract: A method for producing a SOI wafer that includes implanting at least one type of gas ion selected from a hydrogen ion and a rare gas ion from a surface of a bond wafer formed of a silicon single crystal to form an ion implanted layer, bonding the ion-implanted surface of the bond wafer to a surface of a base wafer formed of a silicon single crystal through a silicon oxide film formed on the base wafer surface, delaminating the bond wafer at the ion implanted layer by performing delamination heat treatment to fabricate a SOI wafer having a buried oxide film layer and a SOI layer on the base wafer, and performing flattening heat treatment on the SOI wafer in an atmosphere containing argon gas.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: February 12, 2019
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Isao Yokokawa, Hiroji Aga, Norihiro Kobayashi
  • Publication number: 20180144975
    Abstract: A method for producing a SOI wafer that includes implanting at least one type of gas ion selected from a hydrogen ion and a rare gas ion from a surface of a bond wafer formed of a silicon single crystal to form an ion implanted layer, bonding the ion-implanted surface of the bond wafer to a surface of a base wafer formed of a silicon single crystal through a silicon oxide film formed on the base wafer surface, delaminating the bond wafer at the ion implanted layer by performing delamination heat treatment to fabricate a SOI wafer having a buried oxide film layer and a SOI layer on the base wafer, and performing flattening heat treatment on the SOI wafer in an atmosphere containing argon gas.
    Type: Application
    Filed: March 8, 2016
    Publication date: May 24, 2018
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Isao YOKOKAWA, Hiroji AGA, Norihiro KOBAYASHI
  • Publication number: 20180122639
    Abstract: A method for manufacturing a bonded SOI wafer, including depositing a polycrystalline silicon layer on a base wafer, forming an insulator film on a bond wafer, bonding the bond wafer and a polished surface of the silicon layer with the insulator film interposed, and thinning the bond wafer, wherein a silicon single crystal wafer having a resistivity of 100 ?-cm or more is the base wafer, the step of depositing the silicon layer includes a stage of forming an oxide film on the surface of the base wafer, and the silicon layer is deposited between 1050° C. and 1200° C. Accordingly, the method enables a polycrystalline silicon layer to be deposited while preventing the progress of single crystallization even through a heat treatment step in the SOI wafer manufacturing process or a heat treatment step in the device manufacturing process and can improve throughput in the polycrystalline silicon layer depositing step.
    Type: Application
    Filed: March 14, 2016
    Publication date: May 3, 2018
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Norihiro KOBAYASHI, Osamu ISHIKAWA, Kenji MEGURO, Taishi WAKABAYASHI, Hiroyuki OONISHI
  • Patent number: 9859149
    Abstract: Method of producing bonded wafer including thin film on base wafer, including: implanting at least one gas ion selected from hydrogen ion and rare gas ion into bond wafer from surface of bond wafer to form layer of implanted ion; bonding surface from which ion is implanted into bond wafer and surface of base wafer directly or through insulator film; and then performing heat treatment to separate part of bond wafer along layer of implanted ion, wherein before bond wafer and base wafer are bonded, thickness of bond wafer and base wafer is measured, and combination of bond wafer and base wafer is selected such that difference in thickness between the wafers is less than 5 ?m, and selected bond and base wafers are bonded. This method can inhibit variation in thickness in marble pattern that occurs in thin film and produce bonded wafer including thin film with uniform thickness.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: January 2, 2018
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Norihiro Kobayashi, Hiroji Aga
  • Publication number: 20170345663
    Abstract: Method for manufacturing a bonded SOI wafer by bonding a bond wafer and base wafer, each composed of a silicon single crystal, via an insulator film, including the steps: depositing a polycrystalline silicon layer on the base wafer bonding surface side, polishing the polycrystalline silicon layer surface, forming the insulator film on the bonding surface of the bond wafer, bonding the polished surface of the base wafer polycrystalline silicon layer and bond wafer via the insulator film; thinning the bonded bond wafer to form an SOI layer; wherein, in the step of depositing the polycrystalline silicon layer, a wafer having a chemically etched surface as base wafer; chemically etched surface is subjected to primary polishing followed by depositing the polycrystalline silicon layer on surface subjected to the primary polishing, and in the step polishing the polycrystalline silicon layer surface, which is subjected to secondary polishing or secondary and finish polishing.
    Type: Application
    Filed: January 7, 2016
    Publication date: November 30, 2017
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Toru ISHIZUKA, Norihiro KOBAYASHI, Masatake NAKANO
  • Patent number: 9793154
    Abstract: The present invention is a method for manufacturing a bonded SOI wafer including: performing a thermal oxidation treatment including at least one of a thermal oxidation during temperature-rising and a thermal oxidation during temperature-falling with the use of a batch type heat treatment furnace, thereby forming a silicon oxide film in such a way that the oxide film buried in the delaminated bonded SOI wafer has a concentric oxide film thickness distribution, and subjecting the bonded SOI wafer after delaminating a bond wafer to a reducing heat treatment to make a film thickness range of the buried oxide film being smaller than a film thickness range before the reducing heat treatment. This provides a method for manufacturing a bonded SOI wafer which can suppress a variation of a radial distribution of a buried oxide film thickness caused by a reducing heat treatment performed after delaminating the SOI layer.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: October 17, 2017
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Hiroji Aga, Norihiro Kobayashi
  • Patent number: 9773694
    Abstract: A method for manufacturing a bonded wafer, includes: ion-implanting a gas ion such as a hydrogen ion from a surface of a bond wafer, thereby forming an ion-implanted layer; bonding the bond wafer and a base wafer; producing a bonded wafer having a thin-film on the base wafer by delaminating the bond wafer along the ion-implanted layer; and performing an RTA treatment on the bonded wafer in a hydrogen gas-containing atmosphere; wherein a protective film is formed onto the surface of the thin-film in a heat treatment furnace in the course of temperature-falling from the maximum temperature of the RTA treatment before the bonded wafer is taken out from the heat treatment furnace; and then the bonded wafer with the protective film being formed thereon is taken out from the heat treatment furnace, and is then cleaned with a cleaning liquid which can etch the protective film and the thin-film.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: September 26, 2017
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Norihiro Kobayashi, Hiroji Aga
  • Patent number: 9735045
    Abstract: The present invention provides a method of manufacturing a bonded wafer, including performing RTA under an atmosphere containing hydrogen on a bonded wafer after separating the bond wafer constituting the bonded wafer, and subsequently performing a sacrificial oxidation process to reduce the thickness of the thin film, wherein the RTA is performed under conditions of a retention start temperature of more than 1150° C. and a retention end temperature of 1150° C. or less. The invention can inhibit the BMD density from increasing and sufficiently flatten the surface of a thin film when the thin film of the bonded wafer is flattened and thinned by the combination of the RTA and sacrificial oxidation processes.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: August 15, 2017
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Toru Ishizuka, Norihiro Kobayashi
  • Publication number: 20170220275
    Abstract: An administrator executes provisioning of a volume that satisfies a reliability requirement without being aware of storage configuration. A third processing module is configured to acquire a provisioning request that includes a reliability requirement for reliability of a storage service provided from a first processing module to a second processing module, and a volume requirement for a primary volume provided to the second processing module by the storage service, determine, on the basis of the volume requirement and storage information, volume configuration information showing the configuration of the primary volume being provisioned from a logical storage area, and determine, on the basis of the volume configuration information, the reliability requirements, and the storage information, replication configuration information showing the configuration of a replication that uses the primary volume as a copy source.
    Type: Application
    Filed: December 26, 2014
    Publication date: August 3, 2017
    Applicant: HITACHI, LTD.
    Inventors: Takeshi ANZAI, Norihiro KOBAYASHI, Takahiko TOMIDA, Shoichi YOKOYAMA
  • Patent number: 9679800
    Abstract: Method for manufacturing a bonded wafer, including implanting at least one gas ion into a bond wafer from a bond wafer surface forming an ion implantation layer, bonding the surface from the ion implantation into bond wafer and base wafer surface, and delaminating the bond wafer part along the ion implantation layer by heat treatment forming a bonded wafer having thin-film on the base wafer, wherein heat treatment is at most 400° C. to delaminate bond wafer part along the ion implantation layer, including measuring bond wafer thicknesses and base wafer, selecting a combination of bond and base wafers so difference between both wafers thicknesses is 5 ?m or more before bonding the bond and base wafers. Inhibition of film thickness unevenness with marble pattern caused in thin-film when a bonded wafer is manufactured by ion implantation delamination method, and can manufacture a bonded wafer having thin-film with high thickness uniformity.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: June 13, 2017
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Norihiro Kobayashi, Hiroji Aga
  • Publication number: 20170033002
    Abstract: A bonded SOI wafer is manufactured by bonding a bond and a base wafer, each composed of a silicon single crystal, via an insulator film, depositing a polycrystalline silicon layer on the bonding surface side of the base wafer, polishing a surface of the polycrystalline silicon layer, forming the insulator film on the bonding surface of the bond wafer, bonding the polished surface of the polycrystalline silicon layer and the bond wafer via the insulator film, and thinning the bonded bond wafer to form an SOI layer; wherein, the base wafer is a silicon single crystal wafer having a resistivity of 100 ?·cm or more, depositing the polycrystalline silicon layer further includes a stage for previously forming an oxide film on the surface of the base wafer on which the polycrystalline silicon layer is deposited, and the polycrystalline silicon layer is deposited at a temperature of 900° C. or more.
    Type: Application
    Filed: March 5, 2015
    Publication date: February 2, 2017
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kenji MEGURO, Taishi WAKABAYASHI, Norihiro KOBAYASHI
  • Publication number: 20170004006
    Abstract: Disclosed is a method of assisting creation of an automatic execution service by a management system. The management system displays a plurality of process icons of a plurality of processes included in the automatic execution service on a screen. The management system displays, on the screen, an execution order line, which connects the plurality of process icons and which indicates an execution order of the plurality of processes. The management system displays, on the screen on which the plurality of process icons and the execution order line are displayed, a property reference relation line, which connects the plurality of process icons and which indicates a property reference relation between the plurality of processes.
    Type: Application
    Filed: May 27, 2014
    Publication date: January 5, 2017
    Inventors: Tatsuya MORI, Hirokazu TANIYAMA, Yuta TSURUGA, Norihiro KOBAYASHI, Masashi NAKAOKA
  • Publication number: 20160372363
    Abstract: The present invention is a method for manufacturing a bonded SOI wafer including: performing a thermal oxidation treatment including at least one of a thermal oxidation during temperature-rising and a thermal oxidation during temperature-falling with the use of a batch type heat treatment furnace, thereby forming a silicon oxide film in such a way that the oxide film buried in the delaminated bonded SOI wafer has a concentric oxide film thickness distribution, and subjecting the bonded SOI wafer after delaminating a bond wafer to a reducing heat treatment to make a film thickness range of the buried oxide film being smaller than a film thickness range before the reducing heat treatment. This provides a method for manufacturing a bonded SOT wafer which can suppress a variation of a radial distribution of a buried oxide film thickness caused by a reducing heat treatment performed after delaminating the SOI layer.
    Type: Application
    Filed: February 9, 2015
    Publication date: December 22, 2016
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Hiroji AGA, Norihiro KOBAYASHI
  • Publication number: 20160365273
    Abstract: A method for manufacturing a bonded wafer, includes: ion-implanting a gas ion such as a hydrogen ion from a surface of a bond wafer, thereby forming an ion-implanted layer; bonding the bond wafer and a base wafer; producing a bonded wafer having a thin-film on the base wafer by delaminating the bond wafer along the ion-implanted layer; and performing an RTA treatment on the bonded wafer in a hydrogen gas-containing atmosphere; wherein a protective film is formed onto the surface of the thin-film in a heat treatment furnace in the course of temperature-falling from the maximum temperature of the RTA treatment before the bonded wafer is taken out from the heat treatment furnace; and then the bonded wafer with the protective film being formed thereon is taken out from the heat treatment furnace, and is then cleaned with a cleaning liquid which can etch the protective film and the thin-film.
    Type: Application
    Filed: February 12, 2015
    Publication date: December 15, 2016
    Applicant: Shin-Etsu Handotai Co., Ltd.
    Inventors: Norihiro KOBAYASHI, Hiroji AGA