Abstract: There is provided a process for manufacturing a silicon epitaxial wafer capable of manufacturing an epitaxial wafer, which exerts a stable IG capability without being affected by a thermal history of a substrate for epitaxial growth and has the IG capability excellent from an early stage of a device process, and particularly, canceling an IG shortage in an N/N+ epitaxial wafer caused by a problem that oxygen precipitation is hard to proceed in an N+ substrate with a simple and easy way. RTA (rapid heating and rapid cooling heat treatment) is performed at a temperature of 1200° C. to 1350° C. for 1 to 120 seconds on a silicon substrate for epitaxial growth; further heat treatment is performed at a temperature of 900° C. to 1050° C. for 2 to 20 hours on the silicon substrate for epitaxial growth; and thereafter, an epitaxial layer is formed on a surface of the silicon substrate.

Abstract: The present invention provides a method for producing a silicon wafer characterized in that at least one surface of the wafer is subjected to a multi-step polishing process, in which a heat treatment in a mixed gas atmosphere of hydrogen and argon through use of a rapid heating/rapid cooling apparatus is substituted for a final polishing in the multi-step polishing process, and a silicon wafer produced by the method. Thereby, there can be provided a silicon wafer in high productivity wherein there is neither mechanical damages nor scratches on the surface of the wafer, surface roughness is significantly improved, and there is no slip dislocation.

Abstract: A method for heat treatment of a silicon wafer in a reducing atmosphere through use of a rapid thermal annealer (RTA) is provided. In the method, the silicon wafer is heat-treated at a temperature of 1150° C. to 1300° C. for 1 sec to 60 sec in a mixture gas atmosphere of hydrogen and argon. Hydrogen is present in the mixture gas atmosphere in an amount of 10% to 80% by volume. Hydrogen is preferably present in the mixture gas atmosphere in an amount of 20% to 40% by volume. The method decreases COP density on the surface of the silicon wafer to thereby improve electrical characteristics, such as TZDB and TDDB, of the silicon wafer, suppresses the generation of slip dislocation to thereby prevent wafer breakage, and utilizes intrinsic advantages of the RTA, such as improvement in productivity and reduction in hydrogen gas usage.

Abstract: A resource management system is provided that activates inactivated managed terminals via a network to allow a manager terminal to manage managed terminals including out-of-use terminals. The resource management system includes a management database in which management information on a managed terminal connected to a resource management server is stored; an existence checking processing unit including a connection request unit that issues a request to connect to the managed terminal and sends a command file containing an activation request; and a connection acceptance unit that receives a result file containing a response to a command included in the command file; and a terminal status update unit that updates the management database based on contents notified by the result file. The system manages the managed terminals based on the information stored in the management database.

Abstract: There are provided a heat-treating method capable of suppressing generation of slip in a CZ silicon single crystal wafer having a diameter of mainly 300 mm or more even under high temperature heat treatment to annihilate grown-in defects in the vicinity of a surface of the wafer, and an annealed wafer having a DZ layer in a surface layer of the wafer and oxide precipitates in the bulk thereof at a high density which exert a high gettering effect. First heat treatment of a silicon single crystal wafer manufactured from a silicon single crystal ingot pulled by means of a Czochralski method is performed at a temperature in the range of 600 to 1100° C. to form oxide precipitates in the bulk of the wafer, and thereafter, second heat treatment is performed at a temperature in the range of 1150 to 1300° C.

Abstract: There is provided a process for manufacturing a silicon epitaxial wafer capable of manufacturing an epitaxial wafer, which exerts a stable IG capability without being affected by a thermal history of a substrate for epitaxial growth and has the IG capability excellent from an early stage of a device process, and particularly, canceling an IG shortage in an N/N+ epitaxial wafer caused by a problem that oxygen precipitation is hard to proceed in an N+ substrate with a simple and easy way. RTA (rapid heating and rapid cooling heat treatment) is performed at a temperature of 1200° C. to 1350° C. for 1 to 120 seconds on a silicon substrate for epitaxial growth; further heat treatment is performed at a temperature of 900° C. to 1050° C. for 2 to 20 hours on the silicon substrate for epitaxial growth; and thereafter, an epitaxial layer is formed on a surface of the silicon substrate.

Abstract: There are provided a manufacturing process for a mirror finished silicon wafer capable of manufacturing a mirror finished silicon wafer, having an excellent quality in which grown-in crystal defects are annihilated by heat-treating the silicon mirror finished wafer in a heat treatment in a gas atmosphere of high safety at a lower cost without selection of a heat treatment furnace for use in the heat treatment, a mirror finished silicon wafer having an excellent quality, and a heat treatment furnace preferably used in the manufacturing process.

Abstract: The present invention provides an annealed wafer manufacturing method using a heat treatment method causing no change in resistivity of a wafer surface even when a silicon wafer having boron deposited on a surface thereof from an environment is subjected to heat treatment in an insert gas atmosphere and enabling the heat treatment in an ordinary diffusion furnace not requiring a sealed structure for increasing airtightness nor any specific facility such as explosion-proof facility. The present invention also provides an annealed wafer in which a boron concentration in the vicinity of a surface thereof is constant and crystal defects are annihilated.

Abstract: There is provided a manufacturing process for an annealed wafer capable of reducing boron contamination occurring while annealing is performed in a state where a wafer surface after cleaning is exposed to a gas in Ar atmosphere to suppress a change in resistivity due to an increase in a boron concentration in the vicinity of the wafer surface after annealing and manufacture an annealed wafer in which a difference in a boron concentration between a surface layer portion thereof and a bulk portion thereof is essentially not a problem even if a silicon wafer having a comparative low boron concentration (1×1016 atoms/cm3 or less) is used as the annealed wafer. The manufacturing process for an annealed wafer comprises: cleaning a silicon wafer; and loading the silicon wafer into a heat treatment furnace to heat-treat the silicon wafer in an Ar atmosphere, wherein an aqueous solution including hydrofluoric acid is used as a final cleaning liquid in the cleaning.

Abstract: According to the present invention, there are provided an SO wafer wherein surface roughness of an SOI layer surface of the SOI wafer is 0.12 nm or less in terms of RMS value and/or interface roughness of an interface between the SOT layer and a buried oxide layer of the SOI wafer is 0.12 nm or less in terms of RMS value, and a method for producing an SOI wafer, which comprises mirror-polishing an SOI wafer, removing a native oxide film on a surface of the wafer or forming a thermal oxide film having a thickness of 300 nm or more on the surface and removing the thermal oxide film, and subjecting the wafer to a heat treatment in an atmosphere of 100% hydrogen or a mixed gas atmosphere of argon and/or nitrogen containing 10% or more of hydrogen by using a rapid heating and rapid cooling apparatus.

Abstract: Silicon single crystal wafers for semiconductor devices of high quality are obtained with high productivity by effectively reducing or eliminating grown-in defects in surface layers of silicon single crystal wafers produced by the CZ method. The present invention provides a method for producing a silicon single crystal wafer, which comprises growing a silicon single crystal ingot by the Czochralski method, slicing the single crystal ingot into a wafer, subjecting the wafer to a heat treatment at a temperature of 1100-1300° C. for 1 minute or more under a non-oxidative atmosphere, and successively subjecting the wafer to a heat treatment at a temperature of 700-1300° C. for 1 minute or more under an oxidative atmosphere without cooling the wafer to a temperature lower than 700° C. The present invention also provides a CZ silicon single crystal wafer, wherein density of COPs having a size of 0.09 &mgr;m or more in a surface layer having a thickness of up to 5 &mgr;m from a surface is 1.

Abstract: The present invention provides a method for producing a silicon wafer characterized in that at least one surface of the wafer is subjected to a multi-step polishing process, in which a heat treatment in a mixed gas atmosphere of hydrogen and argon through use of a rapid heating/rapid cooling apparatus is substituted for a final polishing in the multi-step polishing process, and a silicon wafer produced by the method. Thereby, there can be provided a silicon wafer in high productivity wherein there is neither mechanical damages nor scratches on the surface of the wafer, surface roughness is significantly improved, and there is no slip dislocation.

Abstract: There is disclosed a heat treatment method for a silicon wafer in which the silicon wafer is heat treated in a reducing atmosphere through use of a rapid heating/rapid cooling apparatus. The silicon wafer is heat treated for a period of 1 to 60 seconds at a temperature in the range of 1200° C. to the melting temperature of silicon. The heat treatment method can reduce the density of COPs and micro-defects which serve as nuclei of oxidation induced stacking faults at the surface of the silicon wafer.

Abstract: In a method for heat treatment of silicon wafers under a reducing atmosphere utilizing an RTA apparatus, in particular, microroughness on silicon wafer surfaces is reduced, thereby improving electric characteristics such as oxide dielectric breakdown voltage and mobility of carriers, and generation of slip dislocations and heavy metal contamination are suppressed. Thus, improvement of yield and productivity, and cost reduction are contemplated. According to the present invention, there is provided a method for heat treatment of a silicon wafer under a reducing atmosphere containing hydrogen using a rapid heating/rapid cooling apparatus, wherein a natural oxide film on a silicon wafer surface is removed, and then the silicon wafer is subjected to a heat treatment under an atmosphere of 100% hydrogen or an inert gas atmosphere containing 10% or more of hydrogen using a rapid heating/rapid cooling apparatus.

Abstract: There is disclosed a method of fabricating an SOI wafer by a hydrogen ion delamination method wherein a surface of an SOI layer is not polished but is subjected to heat treatment in a reducing atmosphere containing hydrogen after a bonding heat treatment, a method of fabricating an SOI wafer by a hydrogen ion delamination method wherein a surface of an SOI layer is not polished but subjected to heat treatment in a reducing atmosphere containing hydrogen after delaminating heat treatment, and a SOI wafer fabricated by the methods. There are provided a method of fabricating an SOI wafer by a hydrogen ion delamination method wherein a damage layer remaining on the surface of the SOI layer after delamination is removed and surface roughness is improved without polishing, so that uniform thickness of the SOI layer can be achieved, and to simplify the process therefor.

Abstract: The present invention provides a method for producing a silicon wafer characterized in that at least one surface of the wafer is subjected to a multi-step polishing process, in which a heat treatment in a mixed gas atmosphere of hydrogen and argon through use of a rapid heating/rapid cooling apparatus is substituted for a final polishing in the multi-step polishing process, and a silicon wafer produced by the method. Thereby, there can be provided a silicon wafer in high productivity wherein there is neither mechanical damages nor scratches on the surface of the wafer, surface roughness is significantly improved, and there is no slip dislocation.

Abstract: There is disclosed a heat treatment method for a silicon monocrystal wafer comprising the steps of heat-treating in a reducing atmosphere a silicon monocrystal wafer manufactured by growing a silicon monocrystal ingot by Czochralski method wherein a wafer obtained from a silicon monocrystal ingot having oxygen concentration of 16 ppma or less which is manufactured by pulling at a growth rate of 0.6 mm/min or more, and in which COPs exist in high density is subjected to anneal heat treatment at 1200° C. or above for one second or more through use of a rapid heating/rapid cooling apparatus, or at 1200° C. or above for 30 minutes or more through use of a batchwise heat treatment furnace, and no defect silicon monocrystal wafer obtained with the method.

Abstract: There is disclosed a method for heat treatment of a silicon wafer performed in a reducing atmosphere containing hydrogen by utilizing a rapid thermal annealer, wherein the heat treatment comprises a plurality of steps each of which is performed with a differently defined heat treatment condition. In this method, the heat treatment comprising a plurality of steps may be continuously performed without taking out the wafer from an RTA apparatus. The method of the present invention can, in particular, reduce COP density of the silicon wafer surface, reduce its microroughness and haze, and thus improve electric characteristics such as oxide dielectric breakdown voltage and mobility of carriers.

Abstract: A method for heat-treating an SOI wafer in a reducing atmosphere, wherein the SOI wafer is heat-treated through use of a rapid thermal annealer at a temperature within the range of 1100° C. to 1300° C. for 1 sec to 60 sec. The reducing atmosphere is preferably an atmosphere of 100% hydrogen or a mixed gas atmosphere containing hydrogen and argon. The heat treatment is preferably performed for 1 sec to 30 sec. The method eliminates COPs in an SOI layer of an SOI wafer in accordance with a hydrogen annealing method, while preventing etching of the SOI layer and a buried oxide layer.

Abstract: There is disclosed a heat treatment method for a silicon wafer. A silicon wafer, on which a natural oxide film is formed at least at the surface thereof, is loaded directly into a heat treatment furnace heated to a temperature within a temperature range of 1000° C. to the melting point of silicon. Subsequently, the silicon wafer is heat-treated at a temperature within the temperature range, and the silicon wafer having a temperature within the temperature range is unloaded from the heat treatment furnace immediately after the heat treatment is completed. The heat treatment method can be performed at low cost, and can remove crystal defects within a short period of time, with no use of gas endangering safety such as hydrogen.