Patents by Inventor Norihito Tsukahara

Norihito Tsukahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050079707
    Abstract: An interconnection substrate include: interconnection layer 12 region where at least first conductor layer 16 and second conductor layer 18 are vertically stacked in that order on substrate 10, first conductor layer 16 and second conductor layer 18 containing conductive particles and a binder, wherein first conductor layer 16 and second conductor layer 18 stacked in the interconnection layer 12 region have conductive particles different in average particle size from each other. As a result, only intended region can have low resistance.
    Type: Application
    Filed: September 23, 2004
    Publication date: April 14, 2005
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa, Daisuke Sakurai
  • Publication number: 20050060886
    Abstract: A circuit board fabrication method comprising the steps of: forming first conductive interconnection 2 onto insulator substrate 1; applying resin film 41, which is to be interlevel insulator layer 42 for electrically insulating first conductive interconnection 2 and second conductive interconnection 6, onto insulator substrate 1; either making pillar-like member 3 stand on a prescribed position on first conductive interconnection 2 before applying resin film 41, or press fitting pillar-like member 3 into resin film 41 in such a manner as to reach either a surface vicinity of first conductive interconnection 2 or a portion of first conductive interconnection 2 after applying resin film 41; hardening resin film 41 to form interlevel insulator layer 42; pulling out pillar-like member 3 to form opening 5 in interlevel insulator layer 42; and (f) forming second conductive interconnection 6 onto interlevel insulator layer 42 in such a manner as to include opening 5.
    Type: Application
    Filed: September 15, 2004
    Publication date: March 24, 2005
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa, Daisuke Sakurai
  • Publication number: 20050045379
    Abstract: Apply heat to thermoplastic resin film, which is eventually to become an insulating resin layer, and press the film against a mold for forming grooves on a surface of the film. Next, press-fit an electronic component into the resin film from a back-face of the film, thereby exposing electrodes of the component from a bottom of the grooves. Then cool the film for curing. Peel the film off the mold, then fill the grooves with conductive paste, and cure the paste for forming circuit patterns. The foregoing procedure allows bringing the electrodes positively into conduction with the circuit patterns of a circuit board incorporating the electronic component, and achieving a narrower pitch between routings of the circuit patterns.
    Type: Application
    Filed: August 13, 2004
    Publication date: March 3, 2005
    Inventors: Daisuke Sakurai, Norihito Tsukahara, Kazuhiro Nishikawa
  • Publication number: 20050017373
    Abstract: It comprises circuit board 10 with circuit pattern 2 formed by conductive resin paste on resin substrate 1, surface-mounted type electronic components 30, 40 arranged with electrode terminals with respect to the connecting region of circuit pattern 2, connecting member 3 formed from conductive resin paste for connecting the connecting region to the electrode terminal, and insulating adhesive 6 for bonding the electronic components 30, 40 and circuit board 10, which is lower in curing temperature than conductive resin paste and disposed in a space between circuit board 10 and electronic components 30, 40 between connecting regions.
    Type: Application
    Filed: June 4, 2004
    Publication date: January 27, 2005
    Inventors: Kazuhiro Nishikawa, Norihito Tsukahara, Masayuki Okano
  • Publication number: 20050001315
    Abstract: An integral type electronic device is formed from a first board and a second board by storing and holding electronic components in component storage parts of the first board, and then electrically connecting the second board to the electronic components. An arrangement accuracy of the electronic components is determined on a basis of an arrangement accuracy of the component storage parts, and the electronic components stored and held in the component storage parts are limited in motion.
    Type: Application
    Filed: July 30, 2004
    Publication date: January 6, 2005
    Inventors: Kazushi Higashi, Hiroyuki Otani, Norihito Tsukahara
  • Patent number: 6825055
    Abstract: An integral type electronic component is formed of a first board and a second board by storing and holding electronic components to component storage parts of the first board and electrically connecting the second board to the electronic components. An arrangement accuracy of the electronic components is determined on the basis of an arrangement accuracy of the component storage parts, and the electronic components stored in the component storage parts are limited in motion. The electronic components can be arranged highly accurately and simply at low costs in a short time in comparison with the conventional art by being simply inserted to the component storage parts.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: November 30, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazushi Higashi, Hiroyuki Otani, Norihito Tsukahara
  • Publication number: 20040200065
    Abstract: An electronic component having connection terminals on one side thereof is bonded to a circuit board via an adhesive sheet having through-holes. The connection terminals on the electronic component are connected to electrode pads provided on the circuit board via a conductive adhesive in the through-holes. Thus, an electronic circuit device is formed. Using a polymeric resin film sheet for the circuit board and mounting an electronic component, e.g. an LSI, onto the circuit board can provide a small, light, thin, and inexpensive electronic circuit device.
    Type: Application
    Filed: March 12, 2004
    Publication date: October 14, 2004
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa
  • Patent number: 6780668
    Abstract: A bump is formed on each element electrode of a semiconductor device, and a thermoplastic resin sheet is aligned in position with the semiconductor device. The sheet and the semiconductor device are subjected to hot pressing to melt the sheet, forming a thermoplastic resin portion that covers a portion other than the end surface of each bump of the semiconductor device. The thermoplastic resin portion obtained after the hot pressing is out.
    Type: Grant
    Filed: January 16, 2002
    Date of Patent: August 24, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Norihito Tsukahara, Takashi Akiguchi, Hidenori Miyakawa
  • Publication number: 20040134681
    Abstract: A circuit board comprises a base film that is a base layer, a first conductive circuit manufactured by hardening conductive paste material formed in a predetermined shape on the base film, a first insulating layer manufactured by hardening insulating paste material formed on the base film and the first conductive circuit, and a second conductive circuit manufactured by hardening conductive paste material in a predetermined shape on the first insulating layer, wherein an electronic part built-in by the first insulating layer and second insulating layer is connected to the second conductive circuit, and the first conductive circuit is connected to the second conductive circuit through a via hole.
    Type: Application
    Filed: December 5, 2003
    Publication date: July 15, 2004
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa
  • Publication number: 20040130024
    Abstract: A bump is formed on each element electrode of a semiconductor device, and a thermoplastic resin sheet is aligned in position with the semiconductor device. The sheet and the semiconductor device are subjected to hot pressing to melt the sheet, forming a thermoplastic resin portion that covers a portion other than the end surface of each bump of the semiconductor device. The thermoplastic resin portion obtained after the hot pressing is cut.
    Type: Application
    Filed: December 17, 2003
    Publication date: July 8, 2004
    Inventors: Norihito Tsukahara, Takashi Akiguchi, Hidenori Miyakawa
  • Publication number: 20040115864
    Abstract: A semiconductor element with electrodes, and a passive element with electrodes are embedded in a thermoplastic sheet base, which is then subjected to laser beam machining, electron beam machining or ion beam machining to expose electrodes. Thereafter, a circuit pattern is formed by formation of a thin film or printing of a conductive adhesive. Because of exposing the electrodes by laser beam machining or the like manner as above, the exposure can be carried out in a short period of time and also by a local treatment, thereby reducing damages to the base. The high-quality, high-productivity and inexpensive manufacturing method for electronic component-mounted components, manufacturing method for electronic component-mounted completed products, and electronic component-mounted completed products can be provided accordingly.
    Type: Application
    Filed: October 28, 2003
    Publication date: June 17, 2004
    Inventors: Daisuke Sakurai, Norihito Tsukahara
  • Publication number: 20040082100
    Abstract: After a first electronic component is inserted in a base substrate, first circuit patterns are formed on the inserted first electronic component, and then a second electronic component is mounted on the first circuit patterns to complete an electronic component-mounted component. According to the above method, the thickness of a module may be decreased by the thickness of the base substrate. Further, since the electronic component is surface-mounted, electronic components of arbitrary sizes and types may be used.
    Type: Application
    Filed: November 1, 2002
    Publication date: April 29, 2004
    Inventors: Norihito Tsukahara, Daisuke Sakurai
  • Publication number: 20040020047
    Abstract: A multilayered circuit board and a method of forming the multilayer circuit board are provided. In a first circuit forming process P1p, a first circuit 12a is formed on an insulating board 11a with a conductor 12a; in a circuit embedding process P2p, the first circuit 12a is embedded in the insulating board 11a so as to have a predetermined surface flatness S and a predetermined parallelism P; in a masking process P4p, a pilot hole 15, 20 for a via hole 4, 4a is masked at a part of the surface of the circuit 12a; in an insulating layer forming process P5p, an insulating material 11b is applied as a layer to the surface except the mask 14; in an insulating material layer flattening process, the surface of the insulating material layer 11b is flattened so as to have the predetermined surface flatness S and the predetermined parallelism P; and in a pilot hole forming process, the mask 14 is removed.
    Type: Application
    Filed: July 3, 2003
    Publication date: February 5, 2004
    Inventors: Kazuhiro Nishikawa, Norihito Tsukahara, Hiroyuki Otani
  • Patent number: 6531022
    Abstract: A mounting method of a semiconductor element capable of joining an electrode of a semiconductor element and a circuit board at high reliability. The method includes a step of forming an external electrode terminal by filling a hole formed in circuit board with a conductive paste, a step of positioning the external electrode terminal and a protruding bump formed on an electrode of a semiconductor, and a step of pressing the semiconductor element to contact between the conductive paste in the hole and the protruding bump thereby electrically connecting the electrode of the semiconductor element and the external electrode terminal of the circuit board. An adhesive sheet of a thermosetting resin, a thermoplastic resin, or a mixed thermosetting and thermoplastic resin may be disposed on the circuit board where the bump breaks through the sheet to contact the paste.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: March 11, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Norihito Tsukahara
  • Patent number: 6357106
    Abstract: A method for mounting parts, and an IC card and its manufacturing method. The method reduces the number of steps, increases productivity, lowers costs, and miniaturizes the chip. A first electrode of the IC chip for processing signals received from a coil is connected to an internal end of a coil pattern formed on a first substrate, and an external end of the coil pattern and a second electrode of the IC chip are connected via a jumper wire.
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: March 19, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mitsumasa Oku, Takashi Akiguchi, Shinji Murakami, Yutaka Harada, Norihito Tsukahara, Mitsunori Yokomakura, Kenichi Sato
  • Publication number: 20020026703
    Abstract: The present invention provides a method for mounting parts, and an IC card and its manufacturing method, capable of reducing the number of steps, increasing productivity, reducing in costs, and miniaturizing the chip. For this purpose, in the present invention, a first electrode (7a) of the IC chip (4) for processing signals received from a coil (3) is connected to an internal end (3b) of a coil pattern (2) formed on a first substrate (1a), and an external end (3a) of the coil pattern (2) and a second electrode (7b) of the IC chip (4) are connected via a jumper wiring means (8).
    Type: Application
    Filed: October 26, 2001
    Publication date: March 7, 2002
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Mitsumasa Oku, Takashi Akiguchi, Shinji Murakami, Yutaka Harada, Norihito Tsukahara, Mitsunori Yokomakura, Kenichi Sato
  • Publication number: 20020028595
    Abstract: An integral type electronic component is formed of a first board and a second board by storing and holding electronic components to component storage parts of the first board and electrically connecting the second board to the electronic components. An arrangement accuracy of the electronic components is determined on the basis of an arrangement accuracy of the component storage parts, and the electronic components stored in the component storage parts are limited in motion. The electronic components can be arranged highly accurately and simply at low costs in a short time in comparison with the conventional art by being simply inserted to the component storage parts.
    Type: Application
    Filed: August 29, 2001
    Publication date: March 7, 2002
    Inventors: Kazushi Higashi, Hiroyuki Otani, Norihito Tsukahara
  • Publication number: 20020014685
    Abstract: When a semiconductor element (1) is bonded to an inner lead (6) of a tape carrier (5), a problem of an operation failure of the semiconductor element (1) that would be caused from result of an excessive amount of an alloy layer (9) flowing toward and coming into contact with an edge portion of the semiconductor element (1) is solved. In an electronic component device in which a metal ball formed by melting a tip end of a metal wire (12) is bonded onto an electrode (2) of the semiconductor element (1) so as to form a bump (11), a plated layer is formed on the surface of the inner lead (6) of the tape carrier (5), and under the condition that the inner lead (6) is positioned in alignment with the bump (11), the plated layer is melted in order that the semiconductor element (1) is bonded to the inner lead (6) through an alloy layer (9), a plurality of bumps (11) are formed on the electrode (2) so as to increase a force to hold the alloy layer (9) and to prevent the alloy layer (9) from flowing therefrom.
    Type: Application
    Filed: February 6, 1998
    Publication date: February 7, 2002
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: NORIHITO TSUKAHARA
  • Publication number: 20010005054
    Abstract: A method of forming a bump electrode on an IC electrode includes the steps of forming a ball bond on an IC electrode by a wire bonding apparatus, moving a bonding capillary upward, moving the bonding capillary sideways and then downward, bonding an Au wire to the ball bond portion, and cutting the Au wire. The Au wire is prevented from coming in contact with portions around the ball bond portion other than the ball bond portion by presetting a descent position of the bonding capillary to a position higher than a position in which the ball bond is formed.
    Type: Application
    Filed: January 25, 2001
    Publication date: June 28, 2001
    Inventors: Kazushi Higashi, Norihito Tsukahara, Takahiro Yonezawa, Yoshihiko Yagi, Yoshifumi Kitayama, Hiroyuki Otani
  • Patent number: 6232211
    Abstract: A two-staged projecting bump is formed on an electrode of a semiconductor element by a method of melting a leading end of a metallic wire passed through a capillary thereby forming a metallic ball. The metallic ball is bonded to the electrode of the semiconductor element, and the capillary is moved sideways and downward. The metallic wire is bonded onto the metallic ball bonded to the electrode of the metallic wire, and then pulled and broken. A metallic wire part immediately above the metallic ball where crystal grains are thermally influenced and turned coarse when the leading the of the metallic wire is melted thereby forming the metallic ball is located inside a boundary where the bond between the metallic ball and the metallic wire terminates.
    Type: Grant
    Filed: October 16, 1998
    Date of Patent: May 15, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Norihito Tsukahara