Patents by Inventor Norihito Tsukahara

Norihito Tsukahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7297876
    Abstract: Apply heat to thermoplastic resin film, which is eventually to become an insulating resin layer, and press the film against a mold for forming grooves on a surface of the film. Next, press-fit an electronic component into the resin film from a back-face of the film, thereby exposing electrodes of the component from a bottom of the grooves. Then cool the film for curing. Peel the film off the mold, then fill the grooves with conductive paste, and cure the paste for forming circuit patterns. The foregoing procedure allows bringing the electrodes positively into conduction with the circuit patterns of a circuit board incorporating the electronic component, and achieving a narrower pitch between routings of the circuit patterns.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: November 20, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daisuke Sakurai, Norihito Tsukahara, Kazuhiro Nishikawa
  • Publication number: 20070200217
    Abstract: After a first electronic component is inserted into a base substrate, first circuit patterns are formed on the inserted first electronic component, and then a second electronic component is mounted on the first circuit patterns to complete an electronic component-mounted component. According to the above method, a thickness of a module may be decreased by a thickness of the base substrate. Further, since electronic components are surface-mounted, electronic components of arbitrary sizes and types may be used.
    Type: Application
    Filed: January 16, 2007
    Publication date: August 30, 2007
    Inventors: Norihito Tsukahara, Daisuke Sakurai
  • Patent number: 7233069
    Abstract: An interconnection substrate includes: an interconnection layer region where at least a first conductor layer and a second conductor layer are vertically stacked in that order on a substrate, with the first conductor layer and second conductor layer containing conductive particles and a binder, wherein the first conductor layer and second conductor layer stacked in the interconnection layer region have conductive particles different in average particle size from each other. As a result, only an intended region can have low resistance.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: June 19, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa, Daisuke Sakurai
  • Patent number: 7229293
    Abstract: First circuit board 10 including first resin base material 12 which is softened by heating and has a fusing property, and a plurality of first conductor patterns 14 formed on a surface of first resin base material 12, and second circuit board 20 on which a plurality of second conductor patterns 24 are formed with the same pitch as that of first conductor patterns 14 are provided. In the configuration, first conductor patterns 14 and second conductor patterns 24 are brought into mechanical contact with each other to provide electrical conduction; first resin base material 12 covers first conductor patterns 14 and second conductor patterns 24 and is bonded to second resin base material 22 of second circuit board 20, thereby connecting first circuit board 10 and second circuit board 20 to each other.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: June 12, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daisuke Sakurai, Kazuhiro Nishikawa, Norihito Tsukahara
  • Publication number: 20070127224
    Abstract: An electronic component having connection terminals on one side thereof is bonded to a circuit board via an adhesive sheet having through-holes. The connection terminals on the electronic component are connected to electrode pads provided on the circuit board via a conductive adhesive in the through-holes. Thus, an electronic circuit device is formed. Using a polymeric resin film sheet for the circuit board and mounting an electronic component, e.g. an LSI, onto the circuit board can provide a small, light, thin, and inexpensive electronic circuit device.
    Type: Application
    Filed: January 30, 2007
    Publication date: June 7, 2007
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa
  • Publication number: 20070114058
    Abstract: A circuit board comprises a base film that is a base layer, a first conductive circuit manufactured by hardening conductive paste material formed in a predetermined shape on the base film, a first insulating layer manufactured by hardening insulating paste material formed on the base film and the first conductive circuit, and a second conductive circuit manufactured by hardening conductive paste material in a predetermined shape on the first insulating layer, wherein an electronic part built-in by the first insulating layer and second insulating layer is connected to the second conductive circuit, and the first conductive circuit is connected to the second conductive circuit through a via hole.
    Type: Application
    Filed: January 17, 2007
    Publication date: May 24, 2007
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa
  • Patent number: 7186925
    Abstract: An electronic component having connection terminals on one side thereof is bonded to a circuit board via an adhesive sheet having through-holes. The connection terminals on the electronic component are connected to electrode pads provided on the circuit board via a conductive adhesive in the through-holes. Thus, an electronic circuit device is formed. Using a polymeric resin film sheet for the circuit board and mounting an electronic component, e.g. an LSI, onto the circuit board can provide a small, light, thin, and inexpensive electronic circuit device.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: March 6, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa
  • Patent number: 7180749
    Abstract: A circuit board comprises a base film that is a base layer, a first conductive circuit manufactured by hardening conductive paste material formed in a predetermined shape on the base film, a first insulating layer manufactured by hardening insulating paste material formed on the base film and the first conductive circuit, and a second conductive circuit manufactured by hardening conductive paste material in a predetermined shape on the first insulating layer, wherein an electronic part built-in by the first insulating layer and second insulating layer is connected to the second conductive circuit, and the first conductive circuit is connected to the second conductive circuit through a via hole.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: February 20, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa
  • Patent number: 7180007
    Abstract: It comprises circuit board 10 with circuit pattern 2 formed by conductive resin paste on resin substrate 1, surface-mounted type electronic components 30, 40 arranged with electrode terminals with respect to the connecting region of circuit pattern 2, connecting member 3 formed from conductive resin paste for connecting the connecting region to the electrode terminal, and insulating adhesive 6 for bonding the electronic components 30, 40 and circuit board 10, which is lower in curing temperature than conductive resin paste and disposed in a space between circuit board 10 and electronic components 30, 40 between connecting regions.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: February 20, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuhiro Nishikawa, Norihito Tsukahara, Masayuki Okano
  • Patent number: 7176055
    Abstract: After a first electronic component is inserted into a base substrate, first circuit patterns are formed on the inserted first electronic component, and then a second electronic component is mounted on the first circuit patterns to complete an electronic component-mounted component. According to the above method, a thickness of a module may be decreased by a thickness of the base substrate. Further, since electronic components are surface-mounted, electronic components of arbitrary sizes and types may be used.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: February 13, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Norihito Tsukahara, Daisuke Sakurai
  • Patent number: 7090482
    Abstract: A bump is formed on each element electrode of a semiconductor device, and a thermoplastic resin sheet is aligned in position with the semiconductor device. The sheet and the semiconductor device are subjected to hot pressing to melt the sheet, forming a thermoplastic resin portion that covers a portion other than the end surface of each bump of the semiconductor device. The thermoplastic resin portion obtained after the hot pressing is cut.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: August 15, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Norihito Tsukahara, Takashi Akiguchi, Hidenori Miyakawa
  • Patent number: 7084008
    Abstract: A semiconductor element (111) with electrodes (112), and a passive element (113) with electrodes (113a) are embedded in a thermoplastic sheet base (115), which is then subjected to laser beam machining, electron beam machining or ion beam machining to expose electrodes (112 and 113a). Thereafter, a circuit pattern (119) is formed by formation of a thin film or printing of a conductive adhesive. Exposing the electrodes by laser beam machining or the like can be carried out in a short period of time and also by local treatment, thereby reducing damage to the base.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: August 1, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daisuke Sakurai, Norihito Tsukahara
  • Patent number: 7071090
    Abstract: A method of forming a bump electrode on an IC electrode includes the steps of forming a ball bond on an IC electrode by a wire bonding apparatus, moving a bonding capillary upward, moving the bonding capillary sideways and then downward, bonding an Au wire to the ball bond portion, and cutting the Au wire. The Au wire is prevented from coming in contact with portions around the ball bond portion other than the ball bond portion by presetting a descent position of the bonding capillary to a position higher than a position in which the ball bond is formed.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: July 4, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazushi Higashi, Norihito Tsukahara, Takahiro Yonezawa, Yoshihiko Yagi, Yoshifumi Kitayama, Hiroyuki Otani
  • Publication number: 20060014403
    Abstract: First circuit board 10 including first resin base material 12 which is softened by heating and has a fusing property, and a plurality of first conductor patterns 14 formed on a surface of first resin base material 12, and second circuit board 20 on which a plurality of second conductor patterns 24 are formed with the same pitch as that of first conductor patterns 14 are provided. In the configuration, first conductor patterns 14 and second conductor patterns 24 are brought into mechanical contact with each other to provide electrical conduction; first resin base material 12 covers first conductor patterns 14 and second conductor patterns 24 and is bonded to second resin base material 22 of second circuit board 20, thereby connecting first circuit board 10 and second circuit board 20 to each other.
    Type: Application
    Filed: July 7, 2005
    Publication date: January 19, 2006
    Inventors: Daisuke Sakurai, Kazuhiro Nishikawa, Norihito Tsukahara
  • Publication number: 20050275088
    Abstract: Thinning and stacking are essential for circuit modules used for mobile devices of various kinds, smart cards, memory cards and the like. These demands make the manufacture of the circuit modules more complicated or less reliable due to delamination. A circuit module of a multilayer structure is provided which is formed by embedding semiconductor chips and passive components in a sheet made from a thermoplastic resin; folding a module sheet, which is formed of circuit blocks provided with wiring patterns thereon, at the boundaries of the circuit blocks so as to be stacked into layers; and thermal-bonding and integrating the module sheet by applying heat and pressure. As a result, a highly reliable circuit module can be manufactured in a simple manner.
    Type: Application
    Filed: June 8, 2005
    Publication date: December 15, 2005
    Inventors: Daisuke Sakurai, Kazuhiro Nishikawa, Norihito Tsukahara
  • Patent number: 6971167
    Abstract: A multilayered circuit board and a method of forming the multilayered circuit board are provided. In a first circuit forming process, a first circuit is formed on an insulating board with a conductor; in a circuit embedding process, the first circuit is embedded in the insulating board so as to have a predetermined surface flatness and a predetermined parallelism; in a masking process, a pilot hole for a via hole is masked at a part of a surface of the circuit; in an insulating layer forming process P5p, an insulating material is applied as a layer to the surface except that portion thereof covered by the mask; in an insulating material layer flattening process, the surface of the insulating material layer is flattened so as to have the predetermined surface flatness and the predetermined parallelism; and in a pilot hole forming process, the mask is removed.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: December 6, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuhiro Nishikawa, Norihito Tsukahara, Hiroyuki Otani
  • Publication number: 20050146029
    Abstract: A method of forming a bump electrode on an IC electrode includes the steps of forming a ball bond on an IC electrode by a wire bonding apparatus, moving a bonding capillary upward, moving the bonding capillary sideways and then downward, bonding an Au wire to the ball bond portion, and cutting the Au wire. The Au wire is prevented from coming in contact with portions around the ball bond portion other than the ball bond portion by presetting a descent position of the bonding capillary to a position higher than a position in which the ball bond is formed.
    Type: Application
    Filed: March 8, 2005
    Publication date: July 7, 2005
    Inventors: Kazushi Higashi, Norihito Tsukahara, Takahiro Yonezawa, Yoshihiko Yagi, Yoshifumi Kitayama, Hiroyuki Otani
  • Patent number: 6894387
    Abstract: A method of forming a bump electrode on an IC electrode includes the steps of forming a ball bond on an IC electrode by a wire bonding apparatus, moving a bonding capillary upward, moving the bonding capillary sideways and then downward, bonding an Au wire to the ball bond portion, and cutting the Au wire. The Au wire is prevented from coming in contact with portions around the ball bond portion other than the ball bond portion by presetting a descent position of the bonding capillary to a position higher than a position in which the ball bond is formed.
    Type: Grant
    Filed: January 25, 2001
    Date of Patent: May 17, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazushi Higashi, Norihito Tsukahara, Takahiro Yonezawa, Yoshihiko Yagi, Yoshifumi Kitayama, Hiroyuki Otani
  • Publication number: 20050093172
    Abstract: An electronic circuit device has a substrate having a wiring pattern, an electronic component electrically connected to a terminal section of the wiring pattern by contacting a projection electrode with it, a cover that is disposed at a position facing the substrate and grapples the electronic component between it and the substrate, and a resin layer made of thermoplastic resin filled in a gap between the substrate and the cover. The gap includes a space in a connection region except an electric connection part between the projection electrode and the terminal section. The electronic component is adhered to the substrate and the substrate is adhered to the cover through the resin layer. Thus, the electronic circuit device having high connection reliability and high mass productivity, and a method and apparatus for manufacturing the electronic circuit device can be provided.
    Type: Application
    Filed: October 7, 2004
    Publication date: May 5, 2005
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa, Kazuto Nishida
  • Publication number: 20050087363
    Abstract: A wiring board comprises a patterned wiring formed of electrically conductive resin composed primarily of silver and embedded into a substrate in a manner that a surface thereof is exposed above the substrate, and a covering conductor formed primarily of carbon covering the surface of the patterned wiring. The wiring board of this structure is superior in resistance to moisture absorption and water, prevents silver migration attributable to the moisture, and reduces a contact resistance in the connection between a terminal portion of the wiring board and an external apparatus.
    Type: Application
    Filed: September 29, 2004
    Publication date: April 28, 2005
    Inventors: Norihito Tsukahara, Kazuhiro Nishikawa