Patents by Inventor Norio Suzuki

Norio Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6646313
    Abstract: A method for manufacturing a semiconductor integrated circuit device including a first field effect transistor having a gate insulating film formed over a first element forming region of a main surface of a semiconductor substrate; and a second field effect transistor having a gate insulating film formed over a second element forming region of the main surface of the semiconductor substrate and made thinner than the gate insulating film of the first field effect transistor.
    Type: Grant
    Filed: September 25, 2001
    Date of Patent: November 11, 2003
    Assignee: Hitachi, Ltd
    Inventors: Shoji Shukuri, Norio Suzuki, Yasuhiro Taniguchi
  • Patent number: 6635945
    Abstract: A semiconductor device and process of forming the device are described. The process includes forming a pad oxide film on the circuit-forming side of a semiconductor substrate; forming an oxidation prevention film on the pad oxide film; removing the oxidation prevention film and the pad oxide film at a desired position, thereby exposing the surface of the semiconductor substrate; horizontally recessing the pad oxide film; etching the exposed surface of the semiconductor substrate by isotropic etching; forming a trench to a desired depth, using the oxidation prevention film as a mask; horizontally recessing the pad oxide film; and oxidizing the trench formed in the semiconductor substrate. The produced device has round upper trench edges obtained by conducting isotropic etching of the exposed surface of the semiconductor substrate and horizontally recessing of the pad oxide film before the oxidation of the trench, whereby only one oxidation step is required.
    Type: Grant
    Filed: May 30, 2000
    Date of Patent: October 21, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Norio Ishitsuka, Hideo Miura, Shuji Ikeda, Yasuko Yoshida, Norio Suzuki, Kozo Watanabe, Kenji Kanamitsu
  • Patent number: 6630375
    Abstract: Over the principal surface of a semiconductor substrate body containing an impurity of a predetermined conduction type, there is formed an epitaxial layer which contains an impurity of the same conduction type as that of the former impurity and the same concentration as the designed one of the former impurity. After this, there are formed a well region which has the same conduction type as that of said impurity and its impurity concentration gradually lowered depthwise of said epitaxial layer. The well region is formed with the gate insulating films of MIS·FETs.
    Type: Grant
    Filed: December 5, 2001
    Date of Patent: October 7, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Hiroto Kawagoe, Tatsumi Shirasu, Shogo Kiyota, Norio Suzuki, Eiichi Yamada, Yuji Sugino, Manabu Kitano, Yoshihiko Sakurai, Takashi Naganuma, Hisashi Arakawa
  • Publication number: 20030181020
    Abstract: A process of producing a semiconductor device having a highly reliable groove isolation structure with a desired radius of curvature formed at the groove upper edge and without formation of any step. The device is produced by reducing the stress generation around the groove upper edge of an element isolation groove on a semiconductor substrate, thereby optimizing the shape of an element isolation groove and making the device finer and improving the device electric characteristics.
    Type: Application
    Filed: March 21, 2003
    Publication date: September 25, 2003
    Inventors: Norio Ishitsuka, Hideo Miura, Shuji Ikeda, Norio Suzuki, Yasushi Matsuda, Yasuko Yoshida, Hirohiko Yamamoto, Masamichi Kobayashi, Akira Takamatsu, Hirofumi Shimizu, Kazushi Fukuda, Shinichi Horibe, Toshio Nozoe
  • Patent number: 6613735
    Abstract: The present invention is directed to a composition for gene transfer which composition contains a quaternary ammonium salt represented by formula (1): (wherein each of R1, R2, R3, R4, and R5, which are identical to or different from one another, represents a C9-C17 aliphatic group); X1 represents a halogen atom; and n is an integer from 1 to 10 inclusive; and a method for introducing a gene into a cell by use of the composition. The composition enables effective delivery and expression of a gene which previously could not be effectively expressed in cells due to the low ratio at which the gene is delivered into cells. Therefore, the composition is advantageously used as a gene transfer reagent or a pharmaceutical.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: September 2, 2003
    Assignee: Daiichi Pharmaceutical Co., Ltd.
    Inventors: Kenichi Tanaka, Hiroshi Kikuchi, Norio Suzuki
  • Publication number: 20030148587
    Abstract: Grooves are defined in a substrate having device isolation regions by dry etching using silicon nitride films and side wall spacers as masks. Thereafter, the side wall spacers lying on side walls of the silicon nitride films are removed and the substrate is subjected to thermal oxidation, whereby the surface of the substrate at a peripheral portion of each active region is subjected to so-called round processing so as to have a sectional shape having a convex rounded shape.
    Type: Application
    Filed: February 14, 2003
    Publication date: August 7, 2003
    Inventors: Norio Suzuki, Hiroyuki Ichizoe, Masayuki Kojima, Keiji Okamoto, Shinichi Horibe, Kozo Watanabe, Yasuko Yoshida, Shuji Ikeda, Akira Takamatsu, Norio Ishitsuka, Atsushi Ogishima, Maki Shimoda
  • Patent number: 6596434
    Abstract: A cylindrical type alkaline storage battery includes a metallic case, a sealing plate for the metallic case, and a spiral-shaped group of electrodes. The group of electrodes includes a positive electrode plate, a negative electrode plate and a separator. The sealing plate includes a cap-shaped terminal plate, which includes a cap part and a flange, and a disc-shaped filter on the underside of the flange. The disc shaped filter has a gas venting hole in its center. A safety valve is included between the flange and the filter. A space between the metallic case and the rims of the flange and of the filter is sealed with a gasket.
    Type: Grant
    Filed: January 19, 2001
    Date of Patent: July 22, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeshi Yoshinaka, Norio Suzuki, Hideo Kaiya
  • Publication number: 20030119276
    Abstract: A semiconductor device having a highly reliable groove isolation structure with a desired radius of curvature formed at the groove upper edge and without formation of any step, there is produced by reducing the stress generation around the groove upper edge of an element isolation groove on a semiconductor substrate, thereby optimizing the shape of an element isolation groove and making the device finer and improving the device electric characteristics.
    Type: Application
    Filed: May 6, 2002
    Publication date: June 26, 2003
    Inventors: Norio Ishitsuka, Hideo Miura, Shuji Ikeda, Norio Suzuki, Yasushi Matsuda, Yasuko Yoshida, Hirohiko Yamamoto, Masamichi Kobayashi, Akira Takamatsu, Hirofumi Shimizu, Kazushi Fukuda, Shinichi Horibe, Toshio Nozoe
  • Publication number: 20030107876
    Abstract: A structure for highly precisely and easily mounting an electronic circuit unit on a mother board without defective soldering, comprising a circuit board 3 provided with extending portions 3d having terminal patterns 8 formed thereon, a housing 2 for containing the circuit board 3 while permitting the extending portions 3d to protrude, and a mother board 5 having, formed therein, through holes 5a in which the extending portions 3d are to be inserted, having, formed thereon, wiring pattern (not shown) that is to be electrically connected to the terminal patterns 8, and permitting the extending portions 3d to be inserted in the through holes 5a so that the housing 2 is placed thereon. The circuit board 3 is provided with a protruded portion 3e which extends separately from the extending portions 3d and pushes the terminal patterns 8 onto the wiring pattern of the mother board 5.
    Type: Application
    Filed: December 5, 2002
    Publication date: June 12, 2003
    Applicant: Alps Electric Co., Ltd.
    Inventor: Norio Suzuki
  • Publication number: 20030107685
    Abstract: In a tuner unit, a metal shielding plate standing upright on a circuit board is provided between circuit blocks formed on the circuit board so as to electrically shield the circuit blocks from each other. A metal bridge that connects the shielding plate and a frame is provided between some circuit blocks and at a distance from the circuit board so that an electrical component can be mounted on a portion of the circuit board opposing the bridge. This makes it possible to reduce the mounting space for the electrical component and to achieve a small tuner unit.
    Type: Application
    Filed: December 3, 2002
    Publication date: June 12, 2003
    Applicant: Alps Electric Co., Ltd.
    Inventors: Masahiro Wakamori, Norio Suzuki
  • Publication number: 20030094157
    Abstract: There is provided a power output control system for an internal combustion engine, which enables the vehicle to smoothly perform refuge travel to find a place to park when an electric throttle control device becomes incapable of controlling a throttle valve, while ensuring adequate traveling performance. An ECU determines whether or not the electric throttle control device is incapable of controlling the throttle valve, and interrupts energization of the electric throttle control device when it is determined that the electric throttle control device is incapable of controlling the throttle valve. At this time, the opening of the throttle valve is held at the default opening degree by a spring. Further, basic ignition timing is calculated according to the engine rotational speed and load on the engine, and ignition timing of the engine is determined by correcting the calculated basic ignition timing according to the amount of operation of the accelerator pedal.
    Type: Application
    Filed: November 20, 2002
    Publication date: May 22, 2003
    Applicant: HONDA GIKEN KOGYO KABUSHIKI KAISHA
    Inventors: Yosuke Tachibana, Norio Suzuki, Manabu Niki
  • Publication number: 20030093191
    Abstract: There is provided a control system for a vehicle, which enables the vehicle to smoothly travel only to find a place to park when an electric throttle control device is in a condition incapable of controlling a throttle valve, thereby improving drivability. An ECU determines whether or not the electric throttle control device is in the condition incapable of controlling the throttle valve, and interrupts energization of the electric throttle control device when it is determined that the electric throttle control device is in the condition incapable of controlling the throttle valve. The throttle valve is held at a default opening position by a spring when the electric throttle control device is determined to be in the condition incapable of controlling the throttle valve. A throttle valve opening sensor detects a degree of opening of the throttle valve.
    Type: Application
    Filed: November 14, 2002
    Publication date: May 15, 2003
    Applicant: HONDA GIKEN KOGYO KABUSHIKI KAISHA
    Inventors: Yosuke Tachibana, Norio Suzuki, Manabu Niki
  • Patent number: 6562695
    Abstract: Grooves are defined in a substrate having device isolation regions by dry etching using silicon nitride films and side wall spacers as masks. Thereafter, the side wall spacers lying on side walls of the silicon nitride films are removed and the substrate is subjected to thermal oxidation, whereby the surface of the substrate at a peripheral portion of each active region is subjected to so-called round processing so as to have a sectional shape having a convex rounded shape.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: May 13, 2003
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Norio Suzuki, Hiroyuki Ichizoe, Masayuki Kojima, Keiji Okamoto, Shinichi Horibe, Kozo Watanabe, Yasuko Yoshida, Shuji Ikeda, Akira Takamatsu, Norio Ishitsuka, Atsushi Ogishima, Maki Shimoda
  • Patent number: 6559027
    Abstract: A semiconductor device having a highly reliable groove isolation structure with a desired radius of curvature formed at the groove upper edge and without formation of any step, there is produced by reducing the stress generation around the groove upper edge of an element isolation groove on a semiconductor substrate, thereby optimizing the shape of an element isolation groove and making the device finer and improving the device electric characteristics.
    Type: Grant
    Filed: May 1, 2001
    Date of Patent: May 6, 2003
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Norio Ishitsuka, Hideo Miura, Shuji Ikeda, Norio Suzuki, Yasushi Matsuda, Yasuko Yoshida, Hirohiko Yamamoto, Masamichi Kobayashi, Akira Takamatsu, Hirofumi Shimizu, Kazushi Fukuda, Shinichi Horibe, Toshio Nozoe
  • Patent number: 6559012
    Abstract: A method for manufacturing a semiconductor integrated circuit device including a first field effect transistor having a gate insulating film formed over a first element forming region of a main surface of a semiconductor substrate; and a second field effect transistor having a gate insulating film formed over a second element forming region of the main surface of the semiconductor substrate and made thinner than the gate insulating film of the first field effect transistor.
    Type: Grant
    Filed: September 25, 2001
    Date of Patent: May 6, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Shoji Shukuri, Norio Suzuki, Yasuhiro Taniguchi
  • Patent number: 6544839
    Abstract: A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: April 8, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kenji Kanamitsu, Kouzou Watanabe, Norio Suzuki, Norio Ishitsuka
  • Publication number: 20030038337
    Abstract: A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion.
    Type: Application
    Filed: October 15, 2002
    Publication date: February 27, 2003
    Inventors: Kenji Kanamitsu, Kouzou Watanabe, Norio Suzuki, Norio Ishitsuka
  • Patent number: 6513321
    Abstract: In an exhaust gas purifying apparatus of the present invention, oxygen sensors 18 and 20 are respectively located upstream, a close coupled three-way catalyst 14 positioned at the upstream end of an exhaust system, and downstream, in a under floor three-way catalyst 17 positioned at the downstream end. When an output VO2 of the oxygen sensor 20 exceeds a predetermined voltage VO2H2, the first correction coefficient KCMDLS is calculated in accordance with the output VO2 (S12 and S13). And when VO2≦VO2H2 is established, in accordance with the engine operating state the second correction coefficient KVMDR is set to a predetermined value KVMDR0 that is slightly greater than 1.0 (S16 to S18), and the target air-fuel ratio coefficient KCMD is corrected by using the correction coefficients KCMDLS and KCMDR (S21).
    Type: Grant
    Filed: December 12, 2000
    Date of Patent: February 4, 2003
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Norio Suzuki, Toru Kitamura
  • Publication number: 20030021937
    Abstract: The present invention provides a heat-insurating structure using a fluff-like heat-insulating material such as cellulose insulation fibers, capable of allowing convenient handling and preventing a so-called settling-down phenomenon in which the top of the heat-insulating material will settle down with time. The heat-insulating structure comprises a plurality of strap-shaped partition members 2 arranged to define an array of heat-insulating segments therebetween, and cellulose insulation fibers filled in each of the heat-insulating segments. A surface member 3 such as an underlying member or a facing member may be adhesively attached to the exposed surface of the interleaved structure of the partition members and the heat-insulating segments filled with the cellulose insulation fibers to provide a discrete heat-insulating panel.
    Type: Application
    Filed: July 25, 2002
    Publication date: January 30, 2003
    Applicant: Hikari Toshi Sougou Sekkei
    Inventor: Norio Suzuki
  • Patent number: 6510165
    Abstract: A service identification adding portion adds service identification information to a cell corresponding to each connection that uses a predetermined communication service (ABR service) and that is input to a switch system. A connection number counting portion counts the number of connections that use the communication service on each output line at predetermined intervals. A band control information generating portion generates band control information corresponding to each output line at predetermined intervals based on the number of connections counted at predetermined intervals. A band control information indicating portion sends band control information at predetermined intervals corresponding to each output line to a transmission side terminal corresponding to a connection that uses the communication service on each output line.
    Type: Grant
    Filed: April 2, 1996
    Date of Patent: January 21, 2003
    Assignee: Fujitsu Limited
    Inventors: Shiro Uriu, Norio Suzuki, Noriko Samejima