Patents by Inventor Noriyoshi Shimizu

Noriyoshi Shimizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9545016
    Abstract: A wiring substrate includes an insulating layer, and a connection terminal formed on the insulating layer. The connection terminal includes a metal layer formed on the insulating layer and including an upper surface, a metal post formed on the upper surface of the metal layer and including upper and side surfaces, and a surface plating layer that covers the upper and side surfaces of the metal post. The metal layer includes a material that is inactive with respect to a material included in the surface plating layer. The metal layer has an upper surface edge part that is exposed at an outside from the side surface of the metal post in a plan view. The surface plating layer is formed to expose the upper surface edge part of the metal layer.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: January 10, 2017
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kei Imafuji, Noriyoshi Shimizu, Kiyoshi Ol, Hiromu Arisaka
  • Publication number: 20160371593
    Abstract: An inferrer calculates, for each kind of living activities, an occurrence probability defining a probability that a corresponding living activity occurs, based on an operational state of an electric appliance determined by a detector for each of sections at an inference target time by use of prior probabilities, first conditional probabilities, and second conditional probabilities, and infers that a living activity having a highest occurrence probability has occurred at inference target time. Prior probabilities each define a probability at which a corresponding living activity occurs in one day. First conditional probabilities each define active and inactive probabilities of electric appliance belonging to a corresponding section under a condition where a corresponding living activity occurs.
    Type: Application
    Filed: February 12, 2015
    Publication date: December 22, 2016
    Inventors: Takashi NISHIYAMA, Noriyoshi SHIMIZU, Tomohiko FUJITA, Tomoharu NAKAHARA
  • Publication number: 20160366496
    Abstract: A receiver acquires power values respectively consumed through two or more branch circuits. A first memory stores power information in association with relevant information that relates to the power information. The power information includes date and time, and a power value corresponding to each branch circuit. A feature extractor extracts a feature value in the power information of each branch circuit. A rule extractor sets the relevant information to an explanatory condition for a change in the feature value, and extracts a rule for deriving the feature value from the explanatory condition. A predictor, when a target value is set to the building for power saving in an object period, acquires the relevant information in the object period, and applies the rule to the relevant information acquired so as to predict the feature value corresponding to each branch circuit in the object period.
    Type: Application
    Filed: October 20, 2014
    Publication date: December 15, 2016
    Inventors: Takashi NISHIYAMA, Noriyoshi SHIMIZU, Tomoharu NAKAHARA, Sho IKEMURA
  • Patent number: 9520352
    Abstract: A wiring board includes a first wiring layer, a first insulating layer, first via wirings, connection terminals and a protection layer. The first insulating layer is formed with through holes. The first via wirings are formed in the through holes. The connection terminals are electrically connected to the first wiring layer through the first via wirings. The connection terminals protrude upward from the first insulating layer. The protection layer is made of insulating resin which contains photosensitive resin as a main component. The protection layer is formed on an upper surface of the first insulating layer. The protection layer includes first and second protection layers. The first protection layer surrounds the connection terminals. The second protection layer is separated from the first protection layer. The second protection layer is thinner than the first protection layer.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: December 13, 2016
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Hiromu Arisaka, Noriyoshi Shimizu, Toshinori Koyama, Akio Rokugawa
  • Publication number: 20160353569
    Abstract: A wiring substrate includes a core layer having a penetrating hole, a first insulating layer disposed on a first surface of the core layer and having a first opening at a position of the penetrating hole, the first insulating layer containing no filler, a penetrating electrode disposed in the penetrating hole and in the first opening, and a first wiring layer laminated both on the first insulating layer at a first surface thereof facing away from the core layer and on an end face of the penetrating electrode, wherein the first surface of the first insulating layer and the end face of the penetrating electrode are planarized.
    Type: Application
    Filed: May 19, 2016
    Publication date: December 1, 2016
    Inventors: Jun FURUICHI, Noriyoshi SHIMIZU
  • Publication number: 20160348239
    Abstract: To form a film by generating molecular species which can react at a low temperature, especially, 100° C. or less at which a substrate is not deformed or altered. In a heat beam heating device which instantaneously heats a source gas to a high temperature to cause the source gas to collide with a metal wall including a catalytic function, activated molecular species are generated by a nonequilibrium reaction, sprayed on, and brought into contact with a substrate to form a film.
    Type: Application
    Filed: September 15, 2015
    Publication date: December 1, 2016
    Inventors: Yuji FURUMURA, Noriyoshi SHIMIZU, Shinji NISHIHARA
  • Patent number: 9455219
    Abstract: A wiring substrate includes, a base wiring substrate including a first wiring layer, a first insulating layer in which the first wiring layer is buried and a first via hole is formed under the first wiring layer, and a second wiring layer formed under the first insulating layer and connected to the first wiring layer through the first via hole, and a re-wiring portion including a second insulating layer formed on the base wiring substrate and having a second via hole formed on the first wiring layer, and a re-wiring layer formed on the second insulating layer and connected to the first wiring layer through the second via hole. The re-wiring layer is formed of a seed layer and a metal plating layer provided on the seed layer, and the seed layer is equal to or wider in width than the metal plating layer.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: September 27, 2016
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Noriyoshi Shimizu, Wataru Kaneda, Akio Rokugawa, Toshinori Koyama
  • Publication number: 20160276259
    Abstract: A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval, a metal plane layer formed on a portion of a first insulation layer formed on the first wiring layer, the first wiring part being located below the portion, a second insulation layer formed on the first insulation layer and the metal plane layer and having a first via hole and a second via hole, a second wiring layer formed on the second insulation layer and connected to the first wiring layer via a first via conductor formed in the first via hole, and a third wiring layer formed on the second insulation layer and connected to the metal plane layer via a second via conductor formed in the second via hole.
    Type: Application
    Filed: June 1, 2016
    Publication date: September 22, 2016
    Inventors: Yuji Kunimoto, Jun Furuichi, Noriyoshi Shimizu, Naoyuki Koizumi
  • Patent number: 9412687
    Abstract: A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval, a metal plane layer formed on a portion of a first insulation layer formed on the first wiring layer, the first wiring part being located below the portion, a second insulation layer formed on the first insulation layer and the metal plane layer and having a first via hole and a second via hole, a second wiring layer formed on the second insulation layer and connected to the first wiring layer via a first via conductor formed in the first via hole, and a third wiring layer formed on the second insulation layer and connected to the metal plane layer via a second via conductor formed in the second via hole.
    Type: Grant
    Filed: June 9, 2015
    Date of Patent: August 9, 2016
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuji Kunimoto, Jun Furuichi, Noriyoshi Shimizu, Naoyuki Koizumi
  • Patent number: 9380707
    Abstract: A method of manufacturing a wiring substrate includes: preparing a laminated plate of a metal layer and an insulating layer; adhering the laminated plate to a first support body facing the metal layer; and forming a first wiring layer with vias extending through the insulating layer and first pads exposed from a first surface of the insulating layer. The method also includes: separating a multilayer structure including the metal, insulating, and first wiring layer from the first support body; adhering the multilayer structure to a second support body facing the first wiring layer; removing the metal layer; forming a plurality of second wiring layers including second pads connected to the vias and exposed from a second surface of the insulating layer opposite the first surface; and separating the insulating, the first wiring, and the plurality of second wiring layers from the second support body, to obtain the wiring substrate.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: June 28, 2016
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Noriyoshi Shimizu, Akio Rokugawa, Toshinori Koyama, Wataru Kaneda
  • Publication number: 20160172287
    Abstract: A wiring board includes a first wiring layer, a first insulating layer, first via wirings, connection terminals and a protection layer. The first insulating layer is formed with through holes. The first via wirings are formed in the through holes. The connection terminals are electrically connected to the first wiring layer through the first via wirings. The connection terminals protrude upward from the first insulating layer. The protection layer is made of insulating resin which contains photosensitive resin as a main component. The protection layer is formed on an upper surface of the first insulating layer. The protection layer includes first and second protection layers. The first protection layer surrounds the connection terminals. The second protection layer is separated from the first protection layer. The second protection layer is thinner than the first protection layer.
    Type: Application
    Filed: December 8, 2015
    Publication date: June 16, 2016
    Inventors: Hiromu Arisaka, Noriyoshi Shimizu, Toshinori Koyama, Akio Rokugawa
  • Publication number: 20160174379
    Abstract: A wiring board includes plural terminals, an insulating layer, and recess portions. Each terminal includes a roughened upper surface and a roughened side surface. The insulating layer is formed between the terminals. The upper surfaces of the terminals are exposed. An upper surface of the insulating layer is a concave curved surface. The recess portions are formed in the insulating layer around the terminals so as to partially expose the side surfaces of the terminals.
    Type: Application
    Filed: December 8, 2015
    Publication date: June 16, 2016
    Inventors: Noriyoshi Shimizu, Hiromu Arisaka, Akio Rokugawa, Toshinori Koyama
  • Patent number: 9340736
    Abstract: A solid gasification apparatus includes a reaction chamber thermally insulated by a heat insulating material, a heat beam fluid heat exchange apparatus that produces a first heated gas and a second heated gas, and a unit that includes a gas flow path. The unit sprays the first heated gas against a material solid in a reaction chamber to heat the material solid, and, simultaneously, makes the material solid react with the first heated gas to produce a produced gas containing the element of the material solid. The unit makes a second heated gas contact and react with the produced gas.
    Type: Grant
    Filed: April 6, 2015
    Date of Patent: May 17, 2016
    Assignee: PHIL TECH Inc.
    Inventors: Yuji Furumura, Naomi Mura, Shinji Nishihara, Noriyoshi Shimizu
  • Patent number: 9332658
    Abstract: A wiring board includes first and second insulating layers, first and second through holes, a via, a plane layer, and signal wirings. The first insulating layer covers a first wiring layer. The first through hole opens on a surface of the first insulating layer and exposes a surface of the first wiring layer. The via fills the first through hole. The plane layer is connected to the via and is stacked on the first insulating layer. The second through hole opens on a surface of the plane layer and exposes the surface of the first insulating layer. The second insulating layer at least partially fills the second through hole and covers the plane layer. The signal wirings are stacked on the second insulating layer. The first through hole overlaps the signal wirings in a plan view. The second through hole does not overlap the signal wirings in a plan view.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: May 3, 2016
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuji Kunimoto, Noriyoshi Shimizu
  • Publication number: 20160107891
    Abstract: To generate hydrogen having a carbon monoxide concentration of 0.1% or less by reacting a hydrogen carbide and water with each other without using a platinum catalyst. A gas generating apparatus includes a gas instantaneously-heating mechanism that instantaneously heats a source gas and a catalyst vessel that is connected to the gas instantaneously-heating mechanism and contains a catalyst, a high-temperature heated source gas beam generated by the gas instantaneously-heating mechanism being caused to collide with the catalyst to generate a gas. More specifically, a source gas containing a hydrogen carbide and water is instantaneously heated to a high temperature, and a source gas beam is caused to collide with the catalyst. Heat of the source gas is transmitted to a catalyst surface because of the absence a stagnation layer, and nonequilibrium reaction efficiently proceeds on the catalyst. Hydrogen can be extracted with a low-price catalyst made of ruthenium.
    Type: Application
    Filed: September 16, 2015
    Publication date: April 21, 2016
    Inventors: Yuji FURUMURA, Noriyoshi SHIMIZU, Shinji NISHIHARA
  • Patent number: 9257386
    Abstract: A wiring substrate includes first and second wiring structures. The first wiring structure includes a core substrate, first and second insulation layers each formed from a thermosetting insulative resin including a reinforcement material, and a via wire formed in the first insulation layer. The second wiring structure includes a wiring layer formed on upper surfaces of the first insulation layer and the via wire, an insulation layer formed on the upper surface of the first insulation layer, and an uppermost wiring layer including a pad used to electrically connect a semiconductor chip and the wiring layer. An outermost insulation layer stacked on a lower surface of the second insulation layer exposes a portion of a lowermost wiring layer stacked on the lower surface of the second insulation layer as an external connection pad. The second wiring structure has a higher wiring density than the first wiring structure.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: February 9, 2016
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Hiromu Arisaka, Noriyoshi Shimizu, Masato Tanaka, Tetsuya Koyama, Akio Rokugawa
  • Publication number: 20160020163
    Abstract: A wiring substrate includes a first wiring structure and a second wiring structure. The first wiring structure includes a first insulating layer, which covers a first wiring layer, and a via wiring. A first through hole of the first insulating layer is filled with the via wiring. The second wiring structure includes a second wiring layer and a second insulating layer. The second wiring layer is formed on an upper surface of the first insulating layer and an upper end surface of the via wiring. The second wiring layer partially includes a roughened surface. The second insulating layer is stacked on the upper surface of the first insulating layer and covers the second wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The roughened surface of the second wiring layer has a smaller surface roughness than the first wiring layer.
    Type: Application
    Filed: July 6, 2015
    Publication date: January 21, 2016
    Inventors: Noriyoshi SHIMIZU, Yusuke GOZU, Jun FURUICHI, Akio ROKUGAWA, Takashi Ito
  • Publication number: 20160007460
    Abstract: A wiring substrate includes a core layer, a first wiring layer, a first insulating layer, a first via wiring, a second wiring layer, a second insulating layer, a second via wiring, a third wiring layer, a third insulating layer, a third via wiring, and a through-wiring. The through-wiring includes upper and lower end surfaces. The upper end surface has an area that is smaller than an area of the lower end surface. The upper surface of the first insulating layer is more flat than the lower surface of the third insulating layer. The second wiring layer has a wiring density that is higher than a wiring density of the first wiring layer.
    Type: Application
    Filed: July 2, 2015
    Publication date: January 7, 2016
    Inventors: Noriyoshi SHIMIZU, Yusuke GOZU, Akio ROKUGAWA
  • Patent number: 9220167
    Abstract: A wiring substrate includes a first wiring structure, a second wiring structure stacked on an upper surface of the first wiring structure, and an outermost insulating layer stacked on a lower surface of the first wiring structure. The outermost insulating layer covers a part of a bottom wiring layer of the wiring layers forming the first wiring structure. The second wiring structure has a wiring density higher than that of the first wiring structure. A volume ratio V1/V2 is from 0.8 to 1.5, where V1 represents the volume of the wiring layers forming the entire second wiring structure, and V2 represents the volume of the bottom wiring layer in the first wiring structure.
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: December 22, 2015
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Noriyoshi Shimizu, Masato Tanaka, Toshinori Koyama, Akio Rokugawa
  • Publication number: 20150364405
    Abstract: A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval, a metal plane layer formed on a portion of a first insulation layer formed on the first wiring layer, the first wiring part being located below the portion, a second insulation layer formed on the first insulation layer and the metal plane layer and having a first via hole and a second via hole, a second wiring layer formed on the second insulation layer and connected to the first wiring layer via a first via conductor formed in the first via hole, and a third wiring layer formed on the second insulation layer and connected to the metal plane layer via a second via conductor formed in the second via hole.
    Type: Application
    Filed: June 9, 2015
    Publication date: December 17, 2015
    Inventors: Yuji Kunimoto, Jun Furuichi, Noriyoshi Shimizu, Naoyuki Koizumi