Patents by Inventor Noriyuki Ito

Noriyuki Ito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5998016
    Abstract: A spin valve effect MR sensor includes a spin valve effect multi-layered structure. This structure has a first thin film layer of ferromagnetic material with one and the other surfaces, a second thin film layer of ferromagnetic material with one and the other surfaces, a thin film spacer layer of nonmagnetic conductive material deposited between the one surfaces of the first and second ferromagnetic material layers, a thin film layer of anti-ferromagnetic material deposited on the other surface of the second ferromagnetic material layer, for pinning the second ferromagnetic material layer, a thin film layer of anti-diffusion material deposited on the other surface of the first ferromagnetic material layer, and a thin film current bypass layer of nonmagnetic conductive material deposited on the thin film anti-diffusion material layer.
    Type: Grant
    Filed: January 13, 1998
    Date of Patent: December 7, 1999
    Assignee: TDK Corporation
    Inventors: Tetsuro Sasaki, Noriyuki Ito
  • Patent number: 5913515
    Abstract: This invention relates to game machine apparatus having a display device and generating a special condition. In one embodiment, a game machine that varies the display content on a display device provided on a panel thereof, and generates a special condition advantageous to a player when a display result matches a predetermined condition, includes a display manager, a control device, and a special condition generating device. The display manager advances a special game and displays a successively-varying game while no pinball driven onto a panel of the game machine enters a special prize-winning port. The control device executes a one unit game from the current state of the proceeding game series and displays an execution result of the one unit game on the display device when a pinball driven onto the panel of the game machine enters the special prize-winning port.
    Type: Grant
    Filed: October 10, 1997
    Date of Patent: June 22, 1999
    Assignee: Kabushiki Kaisha Ace Denken
    Inventors: Takatoshi Takemoto, Noriyuki Ito
  • Patent number: 5889677
    Abstract: A circuit designing apparatus of an interactive type which enables a simplified and high-speed circuit design process while largely reducing a burden on a designer, having a speed analyzing unit for conducting a delay computation for each wiring path on a circuit to be designed and a display control unit for displaying a result of the delay computation by the speed analyzing unit on a display unit. When the speed analyzing unit conducts a delay computation, a delay value of each logic component forming the circuit that is an object of the design is set and altered according to a dullness of a signal waveform inputted to the logic component. The circuit designing apparatus of an interactive type may be applied to a system for conducting a circuit design of an integrated circuit such as an LSI or the like or a printed circuit board.
    Type: Grant
    Filed: December 19, 1995
    Date of Patent: March 30, 1999
    Assignee: Fujitsu Limited
    Inventors: Mitsuru Yasuda, Hiroyuki Sugiyama, Noriyuki Ito, Ryoichi Yamashita, Tadashi Konno, Yasunori Abe, Naomi Bizen, Terunobu Maruyama, Yoshiyuki Kato, Tomoyuki Isomura, Hiroshi Ikeda, Miki Takagi
  • Patent number: 5889682
    Abstract: A clock routing design method enables a routing design for each hierarchy while paying an attention to each layout hierarchy to which a branch of a clock signal system extends and considering a whole chip. In the clock routing design method, a clock signal line is routed between a plurality of receiver terminals over a plurality of layout hierarchies while considering an equal-delay branch point yielding equal delays of a clock signal at the receiver terminals, the clock signal line is then routed between the equal-delay branch point positioning between the plural receiver terminals and the driver terminal. The clock routing design method is applicable to a layout design of wire patterns, cell, etc. on LSIs, printed circuit boards and the like.
    Type: Grant
    Filed: October 16, 1997
    Date of Patent: March 30, 1999
    Assignee: Fujitsu Limited
    Inventors: Masayuki Omura, Noriyuki Ito
  • Patent number: 5787268
    Abstract: The invention provides an interactive circuit designing apparatus wherein a logic design, a layout design and a speed analysis can cooperate with each other in processing. The interactive circuit designing apparatus comprises a logical designing section for logically designing a design object circuit, a layout designing section for performing mounting arrangement of logical components constituting a design object circuit based on a result of the logical design and performing wiring between the logical components, and a speed analysis section for performing a speed analysis based on calculation of a delay for each of paths on the design object circuit in accordance with a result of the layout. The logical designing section, the layout designing section and the speed analysis section are connected to each other so as to cooperate with each other when necessary. The interactive circuit designing apparatus is applied to an apparatus for designing a circuit of an LSI, a printed circuit board or a like element.
    Type: Grant
    Filed: June 30, 1995
    Date of Patent: July 28, 1998
    Assignee: Fujitsu Limited
    Inventors: Yaroku Sugiyama, Hiroyuki Sugiyama, Noriyuki Ito, Ryouichi Yamashita, Terunobu Maruyama, Yasunori Abe
  • Patent number: 5768065
    Abstract: A thin film magnetic head having a slider and a magnetic transducing element for reading, wherein the slider is provided with an air bearing surface; the magnetic transducing element for reading includes conductor films, a magnetoresistive element and magnetic shield films and is provided on the slider; the conductor films are composed of two conductor films contiguously arranged interposing a first spacing and a second spacing, the first spacing being disposed on the side of the air bearing surface specifying a track width, the second spacing being disposed on the backward side of the first spacing; the magnetoresistive element is connected between the first and the second conductor films crossing the first spacing; the magnetic shield films include a lower magnetic shield film and an upper shield film, the lower magnetic shield film being located on the lower side of the conductor films and the magnetoresistive element and the upper magnetic shield film being located on the upper side of the conductor films
    Type: Grant
    Filed: June 1, 1994
    Date of Patent: June 16, 1998
    Assignee: TDK Corporation
    Inventors: Noriyuki Ito, Yuzuru Iwai, Mikio Matsuzaki, Junichi Sato
  • Patent number: 5610830
    Abstract: An automatic generation system of an additional circuit provided in a logic circuit design support system includes: a new distributing point extracting unit for extracting points which distribute signals applied by the additional circuit, from data of new logic circuit before new additional circuit is connected; an old distributing point extracting unit for extracting points which distribute signals applied by the additional circuit, from data of old logic circuit before design change; a distributing point comparing unit for comparing distributing points of the new logic circuit with distributing points of the old logic circuit; a connection point corresponding unit for corresponding connections of the additional circuit to the distributing points of the old logic circuit, and connections of the additional circuit to the distributing points of the new logic circuit, regarding the distributing points which coincide between the new and old logic circuit; an additional circuit changing unit for changing a part o
    Type: Grant
    Filed: April 13, 1994
    Date of Patent: March 11, 1997
    Assignee: Fujitsu Limited
    Inventors: Noriyuki Ito, Etsuko Mizukami
  • Patent number: 5019452
    Abstract: Thermal transfer material which is adopted for use in transferring an image of high resistances to wear, water and chemicals on a plastic base such as pre-paid card, coupon card and the like. The thermal transfer material comprises a heat-resistant support and a thermal transfer recording layer stacked on the support. The thermal transfer recording layer comprises a coloring agent, a hot-melt material comprising a thermoplastic resin having a glass transition point of 50 to 110.degree. C., and a lubricant. There is also proposed a recording material adopted for use in combination with the thermal transfer material. The recording material comprises a support and an image-receiving layer formed on the support and comprising a lubricating agent and a thermoplastic resin having a glass transition point of 50.degree. to 110.degree. C. A method of transfer-recording using the thermal transfer material and the recording material is also proposed.
    Type: Grant
    Filed: June 6, 1990
    Date of Patent: May 28, 1991
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Niro Watanabe, Masato Yoshida, Noriyuki Ito