Patents by Inventor - OMKAR

- OMKAR has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136292
    Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.
    Type: Application
    Filed: December 29, 2023
    Publication date: April 25, 2024
    Inventors: Omkar G. Karhade, Edvin Cetegen, Anurag Tripathi, Nitin A. Deshpande
  • Patent number: 11960483
    Abstract: A data structure is specialized in efficiently representing a key-value pair in a highly optimized way. The data structure is a pointer in a traversal graph that takes advantage of constant time traversal for all operations. The data structure has specific instructions for inserting data nodes, router nodes, and how the expansion or collapse of the graph works. The data structure can be applied where the time to get the result back is most prominent. The data structure can be used to reduce the memory footprint to reach the data that is being searched and achieve a worst-case time complexity in constant time.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: April 16, 2024
    Assignee: Wells Fargo Bank, N.A.
    Inventors: Gaurav Chhabra, Anil Kumar Omkar, Shreeya Sengupta, Gaurav Wadhwa
  • Publication number: 20240120302
    Abstract: An electronic device includes first and second external conductive pads coupled to route a first signal and third and fourth external conductive pads. The third and the fourth external conductive pads are between the first and the second external conductive pads on a surface of the electronic device.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Applicant: Intel Corporation
    Inventors: Krishna Bharath Kolluru, Atul Maheshwari, Mahesh Kumashikar, Md Altaf Hossain, Ankireddy Nalamalpu, Omkar Karhade
  • Publication number: 20240119334
    Abstract: A method for linear optical quantum computing includes configuring at least two first Greenberger-Horne-Zeilinger (GHZ) states consisting of three photons; configuring at least one second GHZ state consisting of four or more photons by firstly combining the at least two first GHZ states; generating at least one microcluster; forming a plurality of star clusters consisting of four side qubits around the central qubit; configuring Raussendorf-Harringon-Goyal (RHG) lattice by using the plurality of star clusters; and measuring at least one central qubit of the RHG lattice.
    Type: Application
    Filed: December 5, 2022
    Publication date: April 11, 2024
    Inventors: Hyunseok Jeong, Seok-Hyung Lee, Yong Siah Teo, Srikrishna Omkar
  • Patent number: 11954345
    Abstract: A system and method for two-level indexing for key-value persistent storage. The method may include: sorting two or more key-value pairs to form a sorted key-value pair set; determining an address of a first key-value pair of the key-value pairs, the first key-value pair including a first key and a first value; determining an address of a second key-value pair of the key-value pairs, the second key-value pair including a second key and a second value; and training a first linear regression model to generate a first line corresponding to the key-value pairs, the training including training the first linear regression model with key-value pairs including the first key-value pair and the second key-value pair.
    Type: Grant
    Filed: February 9, 2022
    Date of Patent: April 9, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Omkar Desai, Changho Choi, Yangwook Kang
  • Publication number: 20240113088
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed includes an integrated circuit (IC) package including a first die including a first surface and a second surface opposite the first surface, the first surface defined by a bulk semiconductor region of the first die, a second die including a third surface and a fourth surface opposite the third surface, the third surface defined by a bulk semiconductor region of the second die, the fourth surface facing towards the second surface, a first bonding layer between the second and fourth surfaces, the first bonding layer including first metal vias disposed therein, and a second bonding layer between the second and fourth surfaces, the second bonding layer including second metal vias disposed therein, the first bonding layer in direct contact with the second bonding layer, ones of the first metal vias in direct contact with ones of the second metal vias to electrically couple the first die to the second die.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Inventors: Omkar Karhade, Nitin Deshpande, Harini Kilambi, Jagat Shakya, Debendra Mallik
  • Publication number: 20240109037
    Abstract: Liquid solution separation (e.g., concentration and/or desalination) methods and related systems involving membrane separators having at least one-semipermeable membrane are provided. In some instances, at least some of the membrane separators permit a portion of solute in a retentate side input stream to pass through the semi-permeable membrane. In some instances, multiple membrane separators are employed, with the membrane separators having different solute permeabilities (e.g., due to varying pore size and/or molecular weight cutoffs). The methods and systems may be configured such that the ratio of mass flow and/or concentration of solute entering the retentate sides of the membrane separators are relatively high compared to the mass flow and/or concentration of solute exiting the retentate sides of the membrane separators.
    Type: Application
    Filed: May 10, 2023
    Publication date: April 4, 2024
    Applicant: Gradiant Corporation
    Inventors: Omkar Lokare, Richard Stover, Looh Tchuin Choong, Kurt Blohm, Ana Claudia Emerenciano Guedes
  • Patent number: 11947581
    Abstract: A plurality of personalized news feeds are generated from input feeds including digital content items based on a dynamic taxonomy data structure. Entities are extracted from the input feeds and relationship strengths are obtained for the extracted entities and the digital content items. The dynamic taxonomy data structure is updated with the extracted entities and entries for the digital content news items are included at the corresponding branches based on the relationship strengths. Attributes are obtained for the entities and those entities corresponding to the trending topics are identified. Personalized news feeds are generated including the digital content items listed under the entities. Digital content items are added or removed from the digital content feeds based on one or more entity attributes.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: April 2, 2024
    Assignee: ACCENTURE GLOBAL SOLUTIONS LIMITED
    Inventors: Srikanth G Rao, Tarun Singhal, Mathangi Sandilya, Issac Abraham Alummoottil, Raja Sekhar Velagapudi, Rahel James Kale, Ankur Garg, Jayaprakash Nooji Shekar, Omkar Sudhakar Deorukhkar, Veera Raghavan Valayaputhur
  • Patent number: 11948019
    Abstract: An interruption-handling setting for a category of interactions of an application is determined via a programmatic interface. A set of user-generated input is obtained while presentation to a user of a set of output of the category is in progress. A response to the set of user-generated input is prepared based at least in part on the interruption-handling setting.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: April 2, 2024
    Assignee: Amazon Technologies, Inc.
    Inventors: Swapandeep Singh, Minaxi Singla, Kartik Rustagi, Omkar Prakash Kurode, Gouthamamani Venkatesan, Ajay Bhaskar Medury, Lefan Zhang, Haiyang Sun, Rama Krishna Sandeep Pokkunuri, Sai Madhu Bhargav Pallem, Harshal Pimpalkhute
  • Publication number: 20240092551
    Abstract: A polymeric container including a finish defining an opening of the container, a base, and a body. The body is between the finish and the base. The body includes a flexible panel extending entirely around the container A longitudinal axis of the container extends through an axial center of the finish, the base, the body, and the flexible panel. The flexible panel includes alternating concave portions and vertically extending columns arranged about the flexible panel. In response to a vacuum within the container resulting from filling and capping the container, the concave portions are configured to flex inward towards the longitudinal axis to become more concave, and the vertically extending columns are configured to flex outward away from the longitudinal axis of the container.
    Type: Application
    Filed: December 16, 2020
    Publication date: March 21, 2024
    Inventors: John SICILIANO, Tyler M. NUNNOLD, Michael T. LANE, James STELZER, Omkar DOLE
  • Publication number: 20240098825
    Abstract: Systems and methods manage data traffic by converging a mobile network operator (MNO) core network with a multiple-system operator (MSO) core network (e.g., a Hybrid-Mobile Virtual Network Operator (H-MVNO) core network). The system architecture includes one or more standards-based inter-network interfaces (e.g., as defined by Third Generation Partnership Project (3GPP) standards) established between the MSO core network and the MNO core network and/or a dedicated core to provide a data signal pathway between the MNO core network and the MSO core network. As such, a user equipment (UE) receives data services through the H-MVNO core network via the standards-based inter-network interface when the UE is connected to a radio access network (RAN) for the MNO core network. Various configurations provide data services for single-subscriber identity module (SIM) UEs and dual-SIM UEs. Voice/message services are provided by a voice/message core.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 21, 2024
    Inventors: OJAS THAKORE CHOKSI, MARIAM SOROND, OMKAR SHRIPAD DHARMADHIKARI
  • Patent number: 11933973
    Abstract: The present disclosure relates generally to methods and systems useful in imaging applications, especially biological imaging applications, and applications in the metrology, atmospheric, scientific and medical fields. In one aspect, the disclosure provides a method of imaging an object, including illuminating the object with incident radiation through one or more adaptive optical elements; receiving transmitted radiation from the object at a photodetector to provide a base image; and performing the following steps one or more times: adjusting the one or more adaptive optical elements, the adjustment including modifying an optical transfer function of the one or more adaptive optical elements, and receiving transmitted radiation from the object at the photodetector to provide an adjusted image; wherein the adjustment and receiving steps are performed until the adjusted image has substantially reduced aberrations compared to the base image.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: March 19, 2024
    Assignee: The Regents of the University of Colorado
    Inventors: Juliet Gopinath, Mo Zohrabi, Victor M. Bright, Omkar Supekar, Robert H. Cormack, Emily Gibson, Connor McCullough
  • Publication number: 20240086188
    Abstract: Information based on an action performed relating to a portion of code of an application stored using a code repository is obtained. The portion of code is dynamically aligned with at least one component of a reference architecture relating to the application. A correlation exists between the portion of code of the code repository and the reference architecture. Based on the information, navigating is automatically performed to a specified location. The specified location is a selected area in the code repository or a selected area in the reference architecture.
    Type: Application
    Filed: September 9, 2022
    Publication date: March 14, 2024
    Inventors: Saraswathi Sailaja PERUMALLA, Sarbajit K. RAKSHIT, Omkar Nath BAG
  • Patent number: 11923307
    Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: March 5, 2024
    Assignee: Intel Corporation
    Inventors: Bai Nie, Gang Duan, Omkar G. Karhade, Nitin A. Deshpande, Yikang Deng, Wei-Lun Jen, Tarek A. Ibrahim, Sri Ranga Sai Boyapati, Robert Alan May, Yosuke Kanaoka, Robin Shea McRee, Rahul N. Manepalli
  • Patent number: 11921851
    Abstract: The presently disclosed subject matter includes an apparatus that receives a dataset with values associated with different digital resources captured from a group of compute devices. The apparatus includes a feature extractor, to generate a set of feature vectors, each feature vector from the set of feature vectors associated with a set of data included in the received dataset. The apparatus uses the set of feature vectors to validate multiple machine learning models trained to determine whether a digital resource is associated with a cyberattack. The apparatus selects at least one active machine learning model and sets the remaining trained machine learning models to operate in an inactive mode. The active machine learning model generates a signal to alert a security administrator, blocks a digital resource from loading at a compute device, or executes other remedial action, upon a determination that the digital resource is associated with a cyberattack.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: March 5, 2024
    Assignee: Musarubra US LLC
    Inventors: Sai Omkar Vashisht, Rahul Khul, Chunsheng Fang
  • Publication number: 20240071151
    Abstract: A number of variations may include a system and method may include autonomous driving systems including an algorithm analyzing motion controller performance in real time with respect to a set of attributes. The system and method may include an algorithm monitoring conditions such as monitoring actuations, vehicle dynamics, vehicle operating environment, and vehicle capability. The system and method may include an algorithm evaluating said conditions to determine which controller is best suited to the current situation during live vehicle operations.
    Type: Application
    Filed: August 23, 2022
    Publication date: February 29, 2024
    Inventors: Jason Brian Schwegler, GUSTAVO M. NUNES, OMKAR KARVE, NAGARAJU AKEPOGU
  • Publication number: 20240063178
    Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first die and a through-dielectric via (TDV) surrounded by a dielectric material in a first layer, where the TDV has a greater width at a first surface and a smaller width at an opposing second surface of the first layer; a second die, surrounded by the dielectric material, in a second layer on the first layer, where the first die is coupled to the second die by interconnects having a pitch of less than 10 microns, and the dielectric material around the second die has an interface seam extending from a second surface of the second layer towards an opposing first surface of the second layer with an angle of less than 90 degrees relative to the second surface; and a substrate on and coupled to the second layer.
    Type: Application
    Filed: August 19, 2022
    Publication date: February 22, 2024
    Applicant: Intel Corporation
    Inventors: Jimin Yao, Adel A. Elsherbini, Xavier Francois Brun, Kimin Jun, Shawna M. Liff, Johanna M. Swan, Yi Shi, Tushar Talukdar, Feras Eid, Mohammad Enamul Kabir, Omkar G. Karhade, Bhaskar Jyoti Krishnatreya
  • Publication number: 20240063147
    Abstract: Techniques and mechanisms to mitigate corrosion to via structures of a composite chiplet. In an embodiment, a composite chiplet comprises multiple integrated circuit (IC) components which are each in a different respective one of multiple levels. One or more conductive vias extend through an insulator layer in a first level of the multiple levels. An annular structure of the composite chiplet extends vertically through the insulator layer, and surrounds the one or more conductive vias in the insulator layer. The annular structure mitigates an exposure of the one or more conductive vias to moisture which is in a region of the insulator layer that is not surrounded by the annular structure. In another embodiment, the annular structure further surrounds an IC component which extends in the insulator layer.
    Type: Application
    Filed: August 19, 2022
    Publication date: February 22, 2024
    Applicant: Intel Corporation
    Inventors: Adel Elsherbini, Mohammad Enamul Kabir, Johanna Swan, Omkar Karhade, Kimin Jun, Feras Eid, Shawna Liff, Xavier Brun, Bhaskar Jyoti Krishnatreya, Tushar Talukdar, Haris Khan Niazi
  • Publication number: 20240063133
    Abstract: A multichip composite device includes on- and off-die metallization layers, inorganic dielectric material, and stacked hybrid-bonded dies. On-die metallization layers may be thinner than off-die metallization layers. The multichip composite device may include a structural substrate. Off-die metallization layers may be above and below the stacked hybrid-bonded dies. A substrate may couple the multichip composite device to a power supply in a multichip system. Forming a multichip composite device includes hybrid bonding dies and forming inorganic dielectric material.
    Type: Application
    Filed: August 19, 2022
    Publication date: February 22, 2024
    Applicant: Intel Corporation
    Inventors: Adel Elsherbini, Beomseok Choi, Feras Eid, Omkar Karhade, Shawna Liff
  • Publication number: 20240063143
    Abstract: Techniques and mechanisms to mitigate warping of a composite chiplet. In an embodiment, multiple via structures each extend through an insulator material in one of multiple levels of a composite chiplet. The insulator material extends around an integrated circuit (IC) component in the level. For a given one of the multiple via structures, a respective annular structure extends around the via structure to mitigate a compressive (or tensile) stress due to expansion (or contraction) of the via structure. In another embodiment, the composite chiplet additionally or alternatively comprises a structural support layer on the multiple levels, wherein the structural support layer has formed therein or thereon dummy via structures or a warpage compensation film.
    Type: Application
    Filed: August 19, 2022
    Publication date: February 22, 2024
    Applicant: Intel Corporation
    Inventors: Adel Elsherbini, Lance C. Hibbeler, Omkar Karhade, Chytra Pawashe, Kimin Jun, Feras Eid, Shawna Liff, Mohammad Enamul Kabir, Bhaskar Jyoti Krishnatreya, Tushar Talukdar, Wenhao Li