Patents by Inventor On Haran

On Haran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230389960
    Abstract: A surgical apparatus for insertion into an annular orifice of an animal body (e.g., vaginal orifice) to provide cavity access to a cavity while maintaining pneumoperitoneum that includes an expandable member, like an outer bladder or balloon like structure (similar to a pessary), surrounding a central structural member, that typically would be ring shaped and a flexible opening or penetrable port, similar to an elastomeric duck bill valve, affixed within an interior of said central structural member, through which an instrument or device may be inserted to provide surgical access to the cavity. The penetrable port may be of an active or passive configuration where, in the active configuration, it can be expanded to conform to the instruments. In the passive form, the penetrable port is comprised of an elastomeric or similar material that is fixed in shape and conformably flexes and seals to the instrument maintaining pneumoperitoneum.
    Type: Application
    Filed: June 6, 2022
    Publication date: December 7, 2023
    Applicant: Intelligent Surgical Devices LLC
    Inventors: Todd Michael Haran, Madonna Tomani
  • Publication number: 20230385587
    Abstract: The present disclosure relates to a method for progressively enrolling a user of a smart card to thereafter enable fingerprint authentication for the smart card. The present disclosure also relates to a corresponding smart card and to a computer program product.
    Type: Application
    Filed: October 26, 2021
    Publication date: November 30, 2023
    Applicant: Fingerprint Cards Anacatum IP AB
    Inventors: Haran ZUCKERMAN, Anders Ø. NIELSEN, Peter BJØRN-JØRGENSEN
  • Publication number: 20230369946
    Abstract: A slotless electric motor provides a phase change material that may communicate thermally through the sides of coils directly attached to the outer circumference of the central stator. A control system modeling the motor allows effective operation for short durations.
    Type: Application
    Filed: July 28, 2023
    Publication date: November 16, 2023
    Inventors: Kiruba S. Haran, Xuan Yi, Yangxue Yu
  • Publication number: 20230368087
    Abstract: A computer-implemented system and method by which an end user can monitor and manage multiple building systems with a single interface as well as customize and revise the settings and automated responses for multiple building systems based on input and transactions from multiple different building systems and enterprise applications. A drop-in command and interface software module allows a user to integrate control, command and response functions between previously installed and un-integrated building systems and to configure the activation or deactivation of one system function based on the data, alarm, event, or transaction from one or more other systems. The invention takes the data and control functions from any and every control system and allows a user to build his or her own intelligent building, and to edit the control processes on their own at any time. The responses of building systems are process driven, rather than rules based, and the response process is fully editable by the end user.
    Type: Application
    Filed: January 11, 2023
    Publication date: November 16, 2023
    Inventors: Bandu WEWALAARACHCHI, Haritharan GUNASINGHAM, Haran SHIVANAN
  • Publication number: 20230350902
    Abstract: In an example embodiment, a data model, software architecture, and process for synchronizing information about tags is provided, that permits assignment between different microservices. When a tag is added to an entity, then an assignment is made. The assignment is a record that contains a reference to a unique identifier for the tag and also describes the entity's domain and entity type. Each service uses at least one distinct domain, so tag assignments from different services should not conflict with one another.
    Type: Application
    Filed: April 27, 2022
    Publication date: November 2, 2023
    Inventors: Michael Decker, Susanne Gottlieb, Mike Luang-Khot, Steffen Maier, Arthee Pranadharthi Haran, Pradeep Rathod, Philipp Thiele, Mathias Zietzschmann
  • Patent number: 11799363
    Abstract: A slotless electric motor provides a phase change material that may communicate thermally through the sides of coils directly attached to the outer circumference of the central stator. A control system modeling the motor allows effective operation for short durations.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: October 24, 2023
    Assignee: Hinetics LLC
    Inventors: Kiruba S. Haran, Xuan Yi, Yangxue Yu
  • Patent number: 11792620
    Abstract: Methods and apparatuses are provided for allocating cellular vehicle-to-everything (C-V2X) radio transmission resources for transmitting messages in a C-V2X network from amongst a pool of initial resources from within a plurality of subframes. For each subframe in the plurality of subframes, it is determined whether transmitting in the subframe is likely to cause reception degradation with other C-V2X messages being transmitted in the network, and if yes, all resources in the subframe are excluded prior to allocating a resource for transmission.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: October 17, 2023
    Assignee: Autotalks Ltd.
    Inventors: Onn Haran, Ron Toledano, Oleg Litmanovich
  • Publication number: 20230326794
    Abstract: Embodiments disclosed herein include semiconductor devices and methods of forming such devices. In an embodiment a semiconductor device comprises a first interlayer dielectric (ILD), a plurality of source/drain (S/D) contacts in the first ILD, a plurality of gate contacts in the first ILD, wherein the gate contacts and the S/D contacts are arranged in an alternating pattern, and wherein top surfaces of the gate contacts are below top surfaces of the S/D contacts so that a channel defined by sidewall surfaces of the first ILD is positioned over each of the gate contacts, mask layer partially filling a first channel over a first gate contact, and a fill metal filling a second channel over a second gate contact that is adjacent to the first gate contact.
    Type: Application
    Filed: June 7, 2023
    Publication date: October 12, 2023
    Inventors: Leonard P. GULER, Michael HARPER, Suzanne S. RICH, Charles H. WALLACE, Curtis WARD, Richard E. SCHENKER, Paul NYHUS, Mohit K. HARAN, Reken PATEL, Swaminathan SIVAKUMAR
  • Publication number: 20230317787
    Abstract: Integrated circuit structures having backside gate tie-down are described. In an example, a structure includes a first vertical stack of horizontal nanowires over a first sub-fin, and a second vertical stack of horizontal nanowires over a second sub-fin, the second vertical stack of horizontal nanowires spaced apart from and parallel with the first vertical stack of horizontal nanowires. A gate structure includes a first gate structure portion over the first vertical stack of horizontal nanowires, wherein the first gate structure extends along an entirety of the first sub-fin. A second gate structure portion is over the second vertical stack of horizontal nanowires, wherein the second gate structure does not extend along an entirety of the second sub-fin. A gate cut is between the first gate structure portion and the second gate structure portion.
    Type: Application
    Filed: March 30, 2022
    Publication date: October 5, 2023
    Inventors: Leonard P. GULER, Mauro J. KOBRINSKY, Mohit K. HARAN, Marni NABORS, Tahir GHANI, Charles H. WALLACE, Allen B. GARDINER, Sukru YEMENICIOGLU
  • Publication number: 20230320057
    Abstract: Integrated circuit (IC) devices include transistors with gate, source and drain contact metallization, some of which are jumpered together by a metallization that is recessed below a height of other metallization that is not jumpered. The jumper metallization may provide a local interconnect between terminals of one transistor or adjacent transistors, for example between a gate of one transistor and a source/drain of another transistor. The jumper metallization may not induce the same pitch constraints faced by interconnect line metallization levels employed for more general interconnection. In some examples, a static random-access memory (SRAM) bit-cell includes a jumper metallization joining two transistors of the cell to reduce cell height for a given feature patterning capability.
    Type: Application
    Filed: April 1, 2022
    Publication date: October 5, 2023
    Applicant: Intel Corporation
    Inventors: Clifford Ong, Leonard Guler, Mohit Haran, Smita Shridharan, Reken Patel, Charles Wallace, Chanaka Munasinghe, Pratik Patel
  • Publication number: 20230317731
    Abstract: Integrated circuit structures having conductive structures in fin isolation regions are described. In an example, an integrated circuit structure includes a vertical stack of horizontal nanowires over a sub-fin. The integrated circuit structure also includes a gate structure. The gate structure includes a first gate structure portion over the vertical stack of horizontal nanowires, a second gate structure portion laterally adjacent to the first gate structure portion, wherein the second gate structure portion is not over a channel structure, and a gate cut between the first gate structure portion and the second gate structure portion.
    Type: Application
    Filed: March 30, 2022
    Publication date: October 5, 2023
    Inventors: Leonard P. GULER, Mauro J. KOBRINSKY, Mohit K. HARAN, Marni NABORS, Tahir GHANI, Charles H. WALLACE, Allen B. GARDINER, Sukru YEMENICIOGLU
  • Publication number: 20230314508
    Abstract: Embodiments of apparatuses and methods for in-field testing of an integrated circuit (IC) are disclosed. In an embodiment, an apparatus includes an IC having circuitry to operate in a structural test mode, the structural test mode including a memory built-in self-test (MBIST) mechanism and an automatic test pattern generation (ATPG) mechanism; a microcontroller to enable and control the structural test mode during in-field operation of the IC; and a programmable logic device to support the ATPG mechanism.
    Type: Application
    Filed: April 2, 2022
    Publication date: October 5, 2023
    Applicant: Intel Corporation
    Inventors: Elik Haran, Nir Gerber, Tal Davidson, Wei Hu, Nadav Levison
  • Publication number: 20230299659
    Abstract: An integrated multi-port generator-rectifier device includes multiple passive output ports provided from a plurality of passive-rectifier windings on a common, single magnetic structure. The passive-rectifier windings interact with a plurality of magnetic poles. Coils in the passive rectifier windings are serially connected. Each of the passive rectifier windings has a pitch as that is a fraction of magnet pole pitch and a pattern to magnetically decouple back emf phases of the separate rectifiers. The device further includes an active port provided by an active rectifier.
    Type: Application
    Filed: March 13, 2023
    Publication date: September 21, 2023
    Inventors: Arijit BANERJEE, Kiruba Sivasubramaniam HARAN, Phuc HUYNH, Anjana Jayasanka SAMARAKOON
  • Publication number: 20230285968
    Abstract: Disclosed is a method for assessing a characteristic of a drug, comprising treating a tissue sample with the drug; extracting from the tissue sample at least one feature of the tissue sample as treated; providing the at least one feature to an engine; obtaining a prediction from the engine; and associating the prediction with the drug.
    Type: Application
    Filed: March 23, 2023
    Publication date: September 14, 2023
    Applicant: Quris Technologies Ltd
    Inventors: Issac BENTWICH, Yossi HARAN
  • Patent number: 11758098
    Abstract: A control system includes a mirror controller generating horizontal and vertical mirror synchronization signals for a mirror based upon a mirror clock signal. Laser modulation circuitry generates horizontal and vertical laser synchronization signals as a function of first and second laser clock signals and generates control signals for a laser that emits a laser beam that impinges on the mirror. First synchronization circuitry receives the horizontal mirror synchronization signal and the horizontal laser synchronization signal, and modifies generation of the first laser clock signal to achieve alignment between the horizontal mirror synchronization signal and horizontal laser synchronization signal. Second synchronization circuitry receives the vertical mirror synchronization signal and the vertical laser synchronization signal, and modifies generation of the second laser clock signal to achieve alignment between the vertical mirror synchronization signal and vertical laser synchronization signal.
    Type: Grant
    Filed: November 15, 2022
    Date of Patent: September 12, 2023
    Assignee: STMicroelectronics LTD
    Inventor: Elik Haran
  • Publication number: 20230279380
    Abstract: A formulation for collecting a biological sample of saliva or nasal fluid and capturing nucleic acids in the collected sample has non-toxic chaotropic agents, ethanol, and coloring and/or flavoring agents. The formulation is receivable within an oral cavity or nasal cavity to collect the sample and the non-toxic chaotropic agent(s) lyse the sample cells. A device has a sample port for receiving the sample-containing formulation and a solid-state membrane in fluid communication with the sample port. A first pump causes the sample-containing formulation to flow across the solid-state membrane and into a waste chamber. The ethanol binds nucleic acids in the lysed cells of the sample to the solid-state membrane. A second pump causes the eluent to flow from an eluent chamber across the membrane, elute captured nucleic acids from the membrane, and flow with the captured nucleic acids into an eluent reservoir.
    Type: Application
    Filed: March 1, 2023
    Publication date: September 7, 2023
    Inventors: Peter Latham, Timothy Alcom, Todd Haran, Steve Rapp, Jonas Haran, Scott Rosebrough
  • Publication number: 20230275085
    Abstract: Techniques are provided herein to form an integrated circuit having a grid of gate cut structures such that a gate cut structure exists between pairs of semiconductor devices. In an example, neighboring semiconductor devices each include a semiconductor region extending between a source region and a drain region, and a gate structure extending over the semiconductor regions of the neighboring semiconductor devices. A gate cut structure is present between each pair of neighboring semiconductor devices thus interrupting the gate structure and isolating the gate of one semiconductor device from the gate of the other semiconductor device. Each of the gate cut structures may be formed at the same time in a grid-like pattern across the integrated circuit (or a portion thereof). Sidewall spacer structures on the sidewalls of the gate structure wrap around ends of each gate structure to form a given gate cut structure.
    Type: Application
    Filed: February 28, 2022
    Publication date: August 31, 2023
    Applicant: Intel Corporation
    Inventors: Leonard P. Guler, Sukru Yemenicioglu, Mohit K. Haran, Shengsi Liu, Robert Joachim, Dan S. Lavric, Stephen M. Cea
  • Patent number: 11739373
    Abstract: Provided herein, in some embodiments, are systems, methods, compositions, and kits for detecting and quantifying analytes using a primary analyte binding molecule conjugated to a nucleic acid template.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: August 29, 2023
    Assignee: G1 Sciences, LLC
    Inventor: Sudha Haran
  • Publication number: 20230266812
    Abstract: Methods for lowering the power consumption of a battery-operated pedestrian V2X device, comprising: determining a location of the pedestrian relative to a road using a physical map, determining whether a movement of the pedestrian is consistent using a heatmap, and based on the location of the pedestrian relative to the road and on the consistency of the pedestrian movement, powering down a V2X functionality inside the pedestrian V2X device by setting a V2X receiver operation cycle, a V2X transmitter activation state and a Global Navigation Satellite System (GNSS) sampling rate, thereby enabling low power operation of the pedestrian V2X device.
    Type: Application
    Filed: November 29, 2022
    Publication date: August 24, 2023
    Inventor: Onn Haran
  • Patent number: 11726597
    Abstract: The described technology provides an apparatus for a computing device. The apparatus includes a touchpad configured to receive a force input, a printed circuit board (PCB) configured below the touchpad, the PCB being supported by a spring mechanism on a backet, and a plurality of sensing pads configured between the PCB and the backet such that an airgap exists between each of the plurality of sensing pads the backet, wherein each of the airgaps between the sensing pads and the backet has a height different than other airgaps.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: August 15, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ahia Peretz, On Haran, Federico Zannier