Abstract: Reduced scale structures of improved reliability and/or increased composition options are enabled by the creation and use of quantum conductive recrystallization barrier layers. The quantum conductive layers are preferably used in trench capacitors to act as recrystallization barriers.

Abstract: A method of forming interconnections of devices of integrated circuits, especially interconnecting spaced source/drain regions and/or gate regions, and the resulting structures are provided. An etch-stop material such as silicon dioxide is deposited over the entire substrate on which the devices are formed. A layer of silicon is deposited over etch-stop material, and the silicon is selectively etched to reveal the etch-stop material at the regions to be connected. The etch-stop material at those regions is then removed. Following this a high-conductivity material, which is either a refractory metal or a silicide formed from layers of silicon and a refractory metal, is formed on the substrate connecting the spaced regions.

Abstract: A process for sputter deposition wherein high aspect ratio apertures are coated with conductive films exhibiting low bulk resistivity, low impurity concentrations, and regular morphologies. A collimator is used having an aspect ratio that approximates the aspect ratio of the apertures.

Abstract: A method for forming a silicide bridge bewteen a diffusion region and an adjacent poly-filled trench separated by a thin dielectric. Silicon is selectively grown over exposed silicon regions under conditions that provide controlled lateral growth over the thin dielectric without also permitting lateral growth over other insulator regions. A refractory metal layer is then deposited and sintered under conditions that limit lateral silicide growth, forming the bridge. This process avoids the random fails produced by previous processes while enhancing the compatibility of bridge formation with shallow junctions, without introducing extra masking steps or other process complexities.

Abstract: A method for self-aligning an isolation structure to a diffusion region. A first masking layer is formed on a semiconductor substrate, the first masking layer having at least one aperture sidewall which is substantially perpendicular to the semiconductor substrate. Dopant ions are implanted into the semiconductor substrate through the first masking layer to form a doped region. Sidewall spacers are then defined on the sidewalls of the aperture, and a sidewall image reversal process is carried out such that the sidewall spacers define trench apertures in a masking structure. Finally, isolation trenches are etched into the semiconductor substrate through the masking structure. Alternatively, the implantation step is carried out after the sidewall spacers are defined on the first masking layer.