Abstract: Flexible frame referencing is described that is suitable for use with a display transport. In one example, the referencing is a method that includes receiving frames at a computer system for transmission to a display, sending frames to the display without inter-frame compression in an intra-frame mode, saving the sent frames to a reference frame list, switching the computer system to an inter-frame mode, selecting a reference frame from the reference frame list, compressing additional received frames using the selected reference frame, and sending the additional frames to the display compressed in the inter-frame mode.

Abstract: In an embodiment, a processor includes multiple cores and a power controller. The power controller may include a hardware duty cycle (HDC) logic to cause at least one logical processor of one of the cores to enter into a forced idle state even though the logical processor has a workload to execute. In addition, the HDC logic may cause the logical processor to exit the forced idle state prior to an end of an idle period if at least one other logical processor is prevented from entry into the forced idle state. Other embodiments are described and claimed.

Abstract: In one embodiment, a processor includes: a plurality of cores each to independently execute instructions; a shared cache memory coupled to the plurality of cores and having a plurality of clusters each associated with one or more of the plurality of cores; a plurality of cache activity monitors each associated with one of the plurality of clusters, where each cache activity monitor is to monitor one or more performance metrics of the corresponding cluster and to output cache metric information; a plurality of thermal sensors each associated with one of the plurality of clusters and to output thermal information; and a logic coupled to the plurality of cores to receive the cache metric information from the plurality of cache activity monitors and the thermal information and to schedule one or more threads to a selected core based at least in part on the cache metric information and the thermal information for the cluster associated with the selected core. Other embodiments are described and claimed.

Abstract: The present invention relates to a platform power management scheme. In some embodiments, a platform provides a relative performance scale using one or more parameters to be requested by an OSPM system.

Abstract: In one embodiment an apparatus includes a multiplicity of processor components; one or more device components communicatively coupled to one or more processor components of the multiplicity of processor components; and a controller comprising logic at least a portion of which is in hardware, the logic to schedule one or more forced idle periods interspersed with one or more active periods, a forced idle period spanning a duration during which the multiplicity of processor components and the one or more device components are simultaneously placed in respective idle states that define a forced idle power state during isolated sub-periods of the forced idle period. Other embodiments are disclosed and claimed.

Abstract: Virtual reality systems and methods are described. For example, one embodiment of an apparatus comprises: a communications interface to provide frame data of a virtual reality scene to a head mounted display (HMD); at least one performance monitor coupled to at least one component of the apparatus the at least one performance monitor to monitor performance of the at least one component and to send an alert based on the performance of the at least one component; a processor to process the frame data; a controller to receive the alert based on the performance of the at least one component and to offload processing of the frame data from the processor to the HMD for processing; and a display to show the rendered view of the scene.

Abstract: Sink devices are provided that increase quality of displayed images by dynamically integrating higher fidelity update frames into a base stream encoded using an encoding technique (e.g., chroma-subsampling and/or another lossless encoding technique). Use of base image frames enables backward compatibility with existing technology and serves as a baseline for bandwidth scaling. The fidelity update frames may include raw image data, lossy, or losslessly compressed image data, and/or additional subsampled image data. The image data included in the fidelity update frames may apply to the entire base image frame or a portion thereof. The fidelity update frames may include incremental data or complete, high fidelity image data for a portion of an entire image. The sink devices may store and implement fidelity management policies that control operation of the devices to balance resource consumption against fidelity to meet the needs of specific operational environments.

Abstract: Source devices are provided that increase quality of displayed images by dynamically integrating higher fidelity update frames into a base stream encoded using an encoding technique (e.g., chroma-subsampling and/or another lossless encoding technique). Use of base image frames enables backward compatibility with existing technology and serves as a baseline for bandwidth scaling. The fidelity update frames may include raw image data, lossy, or losslessly compressed image data, and/or additional subsampled image data. The image data included in the fidelity update frames may apply to the entire base image frame or a portion thereof. The fidelity update frames may include incremental data or complete, high fidelity image data for a portion of an entire image. The source devices may store and implement fidelity management policies that control operation of the devices to balance resource consumption against fidelity to meet the needs of specific operational environments.

Abstract: In one aspect, an apparatus comprises an encoder configured to encode groups of pixels of a video frame into encoded groups. The video frame comprises a plurality of tiles and each of the plurality of tiles comprises one or more of the groups. For each tile in the plurality of tiles: the encoder is configured to generate a notification based on completion of encoding an encoded tile corresponding to the tile. The apparatus comprises a packetizer configured to generate packets corresponding to the video frame simultaneous with the encoding of the video frame by the encoder. For each tile in the plurality of tiles: the packetizer is configured to generate packets from the encoded tile corresponding to the tile based on the notification.

Abstract: Technology for a display source device is described. The display source device can receive a frame start indication from a display panel at a start of a frame. The display source device can align a timing of the display source device to a timing of the display panel based on the frame start indication received from the display panel to obtain frame-level synchronization between the display source device and the display panel. The display source device can send one or more frame update regions to the display panel in accordance with the timing of the display source device that is aligned to the timing of the display panel.

Abstract: A method and apparatus to reduce the idle link power in a platform. In one embodiment of the invention, the host and its coupled endpoint(s) in the platform each has a low power idle link state that allows disabling of the high speed link circuitry in both the host and its coupled endpoint(s). This allows the platform to reduce its idle power as both the host and its coupled endpoint(s) are able to turn off their high speed link circuitry in one embodiment of the invention.

Abstract: A method for an IMU enhanced reference list management and encoding is described herein. The method includes obtaining a plurality of reference frames and updating the plurality of reference frames based on a position information and a motion information of a user. The method also includes encoding a current frame of a scene based on the plurality of reference frames and a spatial location of the current frame and transmitting the current frame after encoding to be rendered.

Abstract: Flexible frame referencing is described that is suitable for use with a display transport. In one example, the referencing is a method that includes receiving frames at a computer system for transmission to a display, sending frames to the display without inter-frame compression in an intra-frame mode, saving the sent frames to a reference frame list, switching the computer system to an inter-frame mode, selecting a reference frame from the reference frame list, compressing additional received frames using the selected reference frame, and sending the additional frames to the display compressed in the inter-frame mode.

Abstract: In one embodiment an apparatus includes a multiplicity of processor components; one or more device components communicatively coupled to one or more processor components of the multiplicity of processor components; and a controller comprising logic at least a portion of which is in hardware, the logic to schedule one or more forced idle periods interspersed with one or more active periods, a forced idle period spanning a duration during which the multiplicity of processor components and the one or more device components are simultaneously placed in respective idle states that define a forced idle power state during isolated sub-periods of the forced idle period. Other embodiments are disclosed and claimed.

Abstract: An embodiment of a graphics apparatus may include a frame divider to divide a frame into two or more sub-frames, and a parallelized post-render stage communicatively coupled to the frame divider to process a sub-frame of the two or more sub-frames in parallel with a render operation. The parallelized post-render stage may include a post-processor communicatively coupled to the frame divider to post-process a rendered sub-frame in parallel with the render operation. Other embodiments are disclosed and claimed.

Abstract: The present invention relates to a platform power management scheme. In some embodiments, a platform provides a relative performance scale using one or more parameters to be requested by an OSPM system.

Abstract: An embodiment of a graphics apparatus may include a frame divider to divide a frame into two or more sub-frames, and a parallelized post-render stage communicatively coupled to the frame divider to process a sub-frame of the two or more sub-frames in parallel with a render operation. The parallelized post-render stage may include a post-processor communicatively coupled to the frame divider to post-process a rendered sub-frame in parallel with the render operation. Other embodiments are disclosed and claimed.

Abstract: An embodiment of a graphics apparatus may include an image generator, and a gesture tracker communicatively coupled to the image generator. The image generator may be configured to generate an image of a virtual input device, the gesture tracker may be configured to determine a position of a user's finger relative to the virtual input device, and the image generator may be further configured to generate an image of a virtual finger based on the determined position of the user's finger relative to the virtual input device. Other embodiments are disclosed and claimed.

Abstract: Examples are disclosed for composing memory resources across devices. In some examples, memory resources associated with executing one or more applications by circuitry at two separate devices may be composed across the two devices. The circuitry may be capable of executing the one or more applications using a two-level memory (2LM) architecture including a near memory and a far memory. In some examples, the near memory may include near memories separately located at the two devices and a far memory located at one of the two devices. The far memory may be used to migrate one or more copies of memory content between the separately located near memories in a manner transparent to an operating system for the first device or the second device. Other examples are described and claimed.

Abstract: An apparatus may include a memory to store one or more graphics rendering commands in a queue after generation. The apparatus may also include a processor circuit, and a graphics rendering command manager for execution on the processor to dynamically determine at one or more instances a total execution duration for the one or more graphics rendering commands, where the total execution duration comprises a total time to render the one or more graphics rendering commands. The graphics rendering command manager also may be for execution on the processor to generate a signal to transmit the one or more graphics rendering commands for rendering by a graphics processor when the total execution duration exceeds a graphics rendering command execution window.