Abstract: MEMS devices having discharge circuits. In some embodiments, a MEMS device can include a substrate and an electromechanical assembly implemented on the substrate. The MEMS device can further include a discharge circuit implemented relative to the electromechanical assembly. The discharge circuit can be configured to provide a preferred arcing path during a discharge condition affecting the electromechanical assembly. The MEMS device can be, for example, a switching device, a capacitance device, a gyroscope sensor device, an accelerometer device, a surface acoustic wave (SAW) device, or a bulk acoustic wave (BAW) device. The discharge circuit can include a spark gap assembly having one or more spark gap elements configured to facilitate the preferred arcing path.

Abstract: Apparatus and methods for biasing a power amplifier are disclosed. In one embodiment, a method of biasing a power amplifier includes shaping an enable signal using a time-dependent signal generator to generate a control current, amplifying the control current using a current amplifier to generate a correction current, and generating a bias current for a power amplifier using a primary biasing circuit. The primary biasing circuit is configured to use the correction current to correct for a variation in gain of the power amplifier when the power amplifier is enabled.

Abstract: Apparatus and methods for biasing a power amplifier are disclosed. In one embodiment, a method of biasing a power amplifier includes shaping an enable signal using a time-dependent signal generator to generate a control current, amplifying the control current using a current amplifier to generate a correction current, and generating a bias current for a power amplifier using a primary biasing circuit. The primary biasing circuit is configured to use the correction current to correct for a variation in gain of the power amplifier when the power amplifier is enabled.

Abstract: Apparatus and methods for biasing a power amplifier are disclosed. In one embodiment, a method of biasing a power amplifier includes shaping an enable signal using a time-dependent signal generator to generate a control current, amplifying the control current using a current amplifier to generate a correction current, and generating a bias current for a power amplifier using a primary biasing circuit. The primary biasing circuit is configured to use the correction current to correct for a variation in gain of the power amplifier when the power amplifier is enabled.

Abstract: Apparatus and methods for biasing a power amplifier are disclosed. In one embodiment, a method of biasing a power amplifier includes shaping an enable signal using a time-dependent signal generator to generate a control current, amplifying the control current using a current amplifier to generate a correction current, and generating a bias current for a power amplifier using a primary biasing circuit. The primary biasing circuit is configured to use the correction current to correct for a variation in gain of the power amplifier when the power amplifier is enabled.

Abstract: A system for detecting power output of a power amplifier includes a first power detector configured to detect a forward power output of a power amplifier, the first power detector configured to provide a first power detector output, and a second power detector configured to receive a collector parameter signal and detect a collector parameter therefrom, the second power detector also configured to provide a second power detector output.

Abstract: A low noise RF driver circuit including at least two series-coupled driver stages which receive a frequency modulated signal and an amplitude modulated signal that is applied to the supply voltage input of the driver stages, and provide a combined output signal. The RF driver circuit can be implemented in CMOS technology and integrated with other components of an RF communication subsystem, such as an RF transceiver circuit and power amplifier. Each driver stage includes a complementary pair of transistors with source degeneration resistors for linearity and gain control.

Abstract: Apparatus and methods for biasing a power amplifier are disclosed. In one embodiment, a method of biasing a power amplifier includes shaping an enable signal using a time-dependent signal generator to generate a control current, amplifying the control current using a current amplifier to generate a correction current, and generating a bias current for a power amplifier using a primary biasing circuit. The primary biasing circuit is configured to use the correction current to correct for a variation in gain of the power amplifier when the power amplifier is enabled.

Abstract: A low noise RF driver circuit including at least two series-coupled driver stages which receive a frequency modulated signal and an amplitude modulated signal that is applied to the supply voltage input of the driver stages, and provide a combined output signal. The RF driver circuit can be implemented in CMOS technology and integrated with other components of an RF communication subsystem, such as an RF transceiver circuit and power amplifier. Each driver stage includes a complementary pair of transistors with source degeneration resistors for linearity and gain control.

Abstract: A low noise RF driver circuit including at least two series-coupled driver stages which receive a frequency modulated signal and an amplitude modulated signal that is applied to the supply voltage input of the driver stages, and provide a combined output signal. The RF driver circuit can be implemented in CMOS technology and integrated with other components of an RF communication subsystem, such as an RF transceiver circuit and power amplifier. Each driver stage includes a complementary pair of transistors with source degeneration resistors for linearity and gain control.

Abstract: A method and apparatus for power detection in a multi-mode communication device configured for operation in different modes or frequency bands. A detector monitors the power level of an amplified outgoing signal. The detector may be configured with a switch and two or more samplers. Responsive to the mode of operation, the detector adopts an optimal configuration to generate a power level feedback signal, which is provided to a digital signal processor or controller. Comparison of the power level feedback signal to a target value may occur to generate an amplifier control signal. The amplifier control signal controls the gain, applied by an amplifier, to the outgoing signal. During operation, the system monitors for a change in the mode of operation and upon responsive to a change, generates a switch control signal to reconfigure the detector configuration to match the new mode of operation.

Abstract: A low noise RF driver circuit including at least two series-coupled driver stages which receive a frequency modulated signal and an amplitude modulated signal that is applied to the supply voltage input of the driver stages, and provide a combined output signal. The RF driver circuit can be implemented in CMOS technology and integrated with other components of an RF communication subsystem, such as an RF transceiver circuit and power amplifier. Each driver stage includes a complementary pair of transistors with source degeneration resistors for linearity and gain control.

Abstract: A system for detecting power output of a power amplifier includes a first power detector configured to detect a forward power output of a power amplifier, the first power detector configured to provide a first power detector output, and a second power detector configured to receive a collector parameter signal and detect a collector parameter therefrom, the second power detector also configured to provide a second power detector output.