Patents by Inventor Pei-The Chang

Pei-The Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978729
    Abstract: A semiconductor device package and a method of forming the same are provided. The semiconductor device package includes a package substrate having a first surface and a second surface opposite to the first surface. Several integrated devices are bonded to the first surface of the package substrate. A first underfill element is disposed over the first surface and surrounds the integrated devices. A first molding layer is disposed over the first surface and surrounds the integrated devices and the first underfill element. A semiconductor die is bonded to the second surface of the package substrate. A second underfill element is disposed over the second surface and surrounds the semiconductor die. A second molding layer is disposed over the second surface and surrounds the semiconductor die and the second underfill element. Several conductive bumps are disposed over the second surface and adjacent to the second molding layer.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Heh-Chang Huang, Fu-Jen Li, Pei-Haw Tsao, Shyue-Ter Leu
  • Publication number: 20240145448
    Abstract: A semiconductor device package and a method of forming the same are provided. The semiconductor device package includes a package substrate having a first surface and a second surface opposite to the first surface. Several integrated devices are bonded to the first surface of the package substrate. A first underfill element is disposed over the first surface and surrounds the integrated devices. A first molding layer is disposed over the first surface and surrounds the integrated devices and the first underfill element. A semiconductor die is bonded to the second surface of the package substrate. A second underfill element is disposed over the second surface and surrounds the semiconductor die. A second molding layer is disposed over the second surface and surrounds the semiconductor die and the second underfill element. Several conductive bumps are disposed over the second surface and adjacent to the second molding layer.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Inventors: Heh-Chang HUANG, Fu-Jen LI, Pei-Haw TSAO, Shyue-Ter LEU
  • Publication number: 20240145653
    Abstract: A manufacturing method of a display device includes forming light emitting components on a first substrate, the light emitting components include a first side and a second side, and the second side is away from the first substrate; forming a circuit layer on the first substrate and on the second side of the light emitting components; forming a first protective layer on the circuit layer and forming an insulating layer on the first protective layer; removing the first substrate after forming a second substrate on the insulating layer; forming a black matrix layer on the first side of the light emitting components, and the black matrix layer includes openings; forming light conversion layers in the openings of the black matrix layer; forming a second protective layer on the black matrix layer and the light conversion layers; and forming a third substrate on the second protective layer.
    Type: Application
    Filed: May 12, 2023
    Publication date: May 2, 2024
    Applicant: HANNSTAR DISPLAY CORPORATION
    Inventors: Chun-I Chu, Yu-Chi Chiao, Yung-Li Huang, Hung-Ming Chang, Cheng-Yu Lin, Huan-Hsun Hsieh, CHeng-Pei Huang
  • Patent number: 11973027
    Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a gate structure, a dielectric structure and a contact structure. The substrate has source/drain (S/D) regions. The gate structure is on the substrate and between the S/D regions. The dielectric structure covers the gate structure. The contact structure penetrates through the dielectric structure to connect to the S/D region. A lower portion of a sidewall of the contact structure is spaced apart from the dielectric structure by an air gap therebetween, while an upper portion of the sidewall of the contact structure is in contact with the dielectric structure.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pei-Yu Chou, Jr-Hung Li, Liang-Yin Chen, Su-Hao Liu, Tze-Liang Lee, Meng-Han Chou, Kuo-Ju Chen, Huicheng Chang, Tsai-Jung Ho, Tzu-Yang Ho
  • Patent number: 11964149
    Abstract: A facial beautifying and care apparatus includes a beauty bar (1) having an air supply passage (A), a negative pressure connecting hole (132), a conductive suction nozzle (15) and a first connection port (134); an EMS generation module (20) inside the beauty bar (1) electrically connected to the first connection port (134); an external negative pressure unit (6) separated from the beauty bar (1) and having a negative pressure driving control module (62) and a second connection port (637); the negative pressure driving control module (62) having an air supply tube assembly (66) with a negative pressure communicating hole (661); a communicating tube (7) communicating with the negative pressure connecting hole (132) and the negative pressure communicating hole (661); a conductive wire (8) connected to the first connecting port (134) and the second connecting port (637). Accordingly, the effects of facial skin firming, cleaning, beautifying and caring are achieved.
    Type: Grant
    Filed: March 20, 2023
    Date of Patent: April 23, 2024
    Assignees: BIBOTING INTERNATIONAL CO., LTD.
    Inventors: Po-Chang Liu, Pei-En Lee
  • Patent number: 11960201
    Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.
    Type: Grant
    Filed: May 15, 2023
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pei-Cheng Hsu, Chun-Fu Yang, Ta-Cheng Lien, Hsin-Chang Lee
  • Patent number: 11960167
    Abstract: A backplane includes: a substrate including a circuit structure layer, a first reflective layer disposed on a bearing surface of the substrate, a plurality of light-emitting diode chips, and a plurality of optical structures. The first reflective layer includes a plurality of through holes spaced apart. A light-emitting diode chip in the plurality of light-emitting diode chips is located in one of the plurality of through holes. The plurality of light-emitting diode chips are electrically connected to the circuit structure layer. The circuit structure layer is configured to drive the plurality of light-emitting diode chips to emit light. An optical structure in the plurality of optical structures covers the light-emitting diode chip, a light incident surface of the optical structure is in contact with a light exit surface of the light-emitting diode chip, and a light exit surface of the optical structure is a curved surface.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: April 16, 2024
    Assignees: BOE MLED Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Pei Li, Haiwei Sun, Ming Zhai, Lu Yu, Kangle Chang, Jinpeng Li, Pengjun Cao, Yutao Hao, Shubai Zhang, Shuo Wang, Pei Qin, Zewen Gao, Yali Zhang
  • Patent number: 11948840
    Abstract: In an embodiment, a method includes forming a first fin and a second fin within an insulation material over a substrate, the first fin and the second fin includes different materials, the insulation material being interposed between the first fin and the second fin, the first fin having a first width and the second fin having a second width; forming a first capping layer over the first fin; and forming a second capping layer over the second fin, the first capping layer having a first thickness, the second capping layer having a second thickness different from the first thickness.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Yao Chen, Pin-Chu Liang, Hsueh-Chang Sung, Pei-Ren Jeng, Yee-Chia Yeo
  • Publication number: 20240103345
    Abstract: An image capturing unit includes an imaging element and a dual-shot injection-molded optical folding element that are adjacent to each other. The imaging element is configured for an imaging light to pass through. The dual-shot injection-molded optical folding element includes a first part and a second part. The first part is made of transparent material. The first part has a reflective surface configured to reflect the imaging light. The second part is made of opaque material, and the second part is fixed at periphery of the first part. The second part includes a supporting portion configured to support the dual-shot injection-molded optical folding element. The supporting portion maintains the dual-shot injection-molded optical folding element at a predetermined position corresponding to the imaging element through mechanism assembly.
    Type: Application
    Filed: December 5, 2023
    Publication date: March 28, 2024
    Applicant: LARGAN PRECISION CO., LTD.
    Inventors: Lin An CHANG, Pei-Chi CHANG, Ming-Ta CHOU
  • Publication number: 20240103358
    Abstract: A system includes a mask. The system further includes a pellicle frame attached to the mask. The pellicle frame includes a check valve, wherein the check valve is configured to permit gas flow from a first side of the pellicle from to a second side of the pellicle frame. The pellicle frame further includes a flat bottom surface having only a single recess therein, wherein the flat bottom surface is free of an adhesive. The system further includes a gasket within the single recess.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 28, 2024
    Inventors: Chue San YOO, Hsin-Chang LEE, Pei-Cheng HSU, Yun-Yue LIN
  • Patent number: 11940454
    Abstract: Analyte collection and testing systems and methods, and more particularly to disposable oral fluid collection and testing systems and methods. Described herein are methods and apparatuses to achieve significant improvements in the detection of fluorescence signals in the reader.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: March 26, 2024
    Assignee: ASPIDA DX INC.
    Inventors: Ashutosh Shastry, David Piehler, Hardeep Sanghera, Michael Gluzczack, Pranav Chopra, Yun-Pei Chang, Ameya Kantak
  • Publication number: 20240094626
    Abstract: A pellicle for an extreme ultraviolet (EUV) photomask includes a pellicle frame and a main membrane attached to the pellicle frame. The main membrane includes a plurality of nanotubes, and each of the plurality of nanotubes is covered by a coating layer containing Si and one or more metal elements.
    Type: Application
    Filed: April 12, 2023
    Publication date: March 21, 2024
    Inventors: Pei-Cheng HSU, Wei-Hao LEE, Huan-Ling LEE, Hsin-Chang LEE, Chin-Hsiang LIN
  • Publication number: 20240085781
    Abstract: In a method of cleaning a photo mask, the photo mask is placed on a support such that a pattered surface faces down, and an adhesive sheet is applied to edges of a backside surface of the photo mask.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Chang LEE, Pei-Cheng HSU, Hao-Ping CHENG, Ta-Cheng LIEN
  • Publication number: 20240086601
    Abstract: A method of generating a first performance-data-library (for a standard-cell-library) includes: for each standard cell that includes multiple gates, sorting the gates into groups including searching for matched ones amongst the gates (matched gates), grouping corresponding matched gates into corresponding multiple member-gates, and (for unmatched ones of the gates having no other matched gate (unmatched gates)), grouping the unmatched gates into corresponding single-member groups; for each standard cell, generating a corresponding first volume of performance data including, for each group, discretely calculating the first volume of performance data, mapping the volume of performance data to the subject gate in the group, and, for each multimember group, mapping the volume of performance data to non-subject gates; and basing the first performance-data-library at least in part on the first volumes of performance data.
    Type: Application
    Filed: January 23, 2023
    Publication date: March 14, 2024
    Inventors: Johnny Chiahao LI, Tzu-Hsuan HO, Pei-Wei LAO, Bing-Hsiu WU, Jerry Chang Jui KAO
  • Publication number: 20240077804
    Abstract: A method includes forming a test pattern and a reference pattern in an absorption layer of a photomask structure. The test pattern has a first trench and a second trench, the reference pattern has a third trench and a fourth trench, the test pattern and the reference pattern have substantially the same dimension in a top view, and the second trench is deeper than the first trench, the third trench, and the fourth trench. The method further includes emitting a light beam to the test pattern to obtain a first interference pattern reflected from the test pattern, emitting the light beam to the reference pattern to obtain a second interference pattern reflected from the reference pattern; and comparing the first interference pattern with the second interference pattern to obtain a measured complex refractive index of the absorption layer.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ping-Hsun LIN, Chien-Cheng CHEN, Shih Ju HUANG, Pei-Cheng HSU, Ta-Cheng LIEN, Hsin-Chang LEE
  • Publication number: 20240069427
    Abstract: In a method of manufacturing a pellicle for an extreme ultraviolet (EUV) photomask, a nanotube layer including a plurality of carbon nanotubes is formed, the nanotube layer is attached to a pellicle frame, and a solvent dipping treatment is performed to the nanotube layer by applying bubbles in a solvent to the nanotube layer.
    Type: Application
    Filed: March 2, 2023
    Publication date: February 29, 2024
    Inventors: Ting-Pi SUN, Pei-Cheng HSU, Hsin-Chang LEE
  • Publication number: 20230416363
    Abstract: Provided herein are recombinant antibodies, antigen-binding fragments, and fusion proteins thereof useful for binding to and inhibiting programmed death 1 (PD-1), nucleic acid molecules encoding the same and therapeutic compositions thereof, as well as methods of using such antibodies, including the methods for enhancing T cell and NK cell function to increase cell and cytokine mediated immunity and methods of treatment of various immune dysfunction related disorders including cancer and infectious diseases.
    Type: Application
    Filed: June 23, 2021
    Publication date: December 28, 2023
    Applicant: Kadmon Corporation, LLC
    Inventors: Dan Lu, Zhanna Polonskaya, Tzu-Pei Chang, Stella Aviaty Martomo, Jeegar P. Patel, Faical Miyara
  • Publication number: 20230312724
    Abstract: Provided herein are recombinant antibodies, antigen-binding fragments thereof, and fusion proteins thereof useful for binding to and inhibiting B7-H4. Also provided are nucleic acid molecules encoding the antibodies, antigen-binding fragments thereof, and fusion proteins thereof disclosed herein and therapeutic compositions thereof. Disclosed are further methods of using the disclosed antibodies, antigen-binding fragments thereof, and fusion proteins thereof for the treatment of disease.
    Type: Application
    Filed: November 29, 2022
    Publication date: October 5, 2023
    Applicant: Kadmon Corporation, LLC
    Inventors: Dan Lu, Jeegar P. Patel, Tzu-Pei Chang, Zhanna Polonskaya, Faical Miyara
  • Publication number: 20230180382
    Abstract: A circuit board includes an insulation part, a support layer disposed on the insulation part, a metal case disposed in the insulation part, a heat-exchanging fluid distributed within the enclosed space, and a first porous material distributed within the enclosed space. The metal case is thermally coupled to the support layer and includes a first inner surface, a second inner surface opposite to the first inner surface and positioned between the first inner surface and the support layer, a third inner surface connecting the first inner surface and the second inner surface, and an enclosed space surrounded by the first inner surface, the second inner surface and the third inner surface. The first porous material is disposed on the first inner surface.
    Type: Application
    Filed: January 17, 2022
    Publication date: June 8, 2023
    Inventors: Chun-Lin LIAO, Pei-Chang HUANG
  • Patent number: 11664671
    Abstract: A battery charging station includes a power bus, a power supplying unit, a first voltage converting unit and a processor. The power supplying unit receives a first power to generate a second power accordingly and transmits the second power to the power bus as a supplying power of the power bus. The first voltage converting unit is coupled to the power bus and is connected to a first battery removably disposed in the battery station. The processor sets the first voltage converting unit to operate in a first mode or a second mode, the first voltage converting unit in the first mode receives the supplying power from the power bus so as to charge the first battery. The first voltage converting unit in the second mode receives the electrical power from the first battery and generates a second mode power towards the power bus.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: May 30, 2023
    Assignee: Gogoro Inc.
    Inventors: Yu-Chang Chien, Pei-Chang Kuo, Shih-Chan Chiu