Patents by Inventor Pei-The Chang

Pei-The Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160088128
    Abstract: A housing includes a ceramic layer for decoration, an intermediate layer formed on at least one surface of the ceramic layer, and a substrate coupled on the intermediate layer. The surface of the intermediate layer coupled to the substrate is rough and/or porous for improving the bonding of the substrate to the intermediate layer.
    Type: Application
    Filed: December 3, 2014
    Publication date: March 24, 2016
    Inventors: HSIN-PEI CHANG, WEN-RONG CHEN, HUANN-WU CHIANG, YUNG-CHING HUANG, YANG-JIA LIU, BIN LI, HOU-RONG ZHUANG
  • Patent number: 9288917
    Abstract: A manufacturing method for a multi-layer circuit board includes the following steps. Firstly, a substrate having two surfaces opposite to each other and a via connecting there between is provided. Next, a patterned circuit layer is formed on each of the surfaces by using the via as an alignment target. Each patterned circuit layer includes a concentric-circle pattern. Next, a first stacking layer is formed on each of the surfaces. Then, a first through hole penetrating regions of the first stacking layer and the substrate where a first concentric circle from the center of the concentric-circle pattern is orthogonally projected thereon is formed. Next, a second stacking layer is formed on each first stacking layer. Afterward, a second through hole penetrating regions of the first, the second stacking layers and the substrate where a second concentric circle from the center of the concentric-circle pattern is orthogonally projected thereon is formed.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: March 15, 2016
    Assignee: Unimicron Technology Corp.
    Inventors: Pei-Chang Huang, Cheng-Po Yu, Han-Pei Huang
  • Publication number: 20160067238
    Abstract: Pharmaceutical compositions containing a combination of anti-chondrogenesis agents are disclosed. Methods of reducing scleral chondrogensis, reducing one or more ocular chondrogenic proteins, reducing inflammation induced chondrogensis and treating myopia by administering an effective amount of one or more anti-chondrogensis agents are also provided. The pharmaceutical compositions are useful for treating myopia.
    Type: Application
    Filed: May 5, 2014
    Publication date: March 10, 2016
    Inventors: Pei-Chang Wu, Chia-Ling Tsai, Chueh-Tan Chen
  • Publication number: 20160033412
    Abstract: Optical readers and alignment tools for detecting the level of an analyte. Described herein are small, disposable partially-encapsulated sensing chips for detecting an analyte level from a fluid sample (e.g., a blood sample) having an edge of the integrated sensing chip exposed to directly expose a plurality of excitation and a collection waveguides, as well as optical readers and methods of operating them. A fluid sample maybe applied to a sensing surface of the sensing chip in the housing so that an analyte level can be optically detected. Also described are methods of sensing an analyte using these devices and systems including an optical detector.
    Type: Application
    Filed: July 29, 2015
    Publication date: February 4, 2016
    Inventors: Ming TAN, Yun-Pei CHANG, Leyla SABET, Ashutosh SHASTRY, Christopher E. TODD, Reuven DUER
  • Patent number: 9253890
    Abstract: Provided is a patterned conductive film may include a conductive interconnected nano-structure film. The conductive interconnected nano-structure film may include a first region and a second region adjacent to the first region. A conductivity of the first region may be at least 1000 times a conductivity of the second region.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: February 2, 2016
    Assignee: Industrial Technology Research Institute
    Inventors: Yu-Pei Chang, Ming-Huan Yang, Chun-Yi Chiu
  • Publication number: 20160025944
    Abstract: An optical component including a multi-layer substrate, an optical waveguide element, and two optical-electro assemblies is provided. The multi-layer substrate includes a dielectric layer, two circuit layers, and two through holes passing through the dielectric layer. The optical waveguide element is located on the multi-layer substrate and between the through holes. The optical-electro assemblies are respectively inserted into the corresponding through holes and correspondingly located at two opposite ends of the optical waveguide element. One of the optical-electro assemblies transforms an electrical signal into a light beam and provides the light beam to the optical waveguide element, and the other one of the optical-electro assemblies receives the light beam transmitted from the optical waveguide element and transforms the light beam into another electrical signal. A manufacturing method of the optical component and an optical-electro circuit board having the optical component are also provided.
    Type: Application
    Filed: July 22, 2014
    Publication date: January 28, 2016
    Inventors: Yin-Ju Chen, Cheng-Po Yu, Pei-Chang Huang
  • Publication number: 20150362674
    Abstract: A method for assembling an opto-electronic circuit board is described as follows. A bottom cladding layer, a core layer and a top cladding layer are formed on the base orderly such that a waveguide is completed. A first light-guide hole is formed in a base material, and a light source is disposed on the base material thereby forming an emission component. A second light-guide hole is formed in another base material, and then an optic receiver is disposed on another base material thereby forming a receiver component. A circuit substrate is processed in order to form a first cavity, a second cavity and a third cavity on a first circuit layer of the substrate. The waveguide, the emission component and the receiver component are disposed respectively in the first cavity, the second cavity and the third cavity.
    Type: Application
    Filed: September 19, 2014
    Publication date: December 17, 2015
    Inventors: Yin-Ju CHEN, Cheng-Po YU, Pei-Chang HUANG
  • Patent number: 9198303
    Abstract: A manufacturing method for a multi-layer circuit board includes the following steps. Firstly, two core layers are compressed to form a substrate having two surfaces opposite to each other. Then, a via connecting the surfaces is formed. A patterned circuit layer including a concentric-circle pattern is then formed on each surface by using the via as an alignment target. Next, a first stacking layer is formed on each surface. Then, a first through hole penetrating regions of the first stacking layer and the substrate where a first concentric circle from the center of the concentric-circle pattern is orthogonally projected thereon is formed. A second stacking layer is then formed on each first stacking layer. Afterward, a second through hole penetrating regions of the first, the second stacking layers and the substrate where a second concentric circle from the center of the concentric-circle pattern is orthogonally projected thereon is formed.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: November 24, 2015
    Assignee: Unimicron Technology Corp.
    Inventors: Pei-Chang Huang, Cheng-Po Yu, Han-Pei Huang, Ai-Hwa Lim
  • Patent number: 9159713
    Abstract: An opto-electronic circuit board includes a substrate, a cavity, blind vias, metal layers, a first chip, a second chip, and the optical component. The substrate includes a first circuit layer, a second circuit layer, and a dielectric layer disposed between the first circuit layer and the second circuit layer. The cavity is disposed on the dielectric layer, in which the cavity extends from the first circuit layer to the second circuit layer. The blind vias are disposed at opposite sides of the cavity. The first chip is disposed on the second circuit layer with corresponding to one of the blind vias. The second chip is disposed on the second circuit layer with corresponding to the other one of the blind vias. The optical component is disposed in the cavity, in which the second surface of the optical component is connected to the first circuit layer.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: October 13, 2015
    Assignee: UNIMICRON TECHNOLOGY CORP.
    Inventors: Yin-Ju Chen, Cheng-Po Yu, Pei-Chang Huang
  • Patent number: 9098784
    Abstract: A beautifying method for quick response code (QR code) is provided herein and includes the following steps: a step of setting an image in a QR code; a step of determining an ideal value of a correction code for the QR code; a step of calculating an energy function related to vision beauty condition in accordance with the image, the correction code and the ideal value and a step of optimizing the energy function to obtain a minimum procedure of the energy function of the ideal value.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: August 4, 2015
    Assignee: NATIONAL TAIWAN UNIVERSITY
    Inventors: Ja-Ling Wu, Yu-Pei Chang, Yu-Hsun Lin
  • Patent number: 9095083
    Abstract: A manufacturing method for a multi-layer circuit board includes the following steps. Firstly, a substrate having a first via penetrating the substrate is provided. Next, a patterned circuit layer is formed on a surface of the substrate by using the first via as an alignment target. The first patterned circuit layer includes a first concentric-circle pattern surrounding the first via. Next, a first stacking layer is formed on the surface. Then, a first through hole penetrating regions where a first concentric circle from the center of the concentric-circle pattern is orthogonally projected on the first stacking layer and the substrate is formed. Next, a second stacking layer is formed on the first stacking layer. Afterward, a second through hole penetrating regions where a second concentric circle from the center of the concentric-circle pattern is orthogonally projected on of the first, the second stacking layers and the substrate is formed.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: July 28, 2015
    Assignee: Unimicron Technology Corp.
    Inventors: Pei-Chang Huang, Cheng-Po Yu, Han-Pei Huang
  • Publication number: 20150199600
    Abstract: A beautifying method for quick response code (QR code) is provided herein and includes the following steps: a step of setting an image in a QR code; a step of determining an ideal value of a correction code for the QR code; a step of calculating an energy function related to vision beauty condition in accordance with the image, the correction code and the ideal value and a step of optimizing the energy function to obtain a minimum procedure of the energy function of the ideal value.
    Type: Application
    Filed: March 13, 2014
    Publication date: July 16, 2015
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: Ja-Ling Wu, Yu-Pei Chang, Yu-Hsun Lin
  • Patent number: 9076052
    Abstract: A fixed reader in communication with a portable reader includes an induction circuit and a microcontroller. The induction circuit receives wireless signals sent by the portable reader, and outputs control signals according to the received wireless signals. The microcontroller is electronically connected to the induction circuit, and activates the fixed reader according to the control signals, to allow the fixed reader to enter into a working state or an idle state.
    Type: Grant
    Filed: April 6, 2013
    Date of Patent: July 7, 2015
    Assignees: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Hsin-Pei Chang, Zong-Yuan Sun, Da-Hua Xiao
  • Publication number: 20150125625
    Abstract: A manufacturing method for a multi-layer circuit board includes the following steps. Firstly, a substrate having a first via penetrating the substrate is provided. Next, a patterned circuit layer is formed on a surface of the substrate by using the first via as an alignment target. The first patterned circuit layer includes a first concentric-circle pattern surrounding the first via. Next, a first stacking layer is formed on the surface. Then, a first through hole penetrating regions where a first concentric circle from the center of the concentric-circle pattern is orthogonally projected on the first stacking layer and the substrate is formed. Next, a second stacking layer is formed on the first stacking layer. Afterward, a second through hole penetrating regions where a second concentric circle from the center of the concentric-circle pattern is orthogonally projected on of the first, the second stacking layers and the substrate is formed.
    Type: Application
    Filed: November 7, 2013
    Publication date: May 7, 2015
    Applicant: Unimicron Technology Corp.
    Inventors: Pei-Chang Huang, Cheng-Po Yu, Han-Pei Huang
  • Publication number: 20150121693
    Abstract: A manufacturing method for a multi-layer circuit board includes the following steps. Firstly, two core layers are compressed to form a substrate having two surfaces opposite to each other. Then, a via connecting the surfaces is formed. A patterned circuit layer including a concentric-circle pattern is then formed on each surface by using the via as an alignment target. Next, a first stacking layer is formed on each surface. Then, a first through hole penetrating regions of the first stacking layer and the substrate where a first concentric circle from the center of the concentric-circle pattern is orthogonally projected thereon is formed. A second stacking layer is then formed on each first stacking layer. Afterward, a second through hole penetrating regions of the first, the second stacking layers and the substrate where a second concentric circle from the center of the concentric-circle pattern is orthogonally projected thereon is formed.
    Type: Application
    Filed: November 7, 2013
    Publication date: May 7, 2015
    Applicant: Unimicron Technology Corp.
    Inventors: Pei-Chang Huang, Cheng-Po Yu, Han-Pei Huang, Ai-Hwa Lim
  • Publication number: 20150121694
    Abstract: A manufacturing method for a multi-layer circuit board includes the following steps. Firstly, a substrate having two surfaces opposite to each other and a via connecting there between is provided. Next, a patterned circuit layer is formed on each of the surfaces by using the via as an alignment target. Each patterned circuit layer includes a concentric-circle pattern. Next, a first stacking layer is formed on each of the surfaces. Then, a first through hole penetrating regions of the first stacking layer and the substrate where a first concentric circle from the center of the concentric-circle pattern is orthogonally projected thereon is formed. Next, a second stacking layer is formed on each first stacking layer. Afterward, a second through hole penetrating regions of the first, the second stacking layers and the substrate where a second concentric circle from the center of the concentric-circle pattern is orthogonally projected thereon is formed.
    Type: Application
    Filed: November 7, 2013
    Publication date: May 7, 2015
    Applicant: Unimicron Technology Corp.
    Inventors: Pei-Chang Huang, Cheng-Po Yu, Han-Pei Huang
  • Patent number: 9005735
    Abstract: A composite of metal and resin includes a metal piece and a resin piece. The metal piece includes a surface. Micropores are formed on the surface. The micropores have inlet diameters smaller than bottom diameters thereof. The resin piece is partially inserted into the micropores to combine with the metal piece.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: April 14, 2015
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Hsin-Pei Chang, Wen-Rong Chen, Huann-Wu Chiang, Cheng-Shi Chen, Hua-Yang Xu
  • Patent number: 8980065
    Abstract: A method of making a coated article includes providing a substrate; forming a nickel layer on the substrate by magnetron sputtering; forming a titanium layer on the nickel layer by magnetron sputtering; and applying a thermal oxidative treatment to the nickel and titanium layered substrate to form a catalyst layer and a self-cleaning layer. The self-cleaning layer includes metallic titanium, metallic nickel, nickel oxide and titanium dioxide.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: March 17, 2015
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Hsin-Pei Chang, Wen-Rong Chen, Huann-Wu Chiang, Cheng-Shi Chen, Jia Huang
  • Patent number: 8979372
    Abstract: A circuit board, a manufacturing method thereof, and an electro-optic apparatus having the circuit board are provided. The circuit board includes a substrate including a first dielectric layer and a first circuit layer disposed thereon, a waveguide layer disposed on a portion of the substrate, a second dielectric layer, a convex structure and a second circuit layer. The second dielectric layer is disposed on the substrate and the waveguide layer. The second dielectric layer has an opening exposing the sidewall of the waveguide layer and a portion of the first circuit layer. The convex structure is disposed on the sidewall of the waveguide layer. The convex structure and the waveguide layer respectively have refractive index n1 and n2, and |n1?n2|/n1<1%. The surface roughness of the convex structure is less than that of the sidewall of the waveguide layer. The second circuit layer is disposed on the second dielectric layer.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: March 17, 2015
    Assignee: Unimicron Technology Corp.
    Inventors: Pei-Chang Huang, Wen-Fang Liu, Cheng-Po Yu
  • Publication number: 20150047885
    Abstract: Provided is a patterned conductive film may include a conductive interconnected nano-structure film. The conductive interconnected nano-structure film may include a first region and a second region adjacent to the first region. A conductivity of the first region may be at least 1000 times a conductivity of the second region.
    Type: Application
    Filed: November 15, 2013
    Publication date: February 19, 2015
    Applicant: Industrial Technology Research Institute
    Inventors: Yu-Pei Chang, Ming-Huan Yang, Chun-Yi Chiu