Patents by Inventor Pei Yu

Pei Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10921876
    Abstract: Power and performance of a multi-core system is managed dynamically by adjusting power table indices at runtime. Runtime statistics is measured, when an application is executed on a first core of a first type at a first operating point (OPP) in a first time period, and on a second core of a second core type at a second OPP in a second time period. A controller estimates, based on the runtime statistics, a first pair of indices associated with a first OPP for the first core and a second pair of indices associated with a second OPP for the second core. During runtime, the controller incorporates the first pair of indices and the second pair of indices into power table indices; and determines, from the power table indices, selected indices associated with a selected OPP of a core of a selected core type for executing the application.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: February 16, 2021
    Assignee: MediaTek Inc.
    Inventors: Jih-Ming Hsu, Tai-Hua Lu, Pei-Yu Huang, Chien-Yuan Lai, Shu-Hsuan Chou, I-Cheng Cheng, Yun-Ching Li, Ming Hsien Lee
  • Patent number: 10904501
    Abstract: A projection system and a keystone correction method are provided. The projection system includes: a projector projecting an image to a projection zone; an image capturing device capturing a captured image including the projection zone; and a processor. The processor divides the captured image into multiple focusing zones, and controls a stepper motor to shift focusing on the focusing zones at edges to obtain a step of the stepper motor and a distance for each of the focusing zones with a maximum clarity value. The distance is a projection distance between a lens module and the focusing zone. The processor calculates an included angle between the direction of a light axis of the projector and the projection zone according to the distances of the focusing zones at the edges, and performs a warping operation on a projection image according to the included angle.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: January 26, 2021
    Assignee: Coretronic Corporation
    Inventors: Yu-Chi Wu, Pei-Yu Li
  • Patent number: 10875019
    Abstract: The present invention discloses a multi-flux microfluidic chip for nucleic acid detection and capable of actively controlling a flow path, and a use method thereof. The detection chip includes a chip body, and the chip body is provided with a sample loading chamber, a reaction chamber, and a microfluidic channel, where there is a plurality of reaction chambers, and the microfluidic channel includes a sample output main channel and several sample distribution channels.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: December 29, 2020
    Assignee: Lansion Biotechnology Co., Ltd.
    Inventors: Xingshang Xu, Jeffery Chen, Tao Zhu, Pei Yu
  • Publication number: 20200404021
    Abstract: In some examples, a system includes a network managed by a service provider and configured to provide access to one or more objects to a set of tenants each having one or more users, the service provider and the set of tenants being part of a set of entities that form a hierarchy, and a controller having access to the network. The controller is configured to obtain data indicative of a set of parameters, where the data indicative of the set of parameters is associated with an owner entity of the set of entities, generate a rule which incorporates the set of parameters, where the rule enables the controller to control access to an object of the one or more objects, and add the rule to a rules database, wherein the rules database is accessible to the controller.
    Type: Application
    Filed: June 20, 2019
    Publication date: December 24, 2020
    Inventors: Gurminder Singh, Pei-Yu Yang, Rong Xie
  • Publication number: 20200386666
    Abstract: In certain embodiments a device is provided for electrorotation flow. In certain embodiments the device comprises a microfluidic channel comprising a plurality of electrodes disposed to provide dielectrophoretic (DEP) forces that are perpendicular to hydrodynamic flows along the channel; and a fluid within the channel providing the hydrodynamic flow along the channel; wherein the device is configured to apply focusing voltages to the electrodes that provide an electric field minimum in the channel and that focus cells, particles, and/or molecules or molecular complexes within the channel; and where the device is configured to apply rotation-inducing voltages to the electrodes that induce rotation of the cells, particles, molecules and/or molecular complexes as they flow through the channel.
    Type: Application
    Filed: April 5, 2018
    Publication date: December 10, 2020
    Inventors: Yu-Chun Kung, Tianxing Man, Pei-Yu E. Chiou
  • Publication number: 20200388692
    Abstract: In a method for manufacturing a semiconductor device, a gate structure is formed over a channel layer and an isolation insulating layer. A first sidewall spacer layer is formed on a side surface of the gate structure. A sacrificial layer is formed so that an upper portion of the gate structure with the first sidewall spacer layer is exposed from the sacrificial layer and a bottom portion of the gate structure with the first sidewall spacer layer is embedded in the first sacrificial layer. A space is formed between the bottom portion of the gate structure and the sacrificial layer by removing at least part of the first sidewall spacer layer. After the first sidewall spacer layer is removed, an air gap is formed between the bottom portion of the gate structure and the sacrificial layer by forming a second sidewall spacer layer over the gate structure.
    Type: Application
    Filed: August 24, 2020
    Publication date: December 10, 2020
    Inventors: Chun-Hsiung LIN, Chia-Hao CHANG, Chih-Hao WANG, Wai-Yi LIEN, Chih-Chao CHOU, Pei-Yu WANG
  • Publication number: 20200350416
    Abstract: A semiconductor device includes a source/drain region, a source/drain silicide layer formed on the source/drain region, and a first contact disposed over the source/drain silicide layer. The first contact includes a first metal layer, an upper surface of the first metal layer is at least covered by a silicide layer, and the silicide layer includes a same metal element as the first metal layer.
    Type: Application
    Filed: July 13, 2020
    Publication date: November 5, 2020
    Inventors: Chia-Ming HSU, Pei-Yu CHOU, Chih-Pin TSAO, Kuang-Yuan HSU, Jyh-Huei CHEN
  • Publication number: 20200333193
    Abstract: The surface temperature of a portable device is estimated. The portable device includes a sensor for detecting the internal temperature of the portable device. The portable device also includes circuitry for estimating the surface temperature, using the internal temperature and an ambient temperature of the portable device as input to a circuit model. The circuit model describes thermal behaviors of the portable device. The circuitry is operative to identify a scenario in which the portable device operates, and determine the ambient temperature using the scenario and at least the internal temperature.
    Type: Application
    Filed: July 3, 2020
    Publication date: October 22, 2020
    Inventors: Chi-Wen Pan, Pei-Yu Huang, Sheng-Liang Kuo, Jih-Ming Hsu, Tai-Yu Chen, Yun-Ching Li, Wei-Ting Wang
  • Patent number: 10787657
    Abstract: In various embodiments methods are provided for delivering an agent of interest (e.g., protein, antibody, nucleic acid) into cells. In certain embodiments the method comprises contacting the cells with anisotropic magnetic particles in the presence of the agent; and applying a substantially uniform magnetic field to said magnetic particles where movement of said particles induced by said magnetic field introduces transient openings into said cell facilitating entry of said agent of interest into said cells.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: September 29, 2020
    Assignee: The Regents of the University of California
    Inventors: Pei-Yu E. Chiou, Michael A. Teitell, Ming-Yu Lin, Yi-Chien Wu, Jessica Zhou
  • Patent number: 10780413
    Abstract: Methods and devices for the formation and/or merging of droplets in microfluidic systems are provided. In certain embodiments a microfluidic droplet merger component is provided that comprises a central channel comprising a plurality of elements disposed and spaced to create a plurality of lateral passages that drain a carrier fluid out of a fluid stream comprising droplets of a first fluid contained in the carrier fluid; and a deformable lateral membrane valve disposed to control the width of said center channel.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: September 22, 2020
    Assignee: The Regents of the University of California
    Inventors: Yu-Chun Kung, Pei-Yu E. Chiou, Ting-Hsiang S. Wu, Yue Chen, Michael A. Teitell
  • Patent number: 10763328
    Abstract: Structures for a field-effect transistor and methods for fabricating a structure for a field-effect transistor. A first epitaxial layer has a first surface and a second surface inclined relative to the first surface. A surface layer is arranged on the first and second surfaces of the first epitaxial layer. A second epitaxial layer is arranged over the surface layer on the first and second surfaces of the first epitaxial layer. A portion of the first epitaxial layer defines an interface with the surface layer. The portion of the first epitaxial layer contains a first concentration of a dopant. The surface layer contains a second concentration of the dopant that is greater than the first concentration of the dopant in the portion of the first epitaxial layer.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: September 1, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Omur Isil Aydin, Judson Holt, Lakshmanan Vanamurthy, Tobias Heyne, Pei-Yu Chou, Cäcilia Brantz
  • Publication number: 20200269212
    Abstract: A method of treating or remediating contaminated material, such as water or soil, comprises contacting such material with asphaltenes. The asphaltenes are preferably produced as a by-product of petroleum refining and, in particular, a by-product of vacuum residua. An adsorbent material comprising such asphaltenes is also provided.
    Type: Application
    Filed: March 6, 2019
    Publication date: August 27, 2020
    Applicant: Well Resources Inc.
    Inventors: Warren CHUNG, Xuebing LI, Pei YU, Mengtao CUI, Quan SHI, Zhiming XU, Suoqi ZHAO, Chunming XU, Keng H. CHUNG
  • Patent number: 10756197
    Abstract: In a method for manufacturing a semiconductor device, a gate structure is formed over a channel layer and an isolation insulating layer. A first sidewall spacer layer is formed on a side surface of the gate structure. A sacrificial layer is formed so that an upper portion of the gate structure with the first sidewall spacer layer is exposed from the sacrificial layer and a bottom portion of the gate structure with the first sidewall spacer layer is embedded in the first sacrificial layer. A space is formed between the bottom portion of the gate structure and the sacrificial layer by removing at least part of the first sidewall spacer layer. After the first sidewall spacer layer is removed, an air gap is formed between the bottom portion of the gate structure and the sacrificial layer by forming a second sidewall spacer layer over the gate structure.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: August 25, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Hsiung Lin, Chia-Hao Chang, Chih-Hao Wang, Wai-Yi Lien, Chih-Chao Chou, Pei-Yu Wang
  • Patent number: 10756196
    Abstract: In a method for manufacturing a semiconductor device, a gate structure is formed over a channel layer and an isolation insulating layer. A first sidewall spacer layer is formed on a side surface of the gate structure. A sacrificial layer is formed so that an upper portion of the gate structure with the first sidewall spacer layer is exposed from the sacrificial layer and a bottom portion of the gate structure with the first sidewall spacer layer is embedded in the first sacrificial layer. A space is formed between the bottom portion of the gate structure and the sacrificial layer by removing at least part of the first sidewall spacer layer. After the first sidewall spacer layer is removed, an air gap is formed between the bottom portion of the gate structure and the sacrificial layer by forming a second sidewall spacer layer over the gate structure.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: August 25, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Hsiung Lin, Chia-Hao Chang, Chih-Hao Wang, Wai-Yi Lien, Chih-Chao Chou, Pei-Yu Wang
  • Patent number: 10739206
    Abstract: The surface temperature of a portable device is estimated. A sensor detects the internal temperature of the portable device. The internal temperature and an ambient temperature are used as input to a circuit model that describes thermal behaviors of the portable device. Dynamic thermal management may be performed based on the estimated surface temperature.
    Type: Grant
    Filed: December 30, 2017
    Date of Patent: August 11, 2020
    Assignee: MediaTek Inc.
    Inventors: Chi-Wen Pan, Pei-Yu Huang, Sheng-Liang Kuo, Jih-Ming Hsu, Tai-Yu Chen, Yun-Ching Li, Wei-Ting Wang
  • Publication number: 20200252200
    Abstract: The application discloses a data analysis system and a data analysis method. The data analysis system includes a data provider host and a data analysis host. The data provider host is configured to perform a stream cipher algorithm based on raw data to obtain first data. The data analysis host is configured to perform a data analysis based on the first data to obtain an analysis result. The data provider host or the data analysis host is further configured to perform a block cipher algorithm based on the analysis result to obtain second data, and send the second data to an external device. The data provider host is further configured to calculate an attribute-value correspondence between the raw data and the second data, and send the attribute-value correspondence to the external device.
    Type: Application
    Filed: January 14, 2020
    Publication date: August 6, 2020
    Applicant: Pegatron Corporation
    Inventors: Wei-Cheng Lin, Pei-Yu Chen, Jia-Shiung Yang
  • Patent number: 10733881
    Abstract: A method, system and computer program product are provided for detecting vehicle queue events and managing traffic flow. A computing system recognizes whether a queue event occurred for each vehicle located in an area of interest based on collected vehicle data. The area of interest includes an intersection, and the vehicle data for the each vehicle includes location information and speed information. The location information further includes a distance to an intersection. The computing system identifies differences in queue length among queues in the area of interest based on the vehicle data and determines queue indicators for each of the queues in the area of interest. Based on queue indicators for each of the queues in in the area of interest generated over multiple sampling periods, traffic signal lights at the intersection in the area of interest are managed.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: August 4, 2020
    Assignee: International Business Machines Corporation
    Inventors: Jing Xu, Yang Zhang, Jun Wang, Ji Hui Yang, Wen Pei Yu
  • Publication number: 20200243408
    Abstract: A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.
    Type: Application
    Filed: April 16, 2020
    Publication date: July 30, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tsung-Yu LIN, Pei-Yu WANG, Chung-Wei HSU
  • Patent number: 10714586
    Abstract: A semiconductor device includes a source/drain region, a source/drain silicide layer formed on the source/drain region, and a first contact disposed over the source/drain silicide layer. The first contact includes a first metal layer, an upper surface of the first metal layer is at least covered by a silicide layer, and the silicide layer includes a same metal element as the first metal layer.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: July 14, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Ming Hsu, Pei-Yu Chou, Chih-Pin Tsao, Kuang-Yuan Hsu, Jyh-Huei Chen
  • Patent number: D901380
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: November 10, 2020
    Assignees: GOLDEN TSANN YUH ENTERPRISE CO., LTD., PEPIDEA CO., LTD.
    Inventors: Yi-Ling Tsai, Pei-Yu Wang, Pai-Feng Chen