Patents by Inventor Pei Yu

Pei Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Use of ligustrazine nitrone derivatives in prevention and treatment of diabetic complication diseases
    Publication number: 20200155548
    Abstract: A use of of ligustrazine nitrone derivatives and a pharmaceutical composition thereof in the preparation of medicine for preventing and treating diabetic complication diseases. The ligustrazine nitrone derivatives can be prepared into various dose forms together with drug carriers.
    Type: Application
    Filed: May 25, 2018
    Publication date: May 21, 2020
    Applicant: QINGDAO HAILAN PHARMACEUTICALS CO., LTD.
    Inventors: Yuqiang Wang, Yewei Sun, Lipeng Xu, Mei Jing, Zaijun Zhang, Gaoxiao Zhang, Pei Yu, Peng Yi
  • GRAPHENE AND HEXAGONAL BORON NITRIDE PLANES AND ASSOCIATED METHODS
    Publication number: 20200156946
    Abstract: Graphene layers made of primarily sp2 bonded atoms and associated methods are disclosed. In one aspect, for example, a method of forming a graphite film can include heating a solid substrate under vacuum to a solubilizing temperature that is less than a melting point of the solid substrate, solubilizing carbon atoms from a graphite source into the heated solid substrate, and cooling the heated solid substrate at a rate sufficient to form a graphite film from the solubilized carbon atoms on at least one surface of the solid substrate. The graphite film is formed to be substantially free of lattice defects.
    Type: Application
    Filed: September 17, 2019
    Publication date: May 21, 2020
    Inventors: Chien-Min Sung, Shao Chung Hu, I-Chiao Lin, Chien-Pei Yu
  • HEATING MECHANISM FOR BIOCHEMICAL REACTION DEVICE
    Publication number: 20200156078
    Abstract: Provided is a heating mechanism for a biochemical reaction device, including: a heat-conducting body including: at least one accommodating groove each including a chamber and an opening communicating with the chamber; a clamping hole, in communication with the opening and for inserting a reaction tube; and at least one heat-conducting block, movably disposed in the chamber and having one end connected with an elastic element and another opposite end provided with an abutting portion, the elastic element enabling the abutting portion of the heat-conducting block to protrude from the opening and locate in the clamping hole; and a temperature control element connected to the heat-conducting body for heating and regulating a temperature of the heat-conducting block.
    Type: Application
    Filed: September 19, 2017
    Publication date: May 21, 2020
    Applicant: GENEREACH BIOTECHNOLOGY CORP.
    Inventors: Chun-Ming LEE, Ching-Ko LIN, Yun-Lung TSAI, Pei-Yu LEE, Chen SU, Hsiao-Fen CHANG, Fu-Chun LI
  • Semiconductor device package and a method of manufacturing the same
    Patent number: 10658255
    Abstract: A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: May 19, 2020
    Assignee: ADVANCED SEMSCONDUCTOR ENGINEERING, INC.
    Inventors: Tsung-Yu Lin, Pei-Yu Wang, Chung-Wei Hsu
  • SELF-LOCKING OPTOELECTRONIC TWEEZER AND ITS FABRICATION
    Publication number: 20200140798
    Abstract: A novel Self-Locking Optoelectronic Tweezers (SLOT) for single microparticle manipulation across a large area is provided. DEP forces generated from ring-shape lateral phototransistors are utilized for locking single microparticles or cells in the dark state. The locked microparticles or cells can be selectively released by optically deactivating these locking sites.
    Type: Application
    Filed: October 29, 2019
    Publication date: May 7, 2020
    Inventors: Yajia Yang, Yufei Mao, Pei-Yu E. Chiou, Chi On Chui
  • Semiconductor package and method of manufacturing the same
    Patent number: 10643863
    Abstract: A semiconductor package includes a die and a patterned conductive layer electrically connected to the die. The patterned conductive layer includes a connection pad and a trace. The semiconductor package further includes an encapsulation layer encapsulating the die and the patterned conductive layer. The semiconductor package further includes an electrical connection element disposed on the connection pad and a protection layer including a sidewall portion surrounding the electrical connection element.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: May 5, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Kuang-Hsiung Chen, Shing-Cheng Liang, Pei-Yu Hsu
  • SEMICONDUCTOR ARRANGEMENT AND METHOD OF MANUFACTURE
    Publication number: 20200135923
    Abstract: A method for forming a semiconductor arrangement comprises forming a fin over a semiconductor layer. A gate structure is formed over a first portion of the fin. A second portion of the fin adjacent to the first portion of the fin and a portion of the semiconductor layer below the second portion of the fin are removed to define a recess. A stress-inducing material is formed in the recess. A first semiconductor material is formed in the recess over the stress-inducing material. The first semiconductor material is different than the stress-inducing material.
    Type: Application
    Filed: September 20, 2019
    Publication date: April 30, 2020
    Inventors: Pei-Yu WANG, Sai-Hooi Yeong
  • SINGLE-PIXEL OPTICAL TECHNOLOGIES FOR INSTANTLY QUANTIFYING MULTICELLULAR RESPONSE PROFILES
    Publication number: 20200116696
    Abstract: New platform technologies to actuate and sense force propagation in real-time for large sheets of cells are provided. In certain embodiments the platform comprises a device for the measurement of mechanical properties of cells or other moieties, where device comprises a transparent elastic or viscoelastic polymer substrate disposed on a rigid transparent surface; and a plurality of micromirrors disposed on or in said polymer substrate, wherein the reflective surfaces of the micromirrors are oriented substantially parallel to the surface of said polymer substrate. In certain embodiments the device comprises more than about 1,000,000, or more than about 10,000,000 micromirrors. In certain embodiments the micromirrors comprise a magnetic layer and/or a diffraction grating.
    Type: Application
    Filed: July 3, 2018
    Publication date: April 16, 2020
    Inventors: Pei-Yu E. Chiou, Michael A. Teitell, Xiongfeng Zhu, Xing Haw Marvin Tan, Thang Nguyen
  • PROJECTION SYSTEM AND KEYSTONE CORRECTION METHOD
    Publication number: 20200120319
    Abstract: A projection system and a keystone correction method are provided. The projection system includes: a projector projecting an image to a projection zone; an image capturing device capturing a captured image including the projection zone; and a processor. The processor divides the captured image into multiple focusing zones, and controls a stepper motor to shift focusing on the focusing zones at edges to obtain a step of the stepper motor and a distance for each of the focusing zones with a maximum clarity value. The distance is a projection distance between a lens module and the focusing zone. The processor calculates an included angle between the direction of a light axis of the projector and the projection zone according to the distances of the focusing zones at the edges, and performs a warping operation on a projection image according to the included angle.
    Type: Application
    Filed: October 8, 2019
    Publication date: April 16, 2020
    Applicant: Coretronic Corporation
    Inventors: Yu-Chi Wu, Pei-Yu Li
  • EPITAXIAL SEMICONDUCTOR MATERIAL GROWN WITH ENHANCED LOCAL ISOTROPY
    Publication number: 20200111870
    Abstract: Structures for a field-effect transistor and methods for fabricating a structure for a field-effect transistor. A first epitaxial layer has a first surface and a second surface inclined relative to the first surface. A surface layer is arranged on the first and second surfaces of the first epitaxial layer. A second epitaxial layer is arranged over the surface layer on the first and second surfaces of the first epitaxial layer. A portion of the first epitaxial layer defines an interface with the surface layer. The portion of the first epitaxial layer contains a first concentration of a dopant. The surface layer contains a second concentration of the dopant that is greater than the first concentration of the dopant in the portion of the first epitaxial layer.
    Type: Application
    Filed: October 4, 2018
    Publication date: April 9, 2020
    Inventors: Omur Isil Aydin, Judson Holt, Lakshmanan Vanamurthy, Tobias Heyne, Pei-Yu Chou, Cäcilia Brantz
  • Method of building vehicle data in tire pressure diagnosis tool
    Patent number: 10611197
    Abstract: A method of building vehicle data in a tire pressure diagnosis tool includes: building owner information in the tire pressure diagnosis tool; entering a vehicle identification number and a tire identification number; and obtaining a tire pressure sensor identification number and a tire environment parameter value, wherein complete linking data pertaining to every owner identity and vehicle status are built in a tire pressure diagnosis tool to not only enable automobile manufacturers and automobile repair shops to effectuate vehicle maintenance and management conveniently, but also provide vehicle identification numbers and tire identification numbers to a competent authority timely and as needed.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: April 7, 2020
    Assignee: CUB ELECPARTS INC.
    Inventors: San-Chuan Yu, Jyong Lin, Cheng-Wei Yu, Cheng-Yu Lin, Chih-Wen Pai, Pei-Yu Ma
  • REGION OF INTEREST RECOGNITION
    Publication number: 20200104623
    Abstract: An example method includes receiving the one or more image frames successively in time, wherein a first image frame is received before a second image frame in time and defining one or more blocks in each of the one or more image frames, wherein the first image frame includes a first block, and the second image frame includes a second block. The method also includes in response to the second block having a probability higher than a threshold to be associated with a region of interest (ROI), selecting the second block from the one or more blocks in the second image frame, and in response to the selected second block being associated with the first block, determining an ROI status of the second block to represent whether the second block includes any part of the ROI based on an ROI status of the first block.
    Type: Application
    Filed: September 30, 2018
    Publication date: April 2, 2020
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventors: Pei-Yu JHANG, Der Wei YANG
  • Method and Device for Boosting Performance of FinFETS via Strained Spacer
    Publication number: 20200105930
    Abstract: A semiconductor device and a method of forming the same are provided. A semiconductor device according to an embodiment includes a P-type field effect transistor (PFET) and an N-type field effect transistor (NFET). The PFET includes a first gate structure formed over a substrate, a first spacer disposed on a sidewall of the first gate structure, and an unstrained spacer disposed on a sidewall of the first spacer. The NET includes a second gate structure formed over the substrate, the first spacer disposed on a sidewall of the second gate structure, and a strained spacer disposed on a sidewall of the first spacer.
    Type: Application
    Filed: June 14, 2019
    Publication date: April 2, 2020
    Inventors: Kai-Chieh Yang, Li-Yang Chuang, Pei-Yu Wang, Wei Ju Lee, Ching-Wei Tsai, Kuan-Lun Cheng
  • TWO TIER AUTOMATIC COST ESTIMATION FOR AUTOMATIC MANUFACTURE OF SPARE PARTS
    Publication number: 20200042889
    Abstract: Techniques for automatically manufacturing mechanical parts are described. A first estimate of manufacturing cost for a first mechanical part is generated using a first machine learning model. In response to determining that the first estimate of manufacturing cost for the first mechanical part falls within a range of effectivity for the first machine learning model, a second estimate of manufacturing cost for the first mechanical part is generated using a second machine learning model. An expected cost error in the second estimate of manufacturing cost for the first mechanical part is determined, and upon determining that the expected cost error falls within a pre-determined acceptable range, automatic manufacturing of the first mechanical part is facilitated.
    Type: Application
    Filed: August 2, 2018
    Publication date: February 6, 2020
    Inventors: Pei Yu LIN, Joseph F. RICE, Andrey A. ZAIKIN
  • Electronic device
    Patent number: 10553563
    Abstract: An electronic device includes a top carrier having a first top surface and a first bottom surface, a first electronic element formed on the first top surface, a second electronic element formed on the first bottom surface, a bottom carrier below the top carrier and having a second top surface near the top carrier, and a controller formed on the second top surface.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: February 4, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Min-Hsun Hsieh, Jai-Tai Kuo, Chang-Hsieh Wu, Tzu-Hsiang Wang, Chi-Chih Pu, Ya-Wen Lin, Pei-Yu Li
  • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20200035805
    Abstract: In a method for manufacturing a semiconductor device, a gate structure is formed over a channel layer and an isolation insulating layer. A first sidewall spacer layer is formed on a side surface of the gate structure. A sacrificial layer is formed so that an upper portion of the gate structure with the first sidewall spacer layer is exposed from the sacrificial layer and a bottom portion of the gate structure with the first sidewall spacer layer is embedded in the first sacrificial layer. A space is formed between the bottom portion of the gate structure and the sacrificial layer by removing at least part of the first sidewall spacer layer. After the first sidewall spacer layer is removed, an air gap is formed between the bottom portion of the gate structure and the sacrificial layer by forming a second sidewall spacer layer over the gate structure.
    Type: Application
    Filed: September 26, 2019
    Publication date: January 30, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Hsiung LIN, Chia-Hao CHANG, Chih-Hao WANG, Wai-Yi LIEN, Chih-Chao CHOU, Pei-Yu WANG
  • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20200027960
    Abstract: In a method for manufacturing a semiconductor device, a gate structure is formed over a channel layer and an isolation insulating layer. A first sidewall spacer layer is formed on a side surface of the gate structure. A sacrificial layer is formed so that an upper portion of the gate structure with the first sidewall spacer layer is exposed from the sacrificial layer and a bottom portion of the gate structure with the first sidewall spacer layer is embedded in the first sacrificial layer. A space is formed between the bottom portion of the gate structure and the sacrificial layer by removing at least part of the first sidewall spacer layer. After the first sidewall spacer layer is removed, an air gap is formed between the bottom portion of the gate structure and the sacrificial layer by forming a second sidewall spacer layer over the gate structure.
    Type: Application
    Filed: September 27, 2019
    Publication date: January 23, 2020
    Inventors: Chun-Hsiung LIN, Chia-Hao CHANG, Chih-Hao WANG, Wai-Yi LIEN, Chih-Chao CHOU, Pei-Yu WANG
  • Method for Metal Gate Cut and Structure Thereof
    Publication number: 20200006075
    Abstract: A method includes providing a structure having a substrate, first and second semiconductor fins extending from the substrate, and a dielectric fin between the first and second semiconductor fins; forming a temporary gate on top and sidewalls of the first and second semiconductor fins and the dielectric fin; forming gate spacers on sidewalls of the temporary gate; removing the temporary gate and a first portion of the dielectric fin between the gate spacers; forming a gate between the gate spacers and on top and sidewalls of the first and second semiconductor fins, wherein the dielectric fin is in physical contact with sidewalls of the gate; removing a second portion of the dielectric fin, thereby exposing the sidewalls of the gate; and performing an etching process to the gate through the exposed sidewalls of the gate, thereby separating the gate into a first gate segment and a second gate segment.
    Type: Application
    Filed: March 27, 2019
    Publication date: January 2, 2020
    Inventors: Pei-Yu Wang, Zhi-Chang Lin, Ching-Wei Tsai, Kuan-Lun Cheng
  • MICROFLUIDIC DEVICES WITH FLEXIBLE OPTICALLY TRANSPARENT ELECTRODES
    Publication number: 20190388890
    Abstract: Microfluidic devices in which electrokinetic mechanisms move droplets of a liquid or particles in a liquid are described. The devices include at least one electrode that is optically transparent and/or flexible.
    Type: Application
    Filed: April 29, 2019
    Publication date: December 26, 2019
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Pei-Yu E. Chiou, Kuo-Wei Huang, Igor Y. Khandros, Ming C. Wu
  • ARTIFICIAL JOINT
    Publication number: 20190388230
    Abstract: An artificial joint includes a first joint assembly and a second joint assembly. The first joint assembly is adapted to be connected to a first bone and has a first contacting surface, wherein the first contacting surface includes a first convex arc surface, a second convex arc surface, and a third convex arc surface. The second joint assembly is adapted to be connected to a second bone and has a second contacting surface, wherein the second contacting surface is in contact with the first contacting surface and includes a first concave arc surface, a second concave arc surface, and a third concave arc surface, and the first concave arc surface, the second concave arc surface, and the third concave arc surface respectively correspond to the first convex arc surface, the second convex arc surface, and the third convex arc surface.
    Type: Application
    Filed: December 19, 2018
    Publication date: December 26, 2019
    Applicants: Industrial Technology Research Institute, National Taiwan University Hospital
    Inventors: Pei-I Tsai, Hsin-Hsin Shen, Kuo-Yi Yang, De-Yau Lin, Yi-Hung Wen, Chih-Chieh Huang, Wei-Luan Fan, Pei-Yu Chen, Ching-Chi Hsu