Abstract: A measuring system for measuring elasticity of biological tissue includes a mobile device and a measuring apparatus including a conducting seat and a measuring device. The conducting seat is for detachable mounting of the mobile device therein, and is adapted to abut against the biological tissue for conducting vibrations produced by the mobile device to the biological tissue to cause the biological tissue to vibrate. The measuring device includes an ultrasonic transducer to emit an ultrasound signal to the biological tissue and an elasticity analyzer to analyze an ultrasound echo signal that results from reflection of the ultrasound signal by the biological tissue which is vibrating to obtain an elasticity data of the biological tissue.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a source region, a drain region, and a gate electrode layer disposed between the source region and the drain region. The gate electrode layer includes a first surface facing the source region, and the first surface includes an edge portion having a first height. The gate electrode layer further includes a second surface opposite the first surface and facing the drain region. The second surface includes an edge portion having a second height. The second height is different from the first height.

Abstract: An IC structure includes a source epitaxial structure, a drain epitaxial structure, a first silicide region, a second silicide region, a source contact, a backside via rail, a drain contact, and a front-side interconnection structure. The first silicide region is on a front-side surface and a first sidewall of the source epitaxial structure. The second silicide region is on a front-side surface of the drain epitaxial structure. The source contact is in contact with the first silicide region and has a protrusion extending past a backside surface of the source epitaxial structure. The backside via rail is in contact with the protrusion of the source contact. The drain contact is in contact with the second silicide region. The front-side interconnection structure is on a front-side surface of the source contact and a front-side surface of the drain contact.

Abstract: A use of of ligustrazine nitrone derivatives and a pharmaceutical composition thereof in the preparation of medicine for preventing and treating diabetic complication diseases. The ligustrazine nitrone derivatives can be prepared into various dose forms together with drug carriers.

Abstract: The present disclosure relates to a semiconductor device having a backside source/drain contact, and method for forming the device. The semiconductor device includes a source/drain feature having a top surface and a bottom surface, a first silicide layer formed in contact with the top surface of the source/drain feature, a first conductive feature formed on the first silicide layer, and a second conductive feature having a body portion and a first sidewall portion extending from the body portion, wherein the body portion is below the bottom surface of the source/drain feature, and the first sidewall portion is in contact with the first conductive feature.

Abstract: A battery connector is disclosed. An insulating body has a first accommodating space and a limiting portion, and a second accommodating space, which is in communication with the first accommodating space, is provided above the first accommodating space and the limiting portion. In assembly, the battery is guided downward into the second accommodating space, and the battery is pressed downward such that the battery passes the limiting portion to enter the first accommodating space and abut a positive pole terminal and a negative pole terminal, thus achieving assembly of the battery conveniently, and effectively preventing the battery from falling out of the insulating body.

Abstract: In an embodiment, a device includes: a power rail contact; an isolation region on the power rail contact; a first dielectric fin on the isolation region; a second dielectric fin adjacent the isolation region and the power rail contact; a first source/drain region on the second dielectric fin; and a source/drain contact between the first source/drain region and the first dielectric fin, the source/drain contact contacting a top surface of the first source/drain region, a side surface of the first source/drain region, and a top surface of the power rail contact.

Abstract: A semiconductor device includes a substrate, a first semiconductor fin and a second semiconductor fin protruding from the substrate, an isolation feature disposed on the substrate and on sidewalls of the first and second semiconductor fins, a gate structure disposed on the isolation feature. The semiconductor device also includes a dielectric fin disposed on the isolation feature and sandwiched between the first and second semiconductor fins. A middle portion of the dielectric fin separates the gate structure into a first gate structure segment engaging the first semiconductor fin and a second gate structure segment engaging the second semiconductor fin.

Abstract: A method for forming a semiconductor arrangement comprises forming a fin over a semiconductor layer. A gate structure is formed over a first portion of the fin. A second portion of the fin adjacent to the first portion of the fin and a portion of the semiconductor layer below the second portion of the fin are removed to define a recess. A stress-inducing material is formed in the recess. A first semiconductor material is formed in the recess over the stress-inducing material. The first semiconductor material is different than the stress-inducing material.

Abstract: A semiconductor device includes a substrate, semiconductor wires disposed over the substrate, a gate structure wrapping around each of the semiconductor wires, and an epitaxial source/drain (S/D) feature in contact with the semiconductor wires. A portion of the epitaxial S/D feature is horizontally surrounded by an air gap.

Abstract: A battery connector is disclosed. An insulating body has a first accommodating space and a limiting portion, and a second accommodating space, which is in communication with the first accommodating space, is provided above the first accommodating space and the limiting portion. In assembly, the battery is guided downward into the second accommodating space, and the battery is pressed downward such that the battery passes the limiting portion to enter the first accommodating space and abut a positive pole terminal and a negative pole terminal, thus achieving assembly of the battery conveniently, and effectively preventing the battery from falling out of the insulating body.

Abstract: An integrated circuit (IC) structure includes a gate structure, a source epitaxial structure, a drain epitaxial structure, a front-side interconnection structure, a backside dielectric layer, an epitaxial regrowth layer, and a backside via. The source epitaxial structure and the drain epitaxial structure are respectively on opposite sides of the gate structure. The front-side interconnection structure is over a front-side of the source epitaxial structure and a front-side of the drain epitaxial structure. The backside dielectric layer is over a backside of the source epitaxial structure and a backside of the drain epitaxial structure. The epitaxial regrowth layer is on the backside of a first one of the source epitaxial structure and the drain epitaxial structure. The backside via extends through the backside dielectric layer and overlaps the epitaxial regrowth layer.

Abstract: A novel Self-Locking Optoelectronic Tweezers (SLOT) for single microparticle manipulation across a large area is provided. DEP forces generated from ring-shape lateral phototransistors are utilized for locking single microparticles or cells in the dark state. The locked microparticles or cells can be selectively released by optically deactivating these locking sites.

Abstract: The present invention relates to amantadine nitrate compounds having neural protective effect, and preparation method and medical use thereof. The compounds have the structure of the general formula (II). The compounds have multifunctional mechanisms, including inhibiting NMDA receptors, releasing NO, inhibiting calcium influxes, and having protective effects on cells particularly neurocytes. The compounds can be used in the preparation of medicaments having a cellular protective effect, for prevention or treatment of the diseases related to such as NMDA receptors and elevation of calcium anions in cells, including the diseases related to neurodegeneration such as Alzheimer's disease, Parkinson's disease, cerebral paralysis and glaucoma, and the diseases related to cardio-cerebral-vascular system such as Parkinson's syndrome combined with cerebral arteriosclerosis, as well as respiratory tract infections caused by influenza virus.

Abstract: A field effect transistor includes a semiconductor substrate, source and drain regions, lower source and drain contacts, a metal gate, a first interlayer dielectric layer, a capping layer, and an etch stop layer. The source and drain regions are disposed on the semiconductor substrate. The lower source and drain contacts are disposed on the source and drain regions. The metal gate is disposed in between the lower source and drain contacts. The first interlayer dielectric layer encircles the metal gate and the lower source and drain contacts. The capping layer is disposed on the metal gate. The etch stop layer extends on the first interlayer dielectric layer. An etching selectivity for the etch stop layer over the capping layer is greater than 10.

Abstract: A semiconductor device and method of manufacture which utilize isolation structures between semiconductor regions is provided. In embodiments different isolation structures are formed between different fins in different regions with different spacings. Some of the isolation structures are formed using flowable processes. The use of such isolation structures helps to prevent damage while also allowing for a reduction in spacing between different fins of the devices.

Abstract: In an embodiment, a device includes: a first interconnect structure including metallization patterns; a second interconnect structure including a power rail; a device layer between the first interconnect structure and the second interconnect structure, the device layer including a first transistor, the first transistor including an epitaxial source/drain region; and a conductive via extending through the device layer, the conductive via connecting the power rail to the metallization patterns, the conductive via contacting the epitaxial source/drain region.

Abstract: In an embodiment, a device includes: a first fin; a gate structure over the first fin; a first source/drain region adjacent the gate structure; an etch stop layer over the first source/drain region; a conductive line over the etch stop layer, the conductive line isolated from the first source/drain region by the etch stop layer, a top surface of the conductive line being coplanar with a top surface of the gate structure; and a power rail contact extending through the first fin, the power rail contact connected to the first source/drain region.

Abstract: The present disclosure provides a method of forming a semiconductor device including an nFET structure and a pFET structure where each of the nFET and pFET structures include a semiconductor substrate and a gate trench. The method includes depositing an interfacial layer in each gate trench; depositing a first metal oxide layer over the interfacial layer; removing the first metal oxide layer from the pFET structure; depositing a ferroelectric layer in each gate trench; depositing a second metal oxide layer over the ferroelectric layer; removing the second metal oxide layer from the nFET structure; and depositing a gate electrode in each gate trench.

Abstract: Microfluidic devices in which electrokinetic mechanisms move droplets of a liquid or particles in a liquid are described. The devices include at least one electrode that is optically transparent and/or flexible.