Patents by Inventor Pei Yu

Pei Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • TWO TIER AUTOMATIC COST ESTIMATION FOR AUTOMATIC MANUFACTURE OF SPARE PARTS
    Publication number: 20200042889
    Abstract: Techniques for automatically manufacturing mechanical parts are described. A first estimate of manufacturing cost for a first mechanical part is generated using a first machine learning model. In response to determining that the first estimate of manufacturing cost for the first mechanical part falls within a range of effectivity for the first machine learning model, a second estimate of manufacturing cost for the first mechanical part is generated using a second machine learning model. An expected cost error in the second estimate of manufacturing cost for the first mechanical part is determined, and upon determining that the expected cost error falls within a pre-determined acceptable range, automatic manufacturing of the first mechanical part is facilitated.
    Type: Application
    Filed: August 2, 2018
    Publication date: February 6, 2020
    Inventors: Pei Yu LIN, Joseph F. RICE, Andrey A. ZAIKIN
  • Electronic device
    Patent number: 10553563
    Abstract: An electronic device includes a top carrier having a first top surface and a first bottom surface, a first electronic element formed on the first top surface, a second electronic element formed on the first bottom surface, a bottom carrier below the top carrier and having a second top surface near the top carrier, and a controller formed on the second top surface.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: February 4, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Min-Hsun Hsieh, Jai-Tai Kuo, Chang-Hsieh Wu, Tzu-Hsiang Wang, Chi-Chih Pu, Ya-Wen Lin, Pei-Yu Li
  • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20200035805
    Abstract: In a method for manufacturing a semiconductor device, a gate structure is formed over a channel layer and an isolation insulating layer. A first sidewall spacer layer is formed on a side surface of the gate structure. A sacrificial layer is formed so that an upper portion of the gate structure with the first sidewall spacer layer is exposed from the sacrificial layer and a bottom portion of the gate structure with the first sidewall spacer layer is embedded in the first sacrificial layer. A space is formed between the bottom portion of the gate structure and the sacrificial layer by removing at least part of the first sidewall spacer layer. After the first sidewall spacer layer is removed, an air gap is formed between the bottom portion of the gate structure and the sacrificial layer by forming a second sidewall spacer layer over the gate structure.
    Type: Application
    Filed: September 26, 2019
    Publication date: January 30, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Hsiung LIN, Chia-Hao CHANG, Chih-Hao WANG, Wai-Yi LIEN, Chih-Chao CHOU, Pei-Yu WANG
  • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20200027960
    Abstract: In a method for manufacturing a semiconductor device, a gate structure is formed over a channel layer and an isolation insulating layer. A first sidewall spacer layer is formed on a side surface of the gate structure. A sacrificial layer is formed so that an upper portion of the gate structure with the first sidewall spacer layer is exposed from the sacrificial layer and a bottom portion of the gate structure with the first sidewall spacer layer is embedded in the first sacrificial layer. A space is formed between the bottom portion of the gate structure and the sacrificial layer by removing at least part of the first sidewall spacer layer. After the first sidewall spacer layer is removed, an air gap is formed between the bottom portion of the gate structure and the sacrificial layer by forming a second sidewall spacer layer over the gate structure.
    Type: Application
    Filed: September 27, 2019
    Publication date: January 23, 2020
    Inventors: Chun-Hsiung LIN, Chia-Hao CHANG, Chih-Hao WANG, Wai-Yi LIEN, Chih-Chao CHOU, Pei-Yu WANG
  • Method for Metal Gate Cut and Structure Thereof
    Publication number: 20200006075
    Abstract: A method includes providing a structure having a substrate, first and second semiconductor fins extending from the substrate, and a dielectric fin between the first and second semiconductor fins; forming a temporary gate on top and sidewalls of the first and second semiconductor fins and the dielectric fin; forming gate spacers on sidewalls of the temporary gate; removing the temporary gate and a first portion of the dielectric fin between the gate spacers; forming a gate between the gate spacers and on top and sidewalls of the first and second semiconductor fins, wherein the dielectric fin is in physical contact with sidewalls of the gate; removing a second portion of the dielectric fin, thereby exposing the sidewalls of the gate; and performing an etching process to the gate through the exposed sidewalls of the gate, thereby separating the gate into a first gate segment and a second gate segment.
    Type: Application
    Filed: March 27, 2019
    Publication date: January 2, 2020
    Inventors: Pei-Yu Wang, Zhi-Chang Lin, Ching-Wei Tsai, Kuan-Lun Cheng
  • MICROFLUIDIC DEVICES WITH FLEXIBLE OPTICALLY TRANSPARENT ELECTRODES
    Publication number: 20190388890
    Abstract: Microfluidic devices in which electrokinetic mechanisms move droplets of a liquid or particles in a liquid are described. The devices include at least one electrode that is optically transparent and/or flexible.
    Type: Application
    Filed: April 29, 2019
    Publication date: December 26, 2019
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Pei-Yu E. Chiou, Kuo-Wei Huang, Igor Y. Khandros, Ming C. Wu
  • ARTIFICIAL JOINT
    Publication number: 20190388230
    Abstract: An artificial joint includes a first joint assembly and a second joint assembly. The first joint assembly is adapted to be connected to a first bone and has a first contacting surface, wherein the first contacting surface includes a first convex arc surface, a second convex arc surface, and a third convex arc surface. The second joint assembly is adapted to be connected to a second bone and has a second contacting surface, wherein the second contacting surface is in contact with the first contacting surface and includes a first concave arc surface, a second concave arc surface, and a third concave arc surface, and the first concave arc surface, the second concave arc surface, and the third concave arc surface respectively correspond to the first convex arc surface, the second convex arc surface, and the third convex arc surface.
    Type: Application
    Filed: December 19, 2018
    Publication date: December 26, 2019
    Applicants: Industrial Technology Research Institute, National Taiwan University Hospital
    Inventors: Pei-I Tsai, Hsin-Hsin Shen, Kuo-Yi Yang, De-Yau Lin, Yi-Hung Wen, Chih-Chieh Huang, Wei-Luan Fan, Pei-Yu Chen, Ching-Chi Hsu
  • Semiconductor device and method of manufacturing the same
    Patent number: 10510860
    Abstract: In a method for manufacturing a semiconductor device, a gate structure is formed over a channel layer and an isolation insulating layer. A first sidewall spacer layer is formed on a side surface of the gate structure. A sacrificial layer is formed so that an upper portion of the gate structure with the first sidewall spacer layer is exposed from the sacrificial layer and a bottom portion of the gate structure with the first sidewall spacer layer is embedded in the first sacrificial layer. A space is formed between the bottom portion of the gate structure and the sacrificial layer by removing at least part of the first sidewall spacer layer. After the first sidewall spacer layer is removed, an air gap is formed between the bottom portion of the gate structure and the sacrificial layer by forming a second sidewall spacer layer over the gate structure.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: December 17, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Hsiung Lin, Chia-Hao Chang, Chih-Hao Wang, Wai-Yi Lien, Chih-Chao Chou, Pei-Yu Wang
  • METHOD FOR CANCER GRADING
    Publication number: 20190376953
    Abstract: The invention relates to a method for establishing an index for a given cancer grade. The method includes profiling glycan distribution pattern of a reference cancer cell sample; adsorbing the profiled reference cancer cell sample with adsorbents; measuring the amount of the adsorbents adhering onto the profiled reference cancer cell sample; and acquiring reference correlations between the glycan distribution pattern of the reference cancer cell sample and the amount of the adsorbents adhering onto the profiled reference cancer cell sample to form the index of the given cancer grade. An index for a given cancer grade and a method for grading cancer of a test cell sample are also provided.
    Type: Application
    Filed: June 7, 2018
    Publication date: December 12, 2019
    Inventors: YAO-CHANG LEE, PEI-YU HUANG
  • ELECTRONIC DEVICE
    Publication number: 20190371764
    Abstract: An electronic device includes a top carrier having a first top surface and a first bottom surface, a first electronic element formed on the first top surface, a second electronic element formed on the first bottom surface, a bottom carrier below the top carrier and having a second top surface near the top carrier, and a controller formed on the second top surface.
    Type: Application
    Filed: May 30, 2018
    Publication date: December 5, 2019
    Inventors: Min-Hsun HSIEH, Jai-Tai KUO, Chang-Hsieh WU, Tzu-Hsiang WANG, Chi-Chih PU, Ya-Wen LIN, Pei-Yu LI
  • MULTI-FLUX MICROFLUIDIC CHIP FOR NUCLEIC ACID DETECTION AND CAPABLE OF ACTIVELY CONTROLLING FLOW PATH, AND USE METHOD THEREOF
    Publication number: 20190351412
    Abstract: The present invention discloses a multi-flux microfluidic chip for nucleic acid detection and capable of actively controlling a flow path, and a use method thereof. The detection chip includes a chip body, and the chip body is provided with a sample loading chamber, a reaction chamber, and a microfluidic channel, where there is a plurality of reaction chambers, and the microfluidic channel includes a sample output main channel and several sample distribution channels.
    Type: Application
    Filed: December 6, 2017
    Publication date: November 21, 2019
    Applicant: Nanjing Lansion Biotechnology Co., Ltd.
    Inventors: Xingshang XU, Jeffery CHEN, Tao ZHU, Pei YU
  • Efficient delivery of large cargos into cells on a porous substrate
    Patent number: 10472651
    Abstract: In various embodiments, method and devices for delivering large cargos (e.g., organelles, chromosomes, bacteria, and the like) into cells are provided. In certain embodiments method of delivering a large cargo into eukaryotic cells, are provided that involve providing eukaryotic cells disposed on one side of a porous membrane; providing the cargo to be delivered in a solution disposed in a reservoir chamber on the opposite side of the porous membrane; and applying pressure to the reservoir chamber sufficient to pass the cargo through pores comprising said porous membrane wherein said cargo passes through cell membranes and into the cells.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: November 12, 2019
    Assignee: The Regents of the University of California
    Inventors: Ting-Hsiang S. Wu, Pei-Yu E. Chiou, Michael A. Teitell
  • Method of manufacturing light emitting diodes having a supporting layer attached to temporary adhesive
    Patent number: 10468361
    Abstract: A method for manufacturing at least one light emitting diode (LED) includes epitaxying at least one light emitting diode (LED) structure on a growth substrate; forming at least one supporting layer on the LED structure; temporarily adhering the supporting layer to a carrier substrate through an adhesive layer, in which the supporting layer has a Young's modulus greater than that of the adhesive layer; and removing the growth substrate from the LED structure.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: November 5, 2019
    Assignee: MIKRO MESA TECHNOLOGY CO., LTD.
    Inventors: Li-Yi Chen, Shih-Chyn Lin, Hsin-Wei Lee, Pei-Yu Chang
  • Self-locking optoelectronic tweezer and its fabrication
    Patent number: 10465154
    Abstract: A novel Self-Locking Optoelectronic Tweezers (SLOT) for single microparticle manipulation across a large area is provided. DEP forces generated from ring-shape lateral phototransistors are utilized for locking single microparticles or cells in the dark state. The locked microparticles or cells can be selectively released by optically deactivating these locking sites.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: November 5, 2019
    Assignee: The Regents of the University of California
    Inventors: Yajia Yang, Yufei Mao, Pei-Yu E. Chiou, Chi On Chui
  • RUNTIME POWER TABLE INDEX ADJUSTMENT FOR PERFORMANCE AND POWER MANAGEMENT
    Publication number: 20190332157
    Abstract: Power and performance of a multi-core system is managed dynamically by adjusting power table indices at runtime. Runtime statistics is measured, when an application is executed on a first core of a first type at a first operating point (OPP) in a first time period, and on a second core of a second core type at a second OPP in a second time period. A controller estimates, based on the runtime statistics, a first pair of indices associated with a first OPP for the first core and a second pair of indices associated with a second OPP for the second core. During runtime, the controller incorporates the first pair of indices and the second pair of indices into power table indices; and determines, from the power table indices, selected indices associated with a selected OPP of a core of a selected core type for executing the application.
    Type: Application
    Filed: April 26, 2018
    Publication date: October 31, 2019
    Inventors: Jih-Ming Hsu, Tai-Hua Lu, Pei-Yu Huang, Chien-Yuan Lai, Shu-Hsuan Chou, I-Cheng Cheng, Yun-Ching Li, Ming Hsien Lee
  • Photothermal substrates for selective transfection of cells
    Patent number: 10435661
    Abstract: This invention provides novel tools for surgery on single cells and substrates/devices for delivery of reagents to selected cells. In certain embodiments the substrates comprise a surface comprising one or more orifices, where nanoparticles and/or a thin film is deposited on a surface of said orifice or near said orifice, where the nanoparticles and/or a thin film are formed of materials that heat up when contacted with electromagnetic radiation. In certain embodiments the pores are in fluid communication with microchannels containing one or more reagents to be delivered into the cells.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: October 8, 2019
    Assignee: The Regents of the University of California
    Inventors: Pei-Yu E. Chiou, Ting-Hsiang S. Wu, Sheraz Kalim Butt, Michael A. Teitell
  • DETECTION OF VEHICLE QUEUEING EVENTS ON A ROAD
    Publication number: 20190304298
    Abstract: A method, system and computer program product are provided for detecting vehicle queue events and managing traffic flow. A computing system recognizes whether a queue event occurred for each vehicle located in an area of interest based on collected vehicle data. The area of interest includes an intersection, and the vehicle data for the each vehicle includes location information and speed information. The location information further includes a distance to an intersection. The computing system identifies differences in queue length among queues in the area of interest based on the vehicle data and determines queue indicators for each of the queues in the area of interest. Based on queue indicators for each of the queues in in the area of interest generated over multiple sampling periods, traffic signal lights at the intersection in the area of interest are managed.
    Type: Application
    Filed: June 18, 2019
    Publication date: October 3, 2019
    Inventors: Jing Xu, Yang Zhang, Jun Wang, Ji Hui Yang, Wen Pei Yu
  • Pyrazine derivative, and preparation method and medical use thereof
    Publication number: 20190276413
    Abstract: The present invention relates to a pyrazine derivative, and preparation method and medical use thereof. The pyrazine derivative can remove free radicals and suppress calcium overload and has cytoprotective effects, and can be used for the prevention and treatment of cardiovascular and cerebrovascular diseases, neurodegenerative diseases and other related diseases.
    Type: Application
    Filed: July 4, 2016
    Publication date: September 12, 2019
    Applicant: GUANGZHOU MAGPIE PHARMACEUTICALS CO., LTD.
    Inventors: Yuqiang WANG, Pei YU, Yewei SUN, Luchen SHAN, Gaoxiao ZHANG, Zaijun ZHANG, Peng YI
  • Lighting system and multi-mode lighting device thereof and controlling method
    Patent number: 10412815
    Abstract: A lighting system and a multi-mode lighting device thereof are provided. The multi-mode lighting device includes a wireless communication unit, a lighting unit, a projection unit, and a processing unit. The processing unit is coupled to the wireless communication unit, the lighting unit, and the projection unit. The processing unit is configured to selectively operate in one of multiple modes, wherein the multiple modes include a lighting mode and a projection mode. The processing unit is adapted to control the lighting unit to provide illumination light when the processing unit operates in the lighting mode. The processing unit is adapted to receive a video signal provided by an electronic device via the wireless communication unit and control the projection unit to project an image based on the video signal when the processing unit operates in the projection mode.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: September 10, 2019
    Assignee: Coretronic Corporation
    Inventors: Chih-Chen Chen, Pei-Yu Li, Kuei-Chin Lai
  • DYNAMIC VCOM COMPENSATION
    Publication number: 20190228732
    Abstract: A display includes a plurality of pixels grouped into a plurality of lines of pixels. Each line of pixels of the plurality of lines comprises a group of pixels of the plurality of pixels that are coupled to a common scan line as well and that are coupled to different data lines to individually activate each pixel of the group of pixels. The display also includes a common voltage (VCOM) driving circuit configured to receive a waveform and drive the waveform to the display as a VCOM having a value tailored to an individually activated pixel of the group of pixels.
    Type: Application
    Filed: September 28, 2018
    Publication date: July 25, 2019
    Inventors: Pei-Yu Hou, Yang Li, Hao-Lin Chiu