Abstract: A method for removing from a microelectronic device structure a noble metal residue including at least one metal selected from the group consisting of platinum, palladium, iridium and rhodium, by contacting the microelectronic device structure with a cleaning gas including a reactive halide composition, e.g., XeF2, SF6, SiF4, Si2F6 or SiF3 and SiF2 radicals. The method may be carried out in a batch-cleaning mode, in which fresh charges of cleaning gas are successively introduced to a chamber containing the residue-bearing microelectronic device structure. Each charge is purged from the chamber after reaction with the residue, and the charging/purging is continued until the residue has been at least partially removed to a desired extent. Alternatively, the cleaning gas may be continuously flowed through the chamber containing the microelectronic device structure, until the noble metal residue has been sufficiently removed.

Abstract: A ferroelectric capacitor device structure, including a ferroelectric stack capacitor comprising a ferroelectric material capacitor element on a substrate containing buried transistor circuitry beneath an insulator layer having a via therein containing a conductive plug to the transistor circuitry, wherein E-fields are structurally confined to the ferroelectric capacitor material element.

Abstract: A low temperature CVD process using a tris (&bgr;-diketonate) bismuth precursor for deposition of bismuth ceramic thin films suitable for integration to fabricate ferroelectric memory devices. Films of amorphous SBT can be formed by CVD and then ferroannealed to produce films with Aurivillius phase composition having superior ferroelectric properties suitable for manufacturing high density FRAMs.

Abstract: A novel lead zirconium titanate (PZT) material having unique properties and application for PZT thin film capacitors and ferroelectric capacitor structures, e.g., FeRAMs, employing such thin film material. The PZT material is scalable, being dimensionally scalable, pulse length scalable and/or E-field scalable in character, and is useful for ferroelectric capacitors over a wide range of thicknesses, e.g., from about 20 nanometers to about 150 nanometers, and a range of lateral dimensions extending to as low as 0.15 &mgr;m. Corresponding capacitor areas (i.e., lateral scaling) in a preferred embodiment are in the range of from about 104 to about 10−2 &mgr;m2. The scalable PZT material of the invention may be formed by liquid delivery MOCVD, without PZT film modification techniques such as acceptor doping or use of film modifiers (e.g., Nb, Ta, La, Sr, Ca and the like).

Abstract: A ferroelectric capacitor device structure, including a ferroelectric stack capacitor comprising a ferroelectric material capacitor element on a substrate containing buried transistor circuitry beneath an insulator layer having a via therein containing a conductive plug to the transistor circuitry, wherein E-fields are structurally confined to the ferroelectric capacitor material element.

Abstract: A low temperature CVD process using a tris (&bgr;-diketonate) bismuth precursor for deposition of bismuth ceramic thin films suitable for integration to fabricate ferroelectric memory devices. Films of amorphous SBT can be formed by CVD and then ferroannealed to produce films with Aurivillius phase composition having superior ferroelectric properties suitable for manufacturing high density FRAMs.

Abstract: A process for removing and/or dry etching noble metal-based material structures, e.g., iridium for electrode formation for a microelectronic device. Etch species are provided by plasma formation involving energization of one or more halogenated organic and/or inorganic substance, and the etchant medium including such etch species and oxidizing gas is contacted with the noble metal-based material under etching conditions. The plasma formation and the contacting of the plasma with the noble metal-based material can be carried out in a downstream microwave processing system to provide processing suitable for high-rate fabrication of microelectronic devices and precursor structures in which the noble metal forms an electrode, or other conductive element or feature of the product article.

Abstract: A method of fabricating an electrode structure for a ferroelectric device structure including a ferroelectric material, involving chemical vapor deposition of a hybrid electrode constituting a multilayer electrode structure or an alloyed electrode structure, using either bubbler delivery or liquid delivery chemical vapor deposition.

Abstract: A method for removing from a microelectronic device structure a noble metal residue including at least one metal selected from the group consisting of platinum, palladium, iridium and rhodium, by contacting the microelectronic device structure with a cleaning gas including a reactive halide composition, e.g., XeF2, SF6, SiF4, Si2F6 or SiF3 and SiF2 radicals. The method may be carried out in a batch-cleaning mode, in which fresh charges of cleaning gas are successively introduced to a chamber containing the residue-bearing microelectronic device structure. Each charge is purged from the chamber after reaction with the residue, and the charging/purging is continued until the residue has been at least partially removed to a desired extent. Alternatively, the cleaning gas may be continuously flowed through the chamber containing the microelectronic device structure, until the noble metal residue has been sufficiently removed.

Abstract: A microelectronic structure including adjacent material layers susceptible of adverse interaction in contact with one another, and a barrier layer interposed between said adjacent material layers, wherein said barrier layer comprises a binary, ternary or higher order metal nitride-carbide material, whose metal constituents are different from one another and include at least one metal selected from the group consisting of transition metals Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, W, Sc and Y, and optionally further including Al and/or Si. The barrier layer is stoichiometrically constituted to be amorphous or nanocrystalline in character, and may be readily formed by techniques such as chemical vapor deposition, sputtering, and plasma-assisted deposition, to provide a diffusional barrier of appropriate resistivity character for structures such as DRAMs or non-volatile ferroelectric memory cells.

Abstract: Chemical vapor deposition is used to form a film of Bi oxide, Sr oxide, and Ta oxide on a heated substrate by decomposing the precursors of these oxides at the surface of the substrate. The precursor of Bi oxide is a Bi complex which includes at least one carboxylate group and is decomposed and deposited at a temperature lower than 450° C. The film of Bi, Sr, and Ta oxides obtained by low-temperature CVD is predominantly non-ferroelectric, but can be converted into a ferroelectric film by a subsequent heating process.

Abstract: Chemical vapor deposition is used to form a film of Bi oxide, Sr oxide, and Ta oxide on a heated substrate by decomposing the precursors of these oxides at the surface of the substrate. The precursor of Bi oxide is a Bi complex which includes at least one amide group and is decomposed and deposited at a temperature lower than 450° C. The film of Bi, Sr, and Ta oxides obtained by low-temperature CVD is predominantly non-ferroelectric, but can be converted into a ferroelectric film by a subsequent heating process.

Abstract: The present invention is a method related to the deposition of a metallization layer in a trench in a semiconductor substrate. The focus of the invention is to sequentially perform heated deposition and etch unit processes to provide a good conformal film of metal on the inner surfaces of a via or trench. The deposition and etch steps can also be performed simultaneously.

Abstract: A showerhead disperser device for mixing plural vapor streams, comprising: a housing including front and rear walls in spaced apart relation to one another, and a side wall therebetween, defining within the housing an interior volume; the front wall having a multiplicity of vapor mixture discharge openings therein, for discharging mixed vapor from the interior volume of the housing exteriorly thereof, flow passages joined to the housing for introducing into the interior volume of the housing respective fluids to be mixed therein; and at least one baffle plate mounted in the interior volume of the housing, intermediate the front and rear walls of the housing, the baffle plate having an edge in spaced relation to the side wall to form an annular flow passage therebetween and the baffle plate having at least one of the respective fluids directed thereagainst upon introduction to the interior volume of the housing, for distribution thereof in the interior volume of the housing.

Abstract: There is disclosed a structure of and a method for fabricating a ferroelectric film on a non-conductive substrate. An adhesion layer, e.g., a layer of silicon dioxide and a layer of zirconium oxide, is deposited over a substrate. A conductive layer, e.g., a noble metal, a non-noble metal, or a conductive oxide, is deposited over the adhesion layer. A seed layer, e.g., a compound containing lead, lanthanum, titanium, and oxygen, with a controlled crystal lattice orientation, is deposited on the conductive layer. This seed layer has ferroelectric properties. Over the seed layer, another ferroelectric material, e.g., lead zirconium titanate, can be deposited with a tetragonal or rhombohedral crystalline lattice structure with predetermined and controlled crystal orientation.

Abstract: A method of fabricating a ferroelectric capacitor structure by sequentially depositing a bottom electrode layer, a ferroelectric layer and a top electrode layer on a base structure, optionally with deposition of a layer of a conductive barrier material beneath the bottom electrode layer, to form a capacitor precursor structure, and planarizing the capacitor precursor structure by chemical mechanical polishing to yield the ferroelectric capacitor structure, e.g., a stack capacitor or trench capacitor. The process is carried out without dry etching of the electrode layers or dry etching of the ferroelectric layer, to yield ferroelectric capacitors having a very small feature size, as for example between 0.10 and 0.20 .mu.m.

Abstract: A chemical vapor deposition (CVD) method for forming a multi-component oxide layer. There is first provided a chemical vapor deposition (CVD) reactor chamber. There is then positioned within the chemical vapor deposition (CVD) reactor chamber a substrate. There is then formed over the substrate a multi-component oxide precursor layer. The multi-component oxide precursor layer is formed from at minimum a first precursor reactant source material and a second precursor reactant source material introduced simultaneously into the chemical vapor deposition (CVD) reactor chamber in absence of an oxidant reactant source material. There is then oxidized with the oxidant reactant source material within the chemical vapor deposition (CVD) reactor chamber the multi-component oxide precursor layer formed over the substrate to form a multi-component oxide layer formed over the substrate.

Abstract: A liquid delivery system for delivery of an initially liquid reagent in vaporized form to a chemical vapor deposition reactor arranged in vapor-receiving relationship to the liquid delivery system.

Abstract: A system for the deposition of a multicomponent material layer on a substrate from respective liquid precursors for components of the multicomponent material layer, comprising: a vapor deposition zone; and multiple vaporizer units, each of which is joined (i) to at least one source of liquid precursor for supplying at least one liquid precursor thereto, and (ii) in vapor flow communication with the vapor deposition zone arranged to retain the substrate therein, for deposition on the substrate of vapor phase species from precursor vapor formed by vaporization of liquid precursors in the vaporizer units of the system.

Abstract: A showerhead disperser device for mixing plural vapor streams, comprising: a housing including front and rear walls in spaced apart relation to one another, and a side wall therebetween, defining within the housing an interior volume; the front wall having a multiplicity of vapor mixture discharge openings therein, for discharging mixed vapor from the interior volume of the housing exteriorly thereof, flow passages joined to the housing for introducing into the interior volume of the housing respective fluids to be mixed therein; and at least one baffle plate mounted in the interior volume of the housing, intermediate the front and rear walls of the housing, the baffle plate having an edge in spaced relation to the side wall to form an annular flow passage therebetween and the baffle plate having at least one of the respective fluids directed thereagainst upon introduction to the interior volume of the housing, for distribution thereof in the interior volume of the housing.