Abstract: A system and method for operating on data within a network device is described. Between two data operations in a network device is a FIFO queue, which is used to separate the clock domains of the data operations. Data from the first operation is stored in the FIFO queue, which signals an indication to the second operation that there is data in the queue. When the second operation is signaled that there is data in the FIFO queue, it immediately begins reading data from the queue, and begins performing its prescribed operations on the data once it has read enough data from the queue for it to begin operating.

Abstract: A static random access memory may use independent double gate transistors to form the pull up transistors. The other transistors of the memory are not formed of independent double gate transistors. In some embodiments, a reduced layout size may be achieved. In addition, in some embodiments, it is not necessary to form separately created polysilicon strips to form the two transistors. Finally, in some embodiments, the need for end caps may be eliminated.

Abstract: Methods for forming a wire from silicon or other semiconductor material are disclosed. Also disclosed are various devices including such a semiconductor wire. According to one embodiment, a wire is spaced apart from an underlying substrate, and the wire extends between a first end and an opposing second end, each of the first and second ends being affixed to the substrate. Other embodiments are described and claimed.

Abstract: A doubled gate, dynamic storage device and method of fabrication are disclosed. A back (bias gate) surrounds three sides of a semiconductor body with a front gate disposed on the remaining surface. Two different gate insulators and gate materials may be used.

Abstract: An apparatus including a first diffusion formed on a substrate, the first diffusion including a pair of channels, each of which separates a source from a drain; a second diffusion formed on the substrate, the second diffusion including a channel that separates a source from a drain; a first gate electrode formed on the substrate, wherein the first gate electrode overlaps one of the pair of channels on the first diffusion to form a pass-gate transistor; and a second gate electrode formed on the substrate, wherein the second gate electrode overlaps one of the pair of channels of the first diffusion to form a pull-down transistor and overlaps the channel of the second diffusion to form a pull-up transistor, and wherein the pass-gate, pull-down and pull-up transistors are of at least two different constructions. Other embodiments are disclosed and claimed.

Abstract: A multi-part substitution infusion fluid for an extracorporeal blood treatment and methods for using same are provided. Generally, the multi-part substitution fluid comprises a first solution composed of electrolites but without divalent cations and a second solution comprising divalent cations. Another embodiment includes a third solution comprising a matching citrate/citric acid anticoagulant. The described methods of using the multi-part substitution infusion fluids significantly reduce risks associated with various extracorporeal blood treatments.

Abstract: Dual-gate memory cells and tri-gate CMOS devices are integrated on a common substrate. A plurality of silicon bodies are formed from a monocrystalline silicon on the substrate to define a plurality of transistors including dual-gate memory cells, PMOS transistors, and NMOS transistors. An insulative layer is formed overlying the silicon body of the memory cell. A layer of a high-k dielectric and at least a metal layer cover the silicon bodies and their overlying layers. Next, gain regions of the transistors are filled with polysilicon. Thus, a gate is formed on the top surface and both sidewalls of a tri-gate transistor. Thereafter, the high-k dielectric and the metal layer overlying the insulative layer of the memory cell are removed to expose the insulative layer. Thus, two electrically-isolated gates of the memory cell are formed.

Abstract: A transmitter subsystem generates an optical signal which contains multiple subbands of information. The subbands have different polarizations. For example, in one approach, two or more optical transmitters generate optical signals which have different polarizations. An optical combiner optically combines the optical signals into a composite optical signal for transmission across an optical fiber. In another approach, a single optical transmitter generates an optical signal with multiple subbands. The polarization of the subbands is varied, for example by using a birefringent crystal. In another aspect of the invention, each optical transmitter generates an optical signal containing both a lower optical sideband and an upper optical sideband (i.e., a double sideband optical signal). An optical filter selects the upper optical sideband of one optical signal and the lower optical sideband of another optical signal to produce a composite optical signal.

Abstract: Embodiments of the invention include a circuit with a transistor having a self-aligned gate. Insulating isolation structures may be formed, self-aligned to diffusions. The gate may then be formed self-aligned to the insulating isolation structures.

Abstract: Embodiments of the invention include a circuit with a transistor having a self-aligned gate. Insulating isolation structures may be formed, self-aligned to diffusions. The gate may then be formed self-aligned to the insulating isolation structures.

Abstract: The present invention discloses a horizontal sync detector circuit (10) comprising a filter portion (12), an equilibrium accumulator portion (14) coupled to the filter portion (12), a horizontal sync detector portion (16) coupled to the filter portion (12) and to the equilibrium accumulator portion (14), and an output logic portion (18) coupled to the horizontal sync detector portion (16), the output logic portion (18) adapted to produce a phase error (116) based on a combination of a coarse phase error (108) and a fine phase error (112).

Abstract: A transmitter subsystem generates an optical signal which contains multiple subbands of information. The subbands have different polarizations. For example, in one approach, two or more optical transmitters generate optical signals which have different polarizations. An optical combiner optically combines the optical signals into a composite optical signal for transmission across an optical fiber. In another approach, a single optical transmitter generates an optical signal with multiple subbands. The polarization of the subbands is varied, for example by using a birefringent crystal. In another aspect of the invention, each optical transmitter generates an optical signal containing both a lower optical sideband and an upper optical sideband (i.e., a double sideband optical signal). An optical filter selects the upper optical sideband of one optical signal and the lower optical sideband of another optical signal to produce a composite optical signal.

Abstract: A configurable memory system provides a high bandwidth, low latency, no wait state data path to a memory system functioning as a frame buffer for a digital video processing system. The configurable memory system has configurable channels that are programmable to control the access pattern of the memory controller. Once the configurable channels are programmed, the memory controller can generate the necessary address, timing, and control signals for selectively writing the data to and reading the data from the selected blocks of the array of memory devices continuously access the memory and move the data to the channel buffers. The channel buffer receives, retains, and transfers a defined segment of the data as defined by the segment pattern between the processing system and the array of memory devices, such that the processing system is able to transfer and receive the data continuously according to data requirements of the processing system.

Abstract: System and method for digitally correcting time base errors in video display systems. A preferred embodiment comprises 1) correcting time base errors in a first portion of a horizontal line of video information, wherein the first correcting makes use of an error estimate for the horizontal line of video information and a preceding horizontal line of video information, 2) correcting time base errors in a second portion of a horizontal line of video information, wherein the second correcting makes use of an error estimate for the horizontal line of video information, and 3) repeating the first correcting and the second correcting for remaining horizontal lines of video information in the digitized video signal.

Abstract: Self-aligned contacts for transistors and methods for fabricating the contacts are described. An etch resistant material is patterned to create an opening that resides above a transistor gate structure. A selective etch is performed through the opening that does not etch the transistor gate structure but does etch material that resides laterally with respect to the transistor gate structure in order to expose tops, immediately adjacent to the transistor gate structure, of drain and source regions of a diffusion layer of the transistor. Conductive material is deposited that covers respective tops of the drain and source regions of the diffusion layer of the transistor to a depth that does not short the drain and source region of the diffusion layer of the transistor. A layer above the conductive material is formed.

Abstract: A method for fabricating double-gate and tri-gate transistors in the same process flow is described. In one embodiment, a sacrificial layer is formed over stacks that include semiconductor bodies and insulative members. The sacrificial layer is planarized prior to forming gate-defining members. After forming the gate-defining members, remaining insulative member portions are removed from above the semiconductor body of the tri-gate device but not the I-gate device. This facilitates the formation of metallization on three sides of the tri-gate device, and the formation of independent gates for the I-gate device.

Abstract: A DRAM fabricated on an SOI substrate employing single body devices as memory cells without relying on a field through the insulative layer of the SOI is described. Floating body devices are defined by orthogonally disposed lines with both a front gate and back gate for each body being formed on the insulative layer.

Abstract: Baggage such as a backpack or shoulder bag includes a storage receptacle, a strap extending from the storage receptacle and serving to extend over a carrier's body to support the storage receptacle, and an electric vibrator attached to the strap in a position at which the strap is to be supported by the carrier's body in use. The permanent vibrator is intended to alleviate muscular aches and pains over prolonged carrying periods.