Abstract: A method for producing an assembly of particles bound by a substrate, including: making a compact film of solid particles floating on a carrier liquid, the solid particles potentially holding objects between them; spraying particles onto a face of the compact film opposite to the one immersed in a carrier liquid, to create a substrate-forming-skin adhering to the solid particles; and extracting an obtained assembly outside the carrier liquid.

Abstract: A device including a deformable shell delimiting an inner space, and a resilient band suspended in the inner space and including two ends secured to the deformable shell. The band includes a piezoelectric material to generate an electric voltage under the effect of the deformation of the shell and two electrodes for collecting the voltage. An electronic circuit for processing the voltage is arranged on the resilient band and connected to the electrodes of the resilient band.

Abstract: A device is provided, including a deformable shell defining an inner space including at least one piezoelectric system. The piezoelectric system includes a flexible piezoelectric membrane capable of generating electric energy under the effect of a deformation to which it is submitted, a rechargeable electric power source, formed on a flexible substrate, and an electronic circuit. The electronic circuit includes a processing circuit for generating and storing data according to the electric energy generated by the piezoelectric membrane, and connected to the electric power source for its electric power supply, and a wireless transmitter connected to the processing circuit to transmit the data stored therein and connected to the electric power source for its electric power supply. Each piezoelectric system is totally arranged on and/or inside of the deformable shell.

Abstract: An interface device comprises a layer of a material thoroughly crossed by metal electrodes intended to electrically connect two electronic circuits. According to the present invention, the layer of material comprises a graphene layer and the electrodes each comprise a central electrically-conductive element formed across the thickness of the graphene layer and an electrically-insulating peripheral layer, interposed between the central element and the graphene layer.

Abstract: A method for making a FET transistor, including the following steps: making, on a crystalline semiconducting layer, a layer of gate dielectric on which a gate conducting layer is arranged, etching the conducting layer such that a remaining portion of this layer fully covers a first semiconducting portion forming an active zone and a second semiconducting portion adjacent to the active zone, implanting atoms and/or dopants in the semiconducting layer, thus amorphizing the semiconductor around the first portion and that of the second portion, etching the remaining portion of the conducting layer and of the dielectric layer according to a gate pattern partially covering the first portion and the second portion, forming the gate and a gate overflow, etching the amorphous semiconductor.

Abstract: Method for fabricating transistors for an integrated 3D circuit, comprising: a) forming, on a given level of transistors made in a first semiconductor layer: a stack comprising a first region of a second semiconductor zone suitable for an N-type transistor channel and a second region of the second semiconductor zone suitable for a P-type transistor channel of a higher level, the stack moreover comprising a ground plane continuous layer (40), as well as an insulating layer between the ground plane and the second semiconductor layer, then b) exposing source and drain zones of the circuit to a laser (L), so as to carry out at least one thermal activation annealing, where the exposed source and drain zones are located next to an upper surface of the ground plane continuous layer, where the ground plane continuous layer is configured so as to protect at least a part of the circuit located on the side of a lower face of the ground plane continuous layer from the laser, then c) carrying out cutting up of the grou

Abstract: A process for depositing a compact film of particles on an internal surface of a part, including: a) placing the part in a carrier liquid; b) generating a carrier liquid stream in a hollow of the part towards a surface of the carrier liquid, to create a protuberance; c) dispensing the particles to form a compact film floating on the liquid between a contact line and an upstream front of particles; and d) transferring the film onto the internal surface by operating a relative displacement between the part and the surface of the carrier liquid, while continuing dispensing the particles on the upstream front.

Abstract: Method for fabricating transistors for an integrated 3D circuit, comprising: a) forming, on a given level of transistors made in a first semiconductor layer: a stack comprising a first region of a second semiconductor zone suitable for an N-type transistor channel and a second region of the second semiconductor zone suitable for a P-type transistor channel of a higher level, the stack moreover comprising a ground plane continuous layer (40), as well as an insulating layer between the ground plane and the second semiconductor layer, then b) exposing source and drain zones of the circuit to a laser (L), so as to carry out at least one thermal activation annealing, where the exposed source and drain zones are located next to an upper surface of the ground plane continuous layer, where the ground plane continuous layer is configured so as to protect at least a part of the circuit located on the side of a lower face of the ground plane continuous layer from the laser, then c) carrying out cutting up of the grou

Abstract: A method for making a FET transistor, including the following steps: making, on a crystalline semiconducting layer, a layer of gate dielectric on which a gate conducting layer is arranged, etching the conducting layer such that a remaining portion of this layer fully covers a first semiconducting portion forming an active zone and a second semiconducting portion adjacent to the active zone, implanting atoms and/or dopants in the semiconducting layer, thus amorphising the semiconductor around the first portion and that of the second portion, etching the remaining portion of the conducting layer and of the dielectric layer according to a gate pattern partially covering the first portion and the second portion, forming the gate and a gate overflow, etching the amorphous semiconductor.

Abstract: A system includes a hot source, a cold source, and a device thermally coupled between the hot source and the cold source. The device includes a thermal-mechanical transducer and a mechanical-electrical transducer. The thermal-mechanical transducer includes a band of bimetallic strips linked mechanically together by their longitudinal ends. The band partially suspended over a portion of a substrate. Each bimetallic strip has a first stable state having a first curvature and a second stable state having a second curvature opposite the first curvature, and adjacent bimetallic strips have opposite curvature.

Abstract: A method for transferring objects onto a substrate, or running substrate, the objects to be transferred being placed in a transfer area containing a carrier liquid forming a conveyor, the objects being held by a compact film of particles floating on the carrier liquid of the transfer area, within which the objects are displaced with the film of particles to be transferred onto the substrate, making at least one connector on at least one of the objects, the connector being made by a substance comprising a polymerizable compound, put in contact with the object arranged within the transfer area, and then by polymerization of the substance.

Abstract: Integrated circuit equipped with at least two levels of superimposed transistors, comprising: a first transistor at a first level, a first plug, a second plug and a third plug, connected to a drain region, a gate and a source region respectively of the first transistor, the first plug, the second plug and the third plug passing through an insulating layer covering the first transistor a second transistor equipped with an active zone defined in a semi-conducting layer arranged at one end of the plugs and facing the first transistor, the transistor comprising a gate arranged between the first plug and the third plug.

Abstract: Method for producing one or more connection elements for integrated circuit including the formation of sacrificial elements passing through a porous layer formed between two superimposed levels of transistors, then the removal of the sacrificial elements through the porous layer and their replacement by a conductor material before or after having produced a higher level transistor.

Abstract: A facility for depositing a film of ordered particles onto a moving substrate, the facility configured to allow deposition, onto the substrate, of a film of ordered particles escaping from a particle outlet of a transfer zone having a first width. The facility further includes an accessory device in a form of a deposit head, provided to seal the particle outlet and configured to allow the deposition, onto the substrate, of a film of ordered particles escaping from an end of a particle transfer channel of the deposit head, the end having a second width strictly lower than the first width.

Abstract: A method for forming a film of particles on a carrier liquid present in a receptacle, for depositing this film onto a substrate, the method including: making a film blank between a barrier and a head including a tilted ramp, the blank being obtained by dispensing particles via the tilted ramp and carried out until the particles floating on the carrier liquid occupy a space between the barrier and an upstream front of particles located on the tilted ramp; and elongating the film by continuing dispensing the particles, and moving the head to move away from the barrier, the film elongation being performed to hold a front of particles on the ramp.

Abstract: A device (10) including a deformable shell (12) delimiting an inner space (14), and: a resilient band (18, 30, 32) suspended in the inner space (14) and including two ends secured to the deformable shell (12), said band (18, 30, 32) including a piezoelectric material (30, 32) to generate an electric voltage under the effect of the deformation of the shell (12) and two electrodes for collecting the voltage; and an electronic circuit (34) for processing the voltage, arranged on the resilient band (18, 30, 32) and connected to the electrodes of the resilient band (18, 30, 32).

Abstract: System for converting thermal energy into electrical energy (S1) intended to be arranged between a hot source (SC) and a cold source (SF), comprising means for converting thermal energy into mechanical energy (6) and a piezoelectric material, with the means for converting thermal energy into mechanical energy (6) comprising groups (G1, G2) of at least three bimetallic strips (9, 11, 13) linked mechanically together by their longitudinal ends and suspended above a substrate (12), each bimetallic strip (9, 11, 13) comprising two stable states wherein it has in each of the states a curvature, with two directly adjacent bimetallic strips (9, 11, 13) having for a given temperature opposite curvatures, with the switching from one stable state of the bimetallic strips (9, 11, 13) to the other causing the deformation of a piezoelectric material.

Abstract: A device and method recovering heat energy and converting the heat energy into electrical energy by heat-sensitive molecules to which are connected magnetic particles, with the heat-sensitive molecules able to move the magnetic particles in relation to a conductive circuit to generate an induced current in the circuit.

Abstract: A method for producing a multilevel microelectronic structure includes formation of a first layer, production of at least one second layer at least partially covering the first layer, and production of at least one microelectronic pattern on or in the second layer. The second layer is formed so as to generate a mechanical stress in it, the first layer forms, for the second layer, a support preventing relaxation of the stress. After the production of at least one microelectronic pattern, the method includes at least elimination of at least part of the first layer, thus making it possible to relax at least part of the mechanical stress on the second layer so that at least a portion of the second layer covering the eliminated part of the first layer moves, and fixing the moved portion of the second layer to a structure part that has remained fixed.

Abstract: A method for depositing particles onto a substrate, or a running substrate, including: (a) making a compact film of particles floating on a carrier liquid provided in a transfer area having an outlet of particles laid out facing the substrate; (b) depositing a substance on the compact film of particles, in the transfer area; (c) transferring, through the outlet of particles and onto the substrate, the compact film of particles coated with the substance; and then (d) removing the substance to carry away with the substance the particles of the film which adhere to the substance, to generate at least one recessed area within the film deposited on the substrate.