Patents by Inventor Philippe Coronel

Philippe Coronel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140147583
    Abstract: A facility for depositing a film of ordered particles onto a moving substrate, the facility configured to allow deposition, onto the substrate, of a film of ordered particles escaping from a particle outlet of a transfer zone having a first width. The facility further includes an accessory device in a form of a deposit head, provided to seal the particle outlet and configured to allow the deposition, onto the substrate, of a film of ordered particles escaping from an end of a particle transfer channel of the deposit head, the end having a second width strictly lower than the first width.
    Type: Application
    Filed: July 10, 2012
    Publication date: May 29, 2014
    Applicant: Commissariat a I'energie atomique et aux ene alt
    Inventors: Olivier Dellea, Philippe Coronel, Pascal Fugier
  • Patent number: 8722234
    Abstract: The invention relates to a microbattery that comprises a stack on a substrate, covered by an encapsulation layer and comprising first and second current collector/electrode assemblies, a solid electrolyte and electrical connections of the second current collector/electrode assembly to an external electrical load. The electrical connections are formed by at least two electrically conductive barriers passing through the encapsulation layer from an inner surface to an outer surface of the encapsulation layer. Each of the barriers has a lower wall in direct contact with a front surface of the second current collector/electrode assembly and an upper wall opening onto the outer surface of the encapsulation layer. The barriers form a compartmentalization network within the encapsulation layer.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: May 13, 2014
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Sami Oukassi, Philippe Coronel
  • Patent number: 8710494
    Abstract: The organic memory device is a double-gate transistor that successively comprises a first gate electrode, a first gate dielectric, an organic semi-conductor material, a second gate dielectric and a second gate electrode. Source and drain electrodes are arranged in the organic semiconductor material and define an inter-electrode surface. A trapping area is arranged between the organic semiconductor material and one of the gate electrodes and is in electric contact with one of the gate electrodes or the organic semi-conductor material. The trapping area is at least facing the inter-electrode surface.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: April 29, 2014
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Romain Gwoziecki, Mohamed Benwadih, Philippe Coronel, Stéphanie Jacob
  • Patent number: 8674443
    Abstract: A support substrate comprises first and second counter-electrodes arranged in the same plane at the level of a surface of the support substrate. An electrically insulating area separates the first and second counter-electrodes. A semi-conducting area with first and second portions is separated from the support substrate by an electrically insulating material. The electrically insulating material is different from the material forming the support substrate. The first portion of the semi-conducting area is facing the first counter-electrode. The second portion of the semi-conducting area is facing the second counter-electrode.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: March 18, 2014
    Assignees: Commissariat à l'Energie Atomique et aux Energies Alternatives, STMicroelectronics (Crolles 2) SAS
    Inventors: Philippe Coronel, Claire Fenouillet-Beranger, Stephane Denorme, Olivier Thomas
  • Patent number: 8669171
    Abstract: A method is provided for eliminating catalyst residues that are present on the surface of solid structures. The solid structures are made from a first material and are obtained by catalytic growth from a substrate. The method includes the following steps: catalytically growing, from the catalyst residues, solid structures made from a second material; and selectively eliminating the solid structures made from the second material, thereby eliminating the catalyst residues.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: March 11, 2014
    Assignee: Commissariat a l'Energie Atmoique et aux Energies Alternatives
    Inventors: Simon Perraud, Philippe Coronel
  • Patent number: 8652583
    Abstract: The cavity has first and second main walls covered by a photoresist. The photoresist is subjected to electronic or electromagnetic radiation of wavelength comprised between 12.5 nm and 15 nm. A first thickness of the photoresist is exposed to form a first area of sacrificial material and a second area of different nature defining the surface coating. The sacrificial material is removed, the surface coating is formed and has a surface against one of the main walls and a free opposite surface. The lateral dimensions of the surface coating are defined in the cavity by the radiation through the first main wall.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: February 18, 2014
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternative
    Inventors: Romain Wacquez, Christophe Constancias, Philippe Coronel
  • Publication number: 20140014156
    Abstract: A method for manufacturing two series-connected photovoltaic cells includes: forming an insulating substrate; forming a stack including; a first conductive layer formed on the substrate; a semiconductor layer comprising a first absorption layer and a second semiconductor layer forming a junction with the first absorption layer; and a second transparent conductive layer, formed on the absorption layer; forming an area dividing the stack into two cells series-connected by an electric path. The forming of said path comprises: forming a first trench all the way to the substrate; forming a second trench all the way to the first conductive layer; and depositing a conductive solution on the first trench and at last a portion of the second trench, so that the solution does not penetrate into the first trench all the way to the first conductive layer and penetrates into the second trench all the way to the first conductive layer.
    Type: Application
    Filed: August 15, 2013
    Publication date: January 16, 2014
    Applicant: Commissariat A L'Energie Atomique Et Aux Energies Alternatives
    Inventors: Anne-Laure SEILER, Philippe CORONEL, Joël DUFOURCQ
  • Publication number: 20130330471
    Abstract: A facility for depositing a film of ordered particles onto a moving substrate, the facility including: a transfer area including an entry of particles and an exit of particles spaced apart from each other by two side edges facing each other, retaining a carrier liquid on which the particles float, a capillary bridge ensuring connection between the carrier liquid contained in the transfer area and the substrate, and a plurality of suction nozzles capable of attracting the particles towards its two side edges.
    Type: Application
    Filed: February 20, 2012
    Publication date: December 12, 2013
    Applicant: Commissariat a l'energie atomique et aux ene alt
    Inventors: Olivier Dellea, Pascal Fugier, Philippe Coronel
  • Publication number: 20130256937
    Abstract: A method for producing a conductive area in a polymer material comprises: providing a polymer layer comprising conductive particles with a density such that the polymer layer is insulating, heating the polymer material to a temperature higher than or equal to the glass transition temperature of the polymer material, compressing a portion of the polymer layer using a stamp, in order to obtain a density of conductive particles such that the portion becomes conductive, and removing the stamp from the polymer layer.
    Type: Application
    Filed: December 5, 2011
    Publication date: October 3, 2013
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Gilles Philippot, Philippe Coronel, Jacqueline Bablet, Mohamed Benwadih
  • Patent number: 8486817
    Abstract: A method for forming a level of a tridimensional structure on a first support in which components are formed, including the steps of forming, on a second semiconductor support, a single-crystal semiconductor substrate with an interposed thermal oxide layer; placing the free surface of the single-crystal semiconductor substrate on the upper surface of the first support; eliminating the second semiconductor support; and thinning down the thermal oxide layer down to a thickness capable of forming a gate insulator.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: July 16, 2013
    Assignees: STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS, Commissariat à l'Énergies Atomique et aux Énergies Alternatives
    Inventors: Perceval Coudrain, Philippe Coronel, Nicolas Buffet
  • Patent number: 8460978
    Abstract: A method of producing a transistor having parallel semiconductor nanofingers. The method includes: forming a monocrystalline layer of a semiconductor material on a layer of a subjacent material which can be selectively etched in relation to the monocrystalline layer; etching parallel partitions in the monocrystalline layer and in the subjacent layer and continuing said etching operation in order to hollow out part of the subjacent layer of material; filling the gap between the partitions and the hollowed-out part with a first insulating material; defining a central part of the partitions and removing the first insulating material from around the central part of the monocrystalline layer, thereby forming a finger of semiconductor material; and filling and coating the central part with a conductor material.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: June 11, 2013
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Philippe Coronel, Jessy Bustos, Romain Wacquez
  • Publication number: 20130104951
    Abstract: The thermoelectric module includes a first electric path including a first set of thermocouples electrically connected in series. It further includes a second electric path including a second set of thermocouples electrically connected in series, the number of thermocouples of the second set being smaller than the number of thermocouples of the first set.
    Type: Application
    Filed: May 3, 2011
    Publication date: May 2, 2013
    Inventors: Guillaume Savelli, Philippe Coronel, Marc Plissonnier
  • Publication number: 20130100985
    Abstract: The thermoelectric device includes a first leg made from a first material, anchored at the level of its first end to a support, and a second leg made from a second material, anchored at the level of its first end to said support. In addition, an electric connecting element provided with first and second contact areas is respectively in electric contact with the first leg and second leg so as to form a thermocouple. The device includes means for varying the position of the first and contact areas at the level of the first and second legs.
    Type: Application
    Filed: May 3, 2011
    Publication date: April 25, 2013
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Guillaume Savelli, Philippe Coronel, Marc Plissonnier
  • Publication number: 20130098416
    Abstract: A thermoelectric device includes first and second legs extending continuously between first and second heat sources. The first and second legs respectively include first and second conducting elements and third and fourth conducting elements. The first and third conducting elements are adjacent and separated by an insulator. The second and fourth conducting elements are adjacent and separated by an insulator. The device also includes selection means enabling formation of a first thermocouple from the first and second conducting elements and formation of a second thermocouple from the third and fourth conducting elements.
    Type: Application
    Filed: May 3, 2011
    Publication date: April 25, 2013
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Guillaume Savelli, Philippe Coronel, Marc Plissonnier
  • Publication number: 20130052552
    Abstract: A device forming a manometer, configured to measure pressure of a biphasic fluid in a fluidic network, including: a first channel inside which a biphasic fluid is able to flow; a second channel emerging into the first channel, wherein the second channel is blind, with each of its dimensions less than capillary length of the fluid's liquid phase, and with at least one of its lengthways wall having a surface energy gradient that decreases from its inlet to the end. The surface energy gradient enables the wetting angle of the meniscus of the fluid's liquid phase to be increased in the blind channel from its inlet to the end. Such a device may find application to measurement of pressure of a biphasic fluid in a heat exchanger or in a fuel cell.
    Type: Application
    Filed: April 27, 2011
    Publication date: February 28, 2013
    Applicant: Commissariat a l'energie atomique at aux energies alternatives
    Inventors: Hai Trieu Phan, Philippe Coronel, Pascal Fugier, Jérôme Gavillet
  • Patent number: 8383464
    Abstract: The method for producing a field effect transistor on a substrate comprising a support layer, a sacrificial layer and a semi-conducting layer comprises forming an active area in the semi-conducting layer. The active area is delineated by a closed peripheral insulation pattern and comprises an additional pattern made from insulating material. The method also comprises etching the insulating material of the additional pattern to access the sacrificial layer, etching the sacrificial layer resulting in formation of a first cavity, forming a dielectric layer on a top wall of the first cavity, and depositing an electrically conducting layer in the first cavity. The closed peripheral insulation pattern is formed through the semi-conducting layer and the sacrificial layer.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: February 26, 2013
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Claire Fenouillet-Beranger, Philippe Coronel
  • Patent number: 8368128
    Abstract: An etching mask, comprising the delineation pattern of the gate electrode, of a source contact, a drain contact and a counter-electrode contact, is formed on a substrate of semi-conductor on insulator type. The substrate is covered by a layer of dielectric material and a gate material. The counter-electrode contact is located in the pattern of the gate electrode. The gate material is etched to define the gate electrode, the source contact and drain contacts and the counter-electrode contact. A part of the support substrate is released through the pattern of the counter-electrode contact area. An electrically conductive material is deposited on the free part of the support substrate to form the counter-electrode contact.
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: February 5, 2013
    Assignees: Commissariat a l'Energie Atomique et aux Energies Alternatives, STMicroelectronics (Crolles 2) SAS
    Inventors: Claire Fenouillet-Béranger, Olivier Thomas, Philippe Coronel, Stéphane Denorme
  • Publication number: 20120321938
    Abstract: The invention relates to a microbattery that comprises a stack on a substrate, covered by an encapsulation layer and comprising first and second current collector/electrode assemblies, a solid electrolyte and electrical connections of the second current collector/electrode assembly to an external electrical load. The electrical connections are formed by at least two electrically conductive barriers passing through the encapsulation layer from an inner surface to an outer surface of the encapsulation layer. Each of the barriers has a lower wall in direct contact with a front surface of the second current collector/electrode assembly and an upper wall opening onto the outer surface of the encapsulation layer. The barriers form a compartmentalization network within the encapsulation layer.
    Type: Application
    Filed: February 23, 2011
    Publication date: December 20, 2012
    Inventors: Sami Oukassi, Philippe Coronel
  • Publication number: 20120292183
    Abstract: A water detection device comprising at least one fuel cell comprising a first electrode, a layer of electrolyte, a second electrode and an electrical measurement device characterized in that the first electrode of the cell is in contact with a first face of a porous silicon substrate comprising Si—H bonds, in such a manner as to liberate a flow of hydrogen in the presence of water. Advantageously, the substrate of porous silicon is incorporated into a first housing permeable to water, the fuel cell being incorporated into a second housing said second housing being impermeable to water and permeable to oxygen.
    Type: Application
    Filed: January 20, 2011
    Publication date: November 22, 2012
    Inventors: Jessica Thery, Philippe Coronel, Vincent Faucheux, Jean-Yves Laurent
  • Patent number: 8314453
    Abstract: The memory cell is of SRAM type with four transistors provided with a counter-electrode. It comprises a first area made from semiconductor material with a first transfer transistor and a first driver transistor connected in series, their common terminal defining a first electric node. A second transfer transistor and a second driver transistor are connected in series on a second area made from semiconductor material and their common terminal defines a second electric node. The support substrate comprises first and second counter-electrodes. The first and second counter-electrodes are located respectively facing the first and second semiconductor material areas. The first transfer transistor and second driver transistor are on a first side of a plane passing through the first and second electric nodes whereas the first driver transistor and second transfer transistor are on the other side of the plane.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: November 20, 2012
    Assignees: Commissariat a l'Energie Atomique et aux Energies Alternatives, STMicroelectronics (Crolles 2) SAS
    Inventors: Olivier Thomas, Claire Fenouillet-Béranger, Philippe Coronel, Stéphane Denorme