Abstract: Systems and methods for reducing the latency and for increasing throughput for MoCA devices that are connected via a coax network are provided. One method according to the invention includes, in a network having a plurality of network modules, each of the plurality of network modules being connected to a coax backbone, communicating over the coax backbone between the plurality of network modules. The method further includes a requesting the use of aggregated messages. The method further includes aggregations of messages at the Ethernet packet layer and/or at the MAC layer. The resulting messages can be received while making more efficient use of the MoCA network.

Abstract: Systems and methods for reducing the latency and for increasing throughput for MoCA devices that are connected via a coax network are provided. One method according to the invention includes, in a network having a plurality of network modules, each of the plurality of network modules being connected to a coax backbone, communicating over the coax backbone between the plurality of network modules. The method further includes a requesting the use of short burst messages. The method further includes responding to the requesting by constructing a short burst message with a single channel equalization section and reducing the number of bits per hertz in the transmission constellation. The resulting messages can be received with an acceptable error rate while making more efficient use of the MoCA network.

Abstract: Systems and methods for concatenating messages in MoCA devices that are connected via a coax network are provided. One embodiment of a system according to the invention includes a home network having a plurality of nodes. The network is implemented over coaxial cable. The network includes a plurality of networked nodes. A transmitter of at least one of the networked nodes is configurable to transmit a concatenated burst. The concatenated burst includes a preamble, a first payload frame and a second payload frame. The first payload frame and the second payload frame are separated by a cyclic prefix of a first symbol of the second payload frame.

Abstract: Systems and methods for reducing reservation request overhead in a communications network in which devices are connected via a coax network are provided. A method for managing transmission of data over a MoCA network according to the invention may include monitoring data transmission requirements at a node on the network; generating statistics of the data transmission requirements; predicting transmission requirements from the statistics; and reserving future transmission opportunities in view of the predicted transmission requirements.

Abstract: The invention concerns the use of human or humanized chimeric monoclonal antibodies which are produced in selected cell lines, said antibodies bringing about a high ADCC activity as well as a high secretion of cytokines and interleukins, for treating underpopulations of so-called weak-response patients exhibiting CD16 FCGR3A-158F homozygote or FCGR3A-158V/F heterozygote polymorphism.

Abstract: Systems and methods for performing a method for reducing power consumption in MoCA devices that are connected via a coax network are provided. One method according to the invention includes, in a home network having a plurality of network modules, one of said plurality of network modules being a network controller, each of said plurality of network modules being connected to a coax backbone, communicating over the coax backbone between the plurality of network modules. The method further includes using the master module to receive requests sent over the coax backbone from the plurality of network modules for bandwidth to transmit bursts. The master module may establish an order of transmission opportunities for the plurality of network modules to follow when transmitting bursts directly to other network modules via the coax backbone. The method may also include using the master module to toggle each of the networked modules between a running power state and a standby power state.

Abstract: Apparatus and methods for reducing latency in coordinated networks. The apparatus and methods relate to a protocol that may be referred to as the Persistent Reservation Request (“p-RR”), which may be viewed as a type of RR (reservation request). p-RR's may reduce latency, on average, to one MAP cycle or less. A p-RR may be used to facilitate Ethernet audiovisual bridging. Apparatus and methods of the invention may be used in connection with coaxial cable based networks that serve as a backbone for a managed network, which may interface with a package switched network.

Abstract: The invention relates to human or humanised, chimeric, monoclonal, class IgG3 antibodies produced in a cell line of rat myeloma, especially line YB2/0. Said antibodies have a strong phagocytosis activity and can be administered for the treatment of cancers and infections.

Abstract: An intermediate server for conveying information, the intermediate server includes: an intermediate network interface, for receiving signals provided from a mobile phone to an access point and further conveyed over an intermediate network; wherein the signals are provided by the mobile phone over an unlicensed medium; wherein the intermediate network interface is further adapted to communicate with an intermediate network manager such as to guarantee an allocation of intermediate resources to the exchange of signals; a fixed network interface, for exchanging signals with a fixed network; and at least one translation component, adapted to apply translation mechanisms from a mobile phone protocol to a fixed network protocol.

Abstract: The invention concerns the use of human or humanized chimeric monoclonal antibodies which are produced in selected cell lines, said antibodies bringing about a high ADCC activity as well as a high secretion of cytokines and interleukins, for treating underpopulations of so-called weak-response patients exhibiting CD16 FCGR3A-158F homozygote or FCGR3A-158V/F heterozygote polymorphism.

Abstract: A system for accessing a memory organized in memorization subsystems or memory blocks, e.g. standard Dual In-line Memory Modules, wherein the words to be stored are split into unitary elements so that several memorization subsystems are used to store one word and its associated Block Error Code (BEC) bits, is disclosed. The system includes a detector to detect a failure within a memorization subsystem. Insulator that are associated to each memorization subsystem insulate the failed memory block, and a new memorization subsystem is accessed in lieu of the failed one thanks to identification device which determine an available unfailed memory block. The user may replace the failed memory block without shutting down the memory device.

Abstract: A system for housing CompactPCI cards in a frame that does not meet a specified CompactPCI form factor (3U and 6U) is presented. Existing telecommunication frames have generally a larger depth that those required by the CompactPCI standard (160 mm) and therefore the insertion of CompactPCI cards (201) cannot be performed directly into the main backplane (204) of the frames. An intermediate backplane (200), or so-called CompactPCI backplane, comprising six CompactPCI connectors on a front side for allowing the insertion of up to six CompactPCI adapters (201) (3U and/or 6U), and one doubled-headed CompactPCI connector (203) on a back side being common to one of the six front side connectors (203/206) for insertion of a System Card (202), is connected to the main frame backplane (204) using the System Card (202). The System Card functions as a card extender between the CompactPCI adapters (201) and the main backplane of the frame.

Abstract: A method for adjusting the signal transmission delay in a data transmission system wherein a driver transmits high speed data to a receiver through a plurality N of transmission media connected together. The link between the driver and the receiver is composed of a plurality of N traces, the length of the trace located on each transmission medium “i” being Li with “i” being an integer comprised between 1 and N.

Abstract: Method and device for caching the IP header of a message being routed through a data transmission network wherein each node includes a route processor for computing a routing algorithm, a main memory for storing the message, a cache memory; and an IP header detection logic circuit for storing the header in the cache memory as the message is being stored in the main memory. Once the header has been stored in the cache memory, it can be read from the cache memory in order to compute the routing algorithm. The new header resulting from the routing computation is written into the cache memory and is then read from the cache memory when the message including the header and the message data is sent over the network.

Abstract: A unified messaging system enables access to a variety of messaging devices and storage of messages in a single uniform e-mail attachment format. Furthermore, the system also provides e-mail messages to users without requiring said users to locally store said messages on a storage volume.

Abstract: A system for accessing a memory organized in memorization subsystems or memory blocks, e.g. standard Dual In-line Memory Modules, wherein the words to be stored are split into unitary elements so that several memorization subsystems are used to store one word and its associated Block Error Code (BEC) bits, is disclosed. The system includes a detector to detect a failure within a memorization subsystem. Insulator that are associated to each memorization subsystem insulate the failed memory block, and a new memorization subsystem is accessed in lieu of the failed one thanks to identification device which determine an available unfailed memory block. The user may replace the failed memory block without shutting down the memory device.

Abstract: A method for adjusting the signal transmission delay in a data transmission system wherein a driver transmits high speed data to a receiver through a plurality N of transmission media connected together. The link between the driver and the receiver is composed of a plurality of N traces, the length of the trace located on each transmission medium “i” being Li with “i” being an integer comprised between 1 and N.

Abstract: A system for accessing a memory comprising memorization subsystems (100-1 to 100-10), e.g. standard Dual In-line Memory Modules, wherein the words to be stored are split so that several memorization subsystems are used to store one word and its associated Block Error Code (BEC) bits includes logical insulation means (145-1 to 145-10) that are associated to each memorization subsystem further comprising a backup memorization subsystem (100-11) associated to logical insulation means (145-11).

Abstract: A system for accessing a memory including memorization subsystems, wherein the words to be stored are split up so that several memorization subsystems are used to store one word and its associated Block Error Code (BEC) bits includes logical insulation means and electrical insulation means that are associated to each memorization subsystem. When a memorization subsystem needs to be replaced, e.g. if it is failing, the memory controller insulates this memorization subsystem, the data stored therein are retrieved thanks to the data stored in the other memorization subsystems and thanks to BEC read path function. Thus, when a memorization subsystem is insulated, the computer user can replace this memorization subsystem without losing data and perturbing the computer. After a memorization subsystem has been replaced, its content may be restored using BEC.

Abstract: A computer may have a management bus installed, where the management bus is coupled to sensors which monitor status of components of the computer. The management bus may also be coupled to a management bus processor, where the management bus processor receives status information from the management bus concerning status of components of the computer. An interface between the management bus and the network subsystem permits transmission of an error message in the event that the computer has a failure which inactivates the system CPU, the system bus, the system memory, or the system power supply.