Abstract: A lighting apparatus includes a driver, an elongated housing, an extending connector, a light source and an extension module. The driver converts an external power source to a driving current. The elongated housing has a lighting area, an extension area and a light opening. The extending connector has a holder and an electrode connecting to the driver. The holder is placed in the extending area of the elongated housing. The light source is attached to the lighting area for generating a first light escaping from the light opening. The extension module is attached to the holder of the extending connector to electrically connect to the driver via the electrode.

Abstract: Interconnect devices, packaged semiconductor devices and methods are disclosed herein that are directed towards embedding a local silicon interconnect (LSI) device and through substrate vias (TSVs) into system on integrated substrate (SoIS) technology with a compact package structure. The LSI device may be embedded into SoIS technology with through substrate via integration to provide die-to-die FL connection arrangement for super large integrated Fan-Out (InFO) for SBT technology in a SoIS device. Furthermore, the TSV connection layer may be formed using lithographic or photoresist-defined vias to provide eLSI P/G out to a ball-grid-array (BGA) connection interface.

Abstract: A trench gate metal oxide semiconductor (MOSFET) device includes a substrate with a semiconductor surface layer doped a first conductivity type. At least one trench gate MOSFET cell is located in or over the semiconductor surface layer, and includes a body region in the semiconductor surface layer doped a second conductivity type, and a source region on top of the body region doped the first conductivity type. A trench extends down from a top side of the semiconductor surface layer, the trench abutting the body region and being lined with a dielectric material. A field plate that includes polysilicon is located in the trench, and a gate electrode is located over the field plate. The field plate has a bottom portion, a middle portion, and a top portion, wherein the bottom portion is narrower than the middle portion, and the middle portion is narrower than the top portion.

Abstract: A keyboard includes a substrate, a display member, and a keyswitch assembly. The display member is disposed over the substrate. The keyswitch assembly includes a keycap, a fixing element, two balance bars, and a position-returning member. The keycap is located over the substrate and has a light-transmitting portion located over the display member. The fixing element is disposed on the substrate and has a retaining slot. Each of the balance bars includes a rod portion and an end portion. The rod portion is rotatably engaged with the keycap. The end portion is movably retained in the retaining slot. The position-returning member abuts against the keycap above the substrate and is adjacent to an edge of the keycap.

Abstract: A semiconductor device includes a substrate having an array region defined thereon, a ring of magnetic tunneling junction (MTJ) region surrounding the array region, a gap between the array region and the ring of MTJ region, and metal interconnect patterns overlapping part of the ring of MTJ region. Preferably, the array region includes a magnetic random access memory (MRAM) region and a logic region and the ring of MTJ region further includes a first MTJ region and a second MTJ region extending along a first direction and a third MTJ region and a fourth MTJ region extending along a second direction.

Abstract: MRI system cabinet having a cabinet body with electronics and a water cooler with a water cooling loop. The water cooling loop divides the cabinet body into first and second cabinet spaces, and the electronics are along the first and second cabinet spaces. An air cooler is along the central axis of the water cooler and has a fan. A cooling cycle is formed where, on a first side, the fan generates a first air flow, which is sent to the first cabinet space through a first air path, and a second air flow, which is sent to the second cabinet space through a second air path. After flowing through the first and second cabinet spaces, the first and second air flows are guided into the water cooling loop for heat exchange under the suction action of the fan on a second side, and then directed into the air cooler.

Abstract: A method for treating arsenic-containing flue gas is disclosed. In the method, the arsenic-containing flue gas is subjected to a dry pre-dedusting treatment, and the dedusted flue gas is pre-cooled and then introduced into a vortex quenching system. The arsenic-containing flue gas is divided into high-temperature flue gas and low-temperature flue gas through the vortex quenching system. The outlet temperature of the low-temperature flue gas is dropped below the desublimation temperature of gaseous arsenic trioxide. The low-temperature flue gas is subjected to a gas-solid separation to obtain solid arsenic trioxide and treated flue gas.

Abstract: A video processing method for detecting location(s), pixels, and skeleton(s) of one or more objects and an associated video processing circuit are provided. The video processing method may include: utilizing a backbone network in a predetermined model of a single deep learning network to receive and convert input image data having the object(s) into at least one feature map; and utilizing at least one instance head and a pixel head in the predetermined model of the single deep learning network to receive and convert the aforementioned at least one feature map into one or more object detection results, one or more instance segmentation results and one or more pose estimation results of the object(s).

Abstract: The present disclosure provides an image sensing module including a main board and an image sensor. The main board has a first surface and a second surface opposite to each other. The image sensor is disposed on the first surface of the main board and includes a plurality of isolation structures and a photoelectric conversion element between the plurality of isolation structures. A first angle is provided between a light incident surface of the photoelectric conversion element and the first surface of the main board, and a second angle is provided between a light beam incident to the light incident surface of the photoelectric conversion element and a normal vector of the light incident surface. The second angle is about equal to the Brewster angle at the interface of the light beam incident to the light incident surface.

Abstract: Polyurethane foams are made by curing a reaction mixture that contains an aromatic polyisocyanate, at least one isocyanate-reactive material having an average functionality of at least 2 and an equivalent weight of at least 200 per isocyanate-reactive group, at least one blowing agent, at least one surfactant and at least one catalyst, a polyethyleneamine mixture having a number average molecular weight of 175 to 450 and an alkali metal, phosphonium or ammonium sulfite. Foams so produced emit low levels of formaldehyde, acetaldehyde, acrolein and propionaldehyde.

Abstract: In a method of manufacturing a semiconductor device, a fin structure including a stacked layer of first and second semiconductor layers and a hard mask layer over the stacked layer is formed. A sacrificial cladding layer is formed over at least sidewalls of the exposed hard mask layer and stacked layer. An etching is performed to remove lateral portions of the sacrificial cladding layer, thereby leaving the sacrificial cladding layer on sidewalls of the exposed hard mask layer and stacked layer. A first dielectric layer and a second dielectric layer made of a different material than the first dielectric layer are formed. The second dielectric layer is recessed, and a third dielectric layer made of a different material than the second dielectric layer is formed on the recessed second dielectric layer. During the etching operation, a protection layer is formed over the sacrificial cladding layer.

Abstract: Semiconductor device structures with a gate structure having different profiles at different portions of the gate structure may include a fin structure on a substrate, a source/drain structure on the fin structure, and a gate structure over the fin structure and along a sidewall of the fin. The source/drain structure is proximate the gate structure. The gate structure has a top portion having a first sidewall profile and a bottom portion having a second sidewall profile different from the first sidewall profile.

Abstract: Interconnect structures and method of forming the same are disclosed herein. An exemplary interconnect structure includes a first contact feature in a first dielectric layer, a second dielectric layer over the first dielectric layer, a second contact feature over the first contact feature, a barrier layer between the second dielectric layer and the second contact feature, and a liner between the barrier layer and the second contact feature. An interface between the first contact feature and the second contact feature includes the liner but is free of the barrier layer.

Abstract: A system to monitor the condition of a flash memory device such as flash memory devices that store hardware settings for a BIOS or system logs in a computer system is disclosed. The flash memory device is controlled by a flash memory driver. A controller provides a command via a file system to write data to the flash memory driver. A flash memory module interfaces with the flash memory driver. The flash memory module is configured to determine whether the command to write data requires a block erase of the flash memory device. The flash memory module determines an erase time from when a command to erase a block is sent to when a status of write ready is sent by the flash memory device.

Abstract: A display device is provided. The display device includes a device housing, a knob, a restriction unit and a screen panel. The knob is rotatably connected to the device housing, wherein the knob comprises a latch and a plurality of teeth, the knob is adapted to be rotated between a first knob location and a second knob location, and when the knob is in the first knob location, the latch protrudes from the device housing, and when the knob is in the second knob location, the latch is received in the device housing. The restriction unit is disposed in the device housing, wherein the restriction unit is adapted to be connected to one of the teeth to restrict the knob. The screen panel is detachably connected to the device housing. The display device can be easily detached from a display system.

Abstract: The present disclosure pertains to a method for diagnosing AMD comprising receiving OCTA image of a subject, pre-processing the OCTA image to obtain image data, inputting the image data to a trained deep learning (DL) network, generating using the trained DL network an output that characterizes the health of the subject with respect to AMD, and generating a diagnostic result based on the output.

Abstract: An image sensing method, applicable to the anti-spoofing recognition of under screen optical fingerprint sensing, is provided, including: dividing the image sensor into sensing blocks, dividing the display area of the display device correspondingly according to the sensing area, and the display area including the light-emitting area; defining the luminous color of each display area and the color coordinate value of each luminous color; each sensing block sensing the light intensity of the image reflected to the sensing block from the display block emitting the light onto the reference object and the test object to be measured; calculating the anti-spoofing reference color information of the reference object and registering in the system; when sensing the fingerprint image, first obtaining the light intensity of each block, then calculating the color information of the test object; and finally, comparing the color information with the registered anti-spoofing reference color information.

Abstract: A memory cell includes a substrate. A first STI and a second STI are embedded within the substrate. The first STI and the second STI extend along a first direction. An active region is disposed on the substrate and between the first STI and the second STI. A control gate is disposed on the substrate and extends along a second direction. The first direction is different from the second direction. A tunneling region is disposed in the active region overlapping the active region. A first trench is embedded within the tunneling region. Two second trenches are respectively embedded within the first STI and the second STI. The control gate fills in the first trench and the second trenches. An electron trapping stack is disposed between the tunneling region and the control gate.

Abstract: A flexible display device includes: first and second casings; a frame movably assembled to the second casing; and a flexible display having first and second ends opposite to each other and first and second display areas. The second casing is movably assembled to the first casing to form a drawer configuration and slide relative to the first casing to switch between drawn-out and retracted states. The first end is connected to the first casing. The second end to the frame. In the retracted state, the flexible display is bent so the second display area is contained in the first and second casings. In a process from the retracted state to the drawn-out state, the second casing is drawn out from the first casing and drives the frame to move in the same direction to expand and flatten the second display area. A portable electronic device is also provided.

Abstract: A method includes forming a first conductive feature over a substrate, forming an etch-stop layer (ESL) stack over the first conductive feature, forming a first interlayer dielectric (ILD) layer over the ESL stack, forming a patterned ESL having a first opening over the first ILD layer, forming a second ILD layer over the patterned ESL, thereby filling the first opening, forming a patterned HM having a second opening over the second ILD layer, where a width of the second opening is greater than a width of the first opening, performing an etching process to form a first trench in the second ILD layer and a second trench in the first ILD layer, where the second trench exposes the first conductive feature, and subsequently depositing a conductive layer in the first trench and the second trench, thereby forming a second conductive feature interconnecting a third conductive to the first conductive feature.