Patents by Inventor Ping Chen
Ping Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12378232Abstract: This invention relates to compounds of Formula (I) or a pharmaceutically acceptable salt thereof, in which R-groups R1 to R23, A, Q, U, V, W, X, Y, Z, n, p and q are as defined herein, to pharmaceutical compositions comprising such compounds and salts, and to methods of using such compounds, salts and compositions for the treatment of abnormal cell growth, including cancer, in a subject.Type: GrantFiled: December 7, 2021Date of Patent: August 5, 2025Assignee: Pfizer Inc.Inventors: Ping Chen, Sujin Cho-Schultz, Judith Gail Deal, Gary Michael Gallego, Mehran Jalaie, Robert Steven Kania, Sajiv Krishnan Nair, Sacha Ninkovic, Suvi Tuula Marjukka Orr, Cynthia Louise Palmer
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Publication number: 20250245438Abstract: A function map generation method and system are provided. The system executes the following steps using an artificial intelligence model. A difficulty point and first data related to the difficulty point are obtained from a first reply content of a first query corresponding to the difficulty point. A usage target and second data related to the usage target are obtained from a second reply content of a second query corresponding to the usage target. An implementation function and a target type are obtained based on the difficulty point and the usage target. A required function is obtained based on the target type. Semantic comparison between the implementation function and the required function is performed to obtain a difference set content. A function map is generated based on the target type, the implementation function, and the difference set content.Type: ApplicationFiled: March 7, 2024Publication date: July 31, 2025Applicant: Wistron CorporationInventors: Ping Chen Tsai, Yin Min Lin, Yi-Tsung Cheng
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Patent number: 12376374Abstract: A method includes forming a first, second, third, fourth, fifth, and sixth fin structure. The second fin structure is separated from each of the first and third fin structures by a first distance, the fifth fin structure is separated from each of the fourth and sixth fin structures by the first distance, and the third fin structure is separated from the fourth fin structure by a second distance greater than the first distance. The method includes forming a first dummy gate structure overlaying the first through third fin structures, and a second dummy gate structure overlaying the fourth through sixth fin structures; forming a number of source/drain structures that are coupled to the first, second, third, fourth, fifth, and sixth fin structures, respectively; and replacing the third fin structure with a first dielectric structure, and replacing the fourth fin structure with a second dielectric structure.Type: GrantFiled: August 27, 2021Date of Patent: July 29, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih-Yao Lin, Chen-Ping Chen, Chieh-Ning Feng, Hsiao Wen Lee, Chih-Han Lin
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Publication number: 20250239449Abstract: A manufacturing method for a semiconductor device structure and the semiconductor device structure are disclosed. The method includes forming backside connection structures by sequentially forming heat transfer layers stacked upon one another and backside metallization structures sandwiched between the heat transfer layers. The formation of at least one heat transfer layer involves performing an annealing process to turn an insulating material layer into an insulating nanostructured material layer with nano grains and dopants distributed along grain boundaries of the nano grains.Type: ApplicationFiled: January 24, 2024Publication date: July 24, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kun-Yen Liao, Ming-Hsien Lin, Yung-Chih Wang, Hsin-Ping Chen, Tsu-Chun Kuo, Meng-Pei Lu, Cheng-Chin Lee
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Patent number: 12366587Abstract: An acceleration sensor includes an upper base plate; a lower base plate; and a gallium-based liquid metal encapsulated in graphene. The lower base plate includes a first surface including at least one diamond channel, and the upper base plate includes a second surface including a metal electrode corresponding to the at least one diamond channel in position; the liquid metal is disposed in a center of the at least one diamond channel; the first surface is bonded to the second surface through an adhesive; the liquid metal is movable in the at least one diamond channel and is in electrical contact with the metal electrode of the upper base plate during movement.Type: GrantFiled: June 4, 2023Date of Patent: July 22, 2025Assignee: CHONGQING UNIVERSITYInventors: Xiaoping Zhou, Ping Chen, Zhi Zhao, Junwei Chen, Zheyu Yang
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Publication number: 20250230140Abstract: This application relates to novel triazole-pyridine substituted pyrrolidinyl, tetrahydro-2H-pyranyl, cyclohexyl, and piperidinyl acetic acid compounds, their manufacture, pharmaceutical compositions comprising them, and their use as medicaments for treating a disease associated with dysregulation of lysophosphatidic acid receptors (LPA).Type: ApplicationFiled: April 28, 2022Publication date: July 17, 2025Applicant: Viva Star Biosciences (Suzhou) Co., Ltd.Inventors: Hongjian ZHANG, Ping CHEN, Zhenwei CAI, Fei JIANG, Peihua SUN
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Patent number: 12361584Abstract: A video processing method for detecting location(s), pixels, and skeleton(s) of one or more objects and an associated video processing circuit are provided. The video processing method may include: utilizing a backbone network in a predetermined model of a single deep learning network to receive and convert input image data having the object(s) into at least one feature map; and utilizing at least one instance head and a pixel head in the predetermined model of the single deep learning network to receive and convert the aforementioned at least one feature map into one or more object detection results, one or more instance segmentation results and one or more pose estimation results of the object(s).Type: GrantFiled: August 1, 2022Date of Patent: July 15, 2025Assignee: MEDIATEK INC.Inventors: Hsing-Yu Chen, Cheng-Wei Wu, Shu-Ping Chen
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Patent number: 12356669Abstract: In a method of manufacturing a semiconductor device, a fin structure including a stacked layer of first and second semiconductor layers and a hard mask layer over the stacked layer is formed. A sacrificial cladding layer is formed over at least sidewalls of the exposed hard mask layer and stacked layer. An etching is performed to remove lateral portions of the sacrificial cladding layer, thereby leaving the sacrificial cladding layer on sidewalls of the exposed hard mask layer and stacked layer. A first dielectric layer and a second dielectric layer made of a different material than the first dielectric layer are formed. The second dielectric layer is recessed, and a third dielectric layer made of a different material than the second dielectric layer is formed on the recessed second dielectric layer. During the etching operation, a protection layer is formed over the sacrificial cladding layer.Type: GrantFiled: April 30, 2024Date of Patent: July 8, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shu-Wen Shen, Chen-Ping Chen
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Publication number: 20250209716Abstract: A catch monitoring device and a catch monitoring method thereof for improving the accuracy of catch estimation and reducing costs are disclosed. The catch monitoring device includes a 2D skeleton unit for generating a 2D skeleton according to a 2D image, a 3D skeleton unit for generating a 3D skeleton according to a 3D point cloud image, and a comparison unit coupled to the 2D skeleton unit and the 3D skeleton unit. The comparison unit determines whether to trigger the catch monitoring device to output catch length, catch girth or catch weight according to the 2D skeleton and the 3D skeleton.Type: ApplicationFiled: May 3, 2024Publication date: June 26, 2025Applicant: Wistron CorporationInventors: Ping-Chen Tsai, Hsien-Ta Wu
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Publication number: 20250211016Abstract: A portable power pack having a housing, a rechargeable lithium battery positioned in the housing, a liquid crystal display (LCD), a wireless charging coil, a light emitting diode (LED) flash light, a universal serial bus (USB) port, a direct current (DC) port, and a power management circuit. The LCD can be positioned on the housing and configured to display a status of the portable power pack. The wireless charging coil can be positioned in or on the housing and configured to wirelessly couple with an external wireless charging coil of an external device through electromagnetic induction in accordance with, for example, the Qi wireless power transfer standard. The USB port supplies a charging current to charge a portable electronic device, while the DC port supplies a starting current to jump start an engine of a vehicle that is electrically coupled with an external battery.Type: ApplicationFiled: March 7, 2025Publication date: June 26, 2025Inventors: Brian F. Butler, Linh Nguyen, Patrick Clarke, Shenzhong Zhu, Xiao Ping Chen
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Patent number: 12336978Abstract: Provided herein is a pharmaceutical composition for treating resistant hypertension, which includes amlodipine, chlorthalidone, and amiloride. This disclosure also provides an application of the pharmaceutical composition in the treatment of low renin/low aldosterone resistant hypertension and targeting organ damage in the subject suffering from resistant hypertension.Type: GrantFiled: September 29, 2021Date of Patent: June 24, 2025Assignees: SHENZHEN AUSA PHARMED CO., LTD., SHENZHEN AUSA PHARMACEUTICAL CO., LTD.Inventors: Guangliang Chen, Duo Yu, Jie Bai, Minqing Tian, Ping Chen, Xiping Xu
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Patent number: 12338255Abstract: This application relates to novel bicyclic substituted sulfonylurea compounds and analogues, their manufacture, pharmaceutical compositions comprising them, and their use as medicaments for treating a disease associated with modulation of cytokines such as IL-1? and IL-18, modulation of NLRP3, or inhibition of the activation of NLRP3 or related components of the inflammatory process.Type: GrantFiled: February 17, 2023Date of Patent: June 24, 2025Assignee: Viva Star Biosciences (Suzhou) Co., Ltd.Inventors: Ping Chen, Hongjian Zhang, Fei Jiang, Peihua Sun
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Patent number: 12341101Abstract: A method for forming a semiconductor device structure is provided. The method includes removing a portion of a dielectric layer to form a trench in the dielectric layer. The method includes forming a barrier layer in the trench. The method includes forming a seed layer in the trench and over the barrier layer. The seed layer is doped with manganese. The method includes annealing the seed layer in a first process gas including a first hydrogen gas. A volume ratio of the first hydrogen gas to the first process gas ranges from about 50% to about 100%, and the manganese diffuses from the seed layer to the barrier layer during the annealing of the seed layer in the first process gas.Type: GrantFiled: May 11, 2022Date of Patent: June 24, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cai-Ling Wu, Hsiu-Wen Hsueh, Chii-Ping Chen, Po-Hsiang Huang, Chi-Feng Lin
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Publication number: 20250203902Abstract: A device includes a fin protruding from a semiconductor substrate; a gate stack over and along a sidewall of the fin; a gate spacer along a sidewall of the gate stack and along the sidewall of the fin; an epitaxial source/drain region in the fin and adjacent the gate spacer; and a corner spacer between the gate stack and the gate spacer, wherein the corner spacer extends along the sidewall of the fin, wherein a first region between the gate stack and the sidewall of the fin is free of the corner spacer, wherein a second region between the gate stack and the gate spacer is free of the corner spacer.Type: ApplicationFiled: February 28, 2025Publication date: June 19, 2025Inventors: Chen-Ping Chen, Kuei-Yu Kao, Shih-Yao Lin, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
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Publication number: 20250195590Abstract: The present invention provides a composition comprising a phage and an allicin for treating Pseudomonas aeruginosa infection, where the phage is Pseudomonas aeruginosa phage vB_PaeP_GZMU_A1002, deposited in the Guangdong Microbial Culture Collection Center with a deposit number of GDMCC No:64029-B1. The phage has a synergistic anti-Pseudomonas aeruginosa effect when in combination with allicin.Type: ApplicationFiled: January 8, 2025Publication date: June 19, 2025Inventors: Ping CHEN, Yinglin YIN, Kailin YUAN, Baoqi CAI, Sifang DOU, Lei XU, Ziru ZHOU, Yuan FU, Taoxia E, Jiayi LIU, Zhihuang HE, Wanyu WANG
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Patent number: 12336271Abstract: A semiconductor device includes a first plurality of channel layers. The first plurality of channel layers extend along a first direction. The semiconductor device includes a second plurality of channel layers. The second plurality of channel layers also extend along the first direction. The semiconductor de123329-vice includes a first dielectric fin structure that also extends along the first direction. The semiconductor device includes a first gate structure that extends along a second direction. The first gate structure comprises a first portion that wraps around each of the first plurality of channel layers and a second portion that wraps around each of the second plurality of channel layers. The first dielectric fin structure separates the first and second portions from each other. The first gate structure comprises a third portion that connects the first and second portions to each other and is vertically disposed below the first dielectric fin structure.Type: GrantFiled: August 28, 2021Date of Patent: June 17, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih-Yao Lin, Chen-Ping Chen, Chen-Yui Yang, Hsiao Wen Lee, Ming-Ching Chang
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Publication number: 20250177509Abstract: An african swine fever virus vaccine includes five groups of antigens in total, and each group is respectively obtained by constructing recombinant adenovirus vectors co-expressing four antigen genes of african swine fever virus, and packaged by 293TD37 cells. The four antigenic genes of African swine fever virus in each group are 1, P72, B602L, P30 and P54; 2, CP129Rubiqutin, MGF5L6L, CP312R, and MGF110-4L; 3, L8Lubiqutin, I215L, I73RHBsAgHBsAg and E146L; 4, EP402R, EP153R, I177L, and K205Rubiqutin; 5, F317L, A151R, P34, and pp62. The construction of the recombinant adenovirus vector for co-expression of four antigen genes of the african swine fever virus mainly includes: knocking out E1, E3, E2a and E4 genes of the adenovirus vector by CRISPR/cas9 technology, constructing an ORF6/7 expression frame of E4 in an E2a region, and constructing shuttle plasmids in E1 and E4 regions for appropriately expressing four antigen genes, thereby obtaining a completely new adenovirus vector.Type: ApplicationFiled: July 6, 2021Publication date: June 5, 2025Inventors: Ping CHEN, Tingting ZHANG, Na LI, Xintao ZHONG, Zhigang ZHU, Nan LI
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Publication number: 20250182293Abstract: An image processing method, applied to an image processing device, comprising: (a) deciding a first reference size of at least one reference region of an input image based on a computational resource of the image processing device or task types of tasks which are being processed by the image processing device; and (b) processing at least portion of the input image based on the reference region to generate a processed image.Type: ApplicationFiled: November 28, 2024Publication date: June 5, 2025Applicant: MEDIATEK INC.Inventors: Kuang-Hung Chien, Yu-Chun Chen, Yi-Chen Chen, Sheng-Po Kuo, Chia-Ping Chen, Hui Ouyang, Yu-Cheng Chu
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Patent number: 12324191Abstract: In an embodiment, a device includes: an isolation region; nanostructures protruding above a top surface of the isolation region; a gate structure wrapped around the nanostructures, the gate structure having a bottom surface contacting the isolation region, the bottom surface of the gate structure extending away from the nanostructures a first distance, the gate structure having a sidewall disposed a second distance from the nanostructures, the first distance less than or equal to the second distance; and a hybrid fin on the sidewall of the gate structure.Type: GrantFiled: August 2, 2023Date of Patent: June 3, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shih-Yao Lin, Chen-Ping Chen, Hsiaowen Lee, Chih-Han Lin
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Patent number: 12322917Abstract: An Insulation Displacement Contact Compliant connector system (IDCC) which includes a housing, header pins, and a Printed Circuit Board (PCB). Each header pin has at least a single barb to be retained into the housing. Each pin has a blade for contacting a wire. A compliant feature on the pin retains itself into holes in the PCB. The housing has a negative space similarly shaped to the pin. The housing includes a strain relief which provides a lead-in for a wire. When the system is fully assembled, the pins reside in the housing, and exit through the housing and into and through respective holes in the PCB. A wire can be inserted into the housing once the pins reside in the housing.Type: GrantFiled: January 26, 2021Date of Patent: June 3, 2025Assignee: J.S.T. CORPORATIONInventors: Joseph Txarola, Gwendolyn Upson, Ping Chen