Abstract: A phase-interpolator (PI) circuit generates an interpolated clock to capture data in a capture circuit at a target phase in a phase range between two reference clocks based on an interpolation code within a range of interpolation codes is described. A clamping circuit coupled to the PI circuit provides an interpolation code within a reduced range, where the integral non-linearity (INL) of the interpolated clocks is below a threshold, such that data capture based on the interpolated clock has a lower bit error rate (BER). As a result, the interpolated clock is generated within a reduced phase range corresponding to the reduced range of interpolation codes. When a target phase for an interpolated clock is outside the reduced phase range, the clamping circuit may adjust the target phase clock relative to a reference clock to adjust the target phase to be within the reduced phase range for improved BER.

Abstract: A time-to-digital converter (TDC) circuit generates a digital output indicating a time, known as a phase difference, from a phase of the generated signal to a corresponding phase of a reference signal. The digital output is used by the digitally controlled oscillator (DCO) to correct for the phase/frequency difference to synchronize the generated signal with the reference signal. In an aspect, an adaptive TDC circuit generates a first digital indication in a coarse mode when the offset time is above a threshold and generates a second digital indication in a fine mode when the offset time is below the threshold. The first digital indication and the second digital indication each comprise a same number of bits, and the first digital indication is normalized to the second digital indication for the digital output of the adaptive TDC circuit. A fractional bit may be employed to compensate for a quantization error.

Abstract: Described are techniques for a control plane. The techniques include receiving, at the control plane hosted on a service-provider data center, a request to perform a computing resource operation at a remote data center, where the control plane is used to manage computing resources located at the remote data center. The techniques further include creating a data object at the service-provider data center to represent a status of the computing resource operation, and updating the data object in response to receiving indications of events associated with performance of the computing resource operation at the remote data center. The techniques further include receiving, at the control plane, a status request for the computing resource operation, querying the data object maintained at the service-provider data center for the status of the computing resource operation, and providing the status of the computing resource operation represented by the data object.

Abstract: A voice control method and an electronic device are provided. The method is adapted to the electronic device including a touch screen and a voice input device and includes the following steps. Historical touch data of a plurality of historical touch operations performed on a user interface is recorded. A plurality of habitual touch areas on the user interface are determined according to the historical touch data of the user interface. Multiple area markers of the habitual touch areas are displayed on the user interface when the user interface is displayed through a touch screen. A voice command is received through the voice input device. An input operation is determined according to a first area marker in the voice command, and the input operation is performed on the user interface.

Abstract: A system for use in a poultry house includes a control server, a network gateway disposed in the poultry house and equipping with a wireless communication capability; a movable sensor module disposed in the poultry house, wherein the movable sensor module is movable within the poultry house for obtaining a plurality of environmental parameters associated with specific locations within the poultry house, and a sampling machine disposed in the poultry house for obtaining a sample of poultry waste on the ground of the poultry house. The movable sensor module transmits the environmental parameters to the network gateway, and the network gateway transmits the environmental parameters to the control server for processing the environmental parameters.

Abstract: A device includes a fin protruding from a semiconductor substrate; a gate stack over and along a sidewall of the fin; a gate spacer along a sidewall of the gate stack and along the sidewall of the fin; an epitaxial source/drain region in the fin and adjacent the gate spacer; and a corner spacer between the gate stack and the gate spacer, wherein the corner spacer extends along the sidewall of the fin, wherein a first region between the gate stack and the sidewall of the fin is free of the corner spacer, wherein a second region between the gate stack and the gate spacer is free of the corner spacer.

Abstract: The present disclosure provides a copper nanowire composition. The copper nanowire composition includes copper nanowire having associated ligands with the structure HNR1R2, where R1 is hydrogen, alkyl group, or arylalkyl group, R2 is alkyl group or arylalkyl group, wherein the associated ligand has an amount of 100 wt % to 10000 wt % versus a weight of the copper nanowire.

Abstract: A processor can include various processing pipelines that perform different data processing operations, with different pipelines having dedicated logic and memory circuits. A power management circuit can determine when to supply power to various pipelines, including the logic and memory circuits of the various pipelines, depending on a current operating mode of the processor. When a memory circuit transitions to a lower power state such as a sleep state, data can be saved to a different memory circuit that is not transitioning to a lower power state, and when the memory circuit is powered up again, the data can be restored from the different memory circuit.

Abstract: An electronic device may include a lenticular display. The lenticular display may have a lenticular lens film formed over an array of pixels. A plurality of lenticular lenses may extend across the length of the display. The lenticular lenses may be configured to enable stereoscopic viewing of the display such that a viewer perceives three-dimensional images. Crosstalk between viewing zones and disparity between images received from different viewing zones may result in disparity-caused shifts in images perceived by viewer of the lenticular display. To mitigate these disparity-caused shifts, compensation circuitry may be included in the display pipeline circuitry. The compensation circuitry may include stored disparity-caused shift calibration information that is used for the compensation. The stored disparity-caused shift calibration information may be a polynomial function that outputs a magnitude of disparity-caused shift for a given pixel location.

Abstract: An object pose estimation system, an execution method thereof and a graphic user interface are provided. The execution method of the object pose estimation system includes the following steps. A feature extraction strategy of a pose estimation unit is determined by a feature extraction strategy neural network model according to a scene point cloud. According to the feature extraction strategy, a model feature is extracted from a 3D model of an object and a scene feature is extracted from the scene point cloud by the pose estimation unit. The model feature is compared with the scene feature by the pose estimation unit to obtain an estimated pose of the object.

Abstract: In a calibrated digital phase-locked-loop (DPLL) circuit, during a normal operating mode, a control value provided to a digitally controlled oscillator (DCO) is updated by a feedback circuit to keep an output clock generated by the DCO synchronized with a reference clock. The feedback circuit includes a time-to-digital converter (TDC) circuit to measure a phase difference as a time interval. In a calibration operating mode of the calibrated DPLL circuit, calibration of a resolution of a time measurement of the time interval measured by the TDC is performed in the feedback circuit while the control value provided to the DCO is kept constant. Calibrating the TDCs in each of the DPLLs in an integrated circuit (IC) to a nominal resolution in this manner improves synchronization of the clock domains. In some examples, the TDC circuit is a Vernier type circuit and calibration sets a delay difference to a nominal resolution.

Abstract: The present invention provides a video action detection method and electronic equipment based on an end-to-end framework, which includes a backbone network, a positioning module and a classification module. The method includes: feature extraction of the video clip to be tested by the backbone network, obtaining the video feature map of the video clip, which includes the feature maps of all frames in the video clip; the backbone network extracts the feature map of the key frame from the video feature map and obtains the actor's location features from the feature map of the key frame, and the action category features are obtained from the video feature map; the positioning and classification modules determine the actor's location and action category respectively from the features extracted by the backbone network. This method provided by the present invention has low complexity while achieving better detection performance at the same time.

Abstract: Ultrasound attenuation coefficient estimation (“ACE”) techniques that can ameliorate frequency power ratio curve oscillations caused by signal interferences, non-uniform tissue structures, or both, are described. The resulting smoothed frequency power ratio curves enable more accurate ACE and reduced region-of-interest (“ROI”) sizes for linear regression.

Abstract: A compressor assembly is described comprising a compressor for generating an airflow through the compressor assembly and a silencer located downstream of the compressor. The silencer comprises a plurality of holes through which a portion of the airflow flows, a first end proximal to the compressor, a second end distal to the compressor, and serrations provided at one of the first end and the second end and between which a further portion of the airflow flows.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a first dielectric layer, a first metal layer, a via, an air gap, an etching stop layer, a second dielectric layer, and a second metal layer. The first metal layer is embedded in the first dielectric layer. The first metal layer includes a first conductive line and a second conductive line. The via is disposed on the first conductive line. The air gap is located on the second conductive line. The sustaining layer covers the air gap. The etching stop layer is disposed on the sustaining layer. The second dielectric layer is disposed on the etching stop layer. The second metal layer is disposed on the second dielectric layer and connected to the via.

Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a plurality of conductive interconnects arranged within a dielectric structure having a plurality of inter-level dielectric (ILD) layers stacked onto one another. A heat pipe vertically extends through the plurality of ILD layers. A high thermal conductivity layer is sandwiched between neighboring ones of the plurality of ILD layers. The high thermal conductivity layer laterally extends from over one or more of the plurality of conductive interconnects to the heat pipe.

Abstract: A cyclic process including an etching process, a passivation process, and a pumping out process is provided to prevent over etching of the sacrificial gate electrode, particularly when near a high-k dielectric feature. The cyclic process solves the problems of failed gate electrode layer at an end of channel region and enlarges filling windows for replacement gate structures, thus improving channel control. Compared to state-of-art solutions, embodiments of the present disclosure also enlarge volume of source/drain regions, thus improving device performance.

Abstract: A display apparatus (2) and an electronic device (0). The display apparatus (2) comprises a first functional layer (211) of a touch screen (21), a touch sensing layer (212) of the touch screen (21), a second functional layer (223) of a display screen (22), a liquid crystal panel (221) of the display screen (22), a third functional layer (224) of the display screen (22), and a backlight module (222) of the display screen (22), which are arranged in a stacked manner, wherein the touch screen (21) is bonded with the display screen (22), and at least two of the first functional layer (211), the touch sensing layer (212), an adhesive (23), the second functional layer (223) and the third functional layer (224) are provided with an anti-glare structure and/or a blue light blocking structure.

Abstract: A quantitative prediction method for gas content of deep marine shale includes: obtaining raw data of known wells; establishing relationship formulas between pore specific surface areas and adsorbed gas contents of a known well in an area as an adsorbed gas content quantitative prediction model; establishing relationship formulas between pore volumes and free gas contents of the known well as a free gas content quantitative prediction model; summing the adsorbed gas contents and corresponding free gas contents to obtain total gas contents; calculating adsorbed gas contents, free gas contents and total gas contents of the known wells; drawing a predicted adsorbed gas content contour map, a predicted free gas content contour map and a predicted total gas content contour map; and reading an adsorbed gas content, a free gas content and a total gas content of an unknown well in the area from the above contour maps.

Abstract: A display panel, including an active area and a peripheral area, which is located outside of the active area, wherein the active area comprises a base substrate, and a display structure layer and a touch structure layer sequentially arranged on the base substrate; the peripheral area includes an isolation dam, a first ground trace and a second ground trace arranged on the base substrate; and the first ground trace is located at a side of the isolation dam close to the active area, and the second ground trace is located at a side of the isolation dam away from the active area.