Abstract: One embodiment provides an apparatus comprising a memory stack including multiple memory dies and a parallel processor including a plurality of multiprocessors. Each multiprocessor has a single instruction, multiple thread (SIMT) architecture, the parallel processor coupled to the memory stack via one or more memory interfaces. At least one multiprocessor comprises a multiply-accumulate circuit to perform multiply-accumulate operations on matrix data in a stage of a neural network implementation to produce a result matrix comprising a plurality of matrix data elements at a first precision, precision tracking logic to evaluate metrics associated with the matrix data elements and indicate if an optimization is to be performed for representing data at a second stage of the neural network implementation, and a numerical transform unit to dynamically perform a numerical transform operation on the matrix data elements based on the indication to produce transformed matrix data elements at a second precision.

Abstract: A high anti-interference microsystem based on System In Package (SIP) for a power grid is provided. The high anti-interference microsystem comprises a ceramic cavity, a ceramic substrate, a magnetic cover plate, a digital signal processing circuit, an analog signal conditioning circuit and a shield, wherein the ceramic cavity supports the ceramic substrate, the magnetic cover plate is in sealed contact with the ceramic cavity, and the ceramic substrate is arranged in a cavity formed by the ceramic cavity and the magnetic cover plate; a sealed shell of the microsystem based on SIP is composed of the magnetic cover plate and the ceramic cavity; the digital signal processing circuit and the analog signal conditioning circuit are arranged on the ceramic substrate and respectively process received signals to be processed; the shield covers an outer side of the sealed shell and is used for shielding external magnetic field interference.

Abstract: A semiconductor device includes a substrate having an array region defined thereon, a ring of magnetic tunneling junction (MTJ) region surrounding the array region, a gap between the array region and the ring of MTJ region, and metal interconnect patterns overlapping part of the ring of MTJ region. Preferably, the array region includes a magnetic random access memory (MRAM) region and a logic region and the ring of MTJ region further includes a first MTJ region and a second MTJ region extending along a first direction and a third MTJ region and a fourth MTJ region extending along a second direction.

Abstract: A magnetoresistive random access memory, including a substrate, a conductive plug in the substrate, wherein the conductive plug has a notched portion on one side of the upper edge of the conductive plug, and a magnetic memory cell with a bottom electrode electrically connecting with the conductive plug, a magnetic tunnel junction on the bottom electrode and a top electrode on the magnetic tunnel junction, wherein the bottom surface of the magnetic memory cell and the top surface of the conductive plug completely align and overlap each other.

Abstract: A method includes etching a semiconductor substrate to form a trench, with the semiconductor substrate having a sidewall facing the trench, and depositing a first semiconductor layer extending into the trench. The first semiconductor layer includes a first bottom portion at a bottom of the trench, and a first sidewall portion on the sidewall of the semiconductor substrate. The first sidewall portion is removed to reveal the sidewall of the semiconductor substrate. The method further includes depositing a second semiconductor layer extending into the trench, with the second semiconductor layer having a second bottom portion over the first bottom portion, and a second sidewall portion contacting the sidewall of the semiconductor substrate. The second sidewall portion is removed to reveal the sidewall of the semiconductor substrate.

Abstract: A method includes receiving a device design layout and a scribe line design layout surrounding the device design layout. The device design layout and the scribe line design layout are rotated in different directions. An optical proximity correction (OPC) process is performed on the rotated device design layout and the rotated scribe line design layout. A reticle includes the device design layout and the scribe line design layout is formed after performing the OPC process.

Abstract: A device for simulating carbon dioxide storage in a deep saline aquifer, including a CO2 gas source, first and second valves, first and second pressure pumps, first, second and third pressure gauges, a water storage tank, a simulation box, a first flow meter, a gas-liquid separator, a recycling tank, a microcomputer-display assembly, a structure plate, core holders, an injection pipeline, a connection pipeline, a baffle, a piezometer, a second flow meter, a heater, a lifter and an acoustic logging tool. The CO2 gas source, the first valve, the first pressure pump and the first pressure gauge for gas injection. The water storage tank, a second pressure pump and a second pressure gauge for water injection. The second valve, the third pressure gauge, the first flow meter, the gas-liquid separator and the recycling tank form an output pipeline.

Abstract: An identity certificate may be issued to a blockchain node. The issuance may include issuing a first identity certificate to a first terminal and receiving a second identity certificate issuance request that is from the first terminal. A second identity certificate may be issued to the first terminal, and a third identity certificate issuance request is received from the second terminal. A third identity certificate is issued to the second terminal, so that the second terminal forwards the third identity certificate to the third terminal.

Abstract: A device includes a device layer comprising a first transistor; a first interconnect structure on a front-side of the device layer; and a second interconnect structure on a backside of the device layer. The second interconnect structure includes a first dielectric layer on the backside of the device layer; a contact extending through the first dielectric layer to a source/drain region of the first transistor; a conductive line electrically connected to the source/drain region of the first transistor through the contact; and a thermal dissipation path thermally connected to the device layer, the thermal dissipation path extending to a surface of the second interconnect structure opposite the device layer. The thermal dissipation path comprises a dummy via.

Abstract: An electronic camera assembly includes a camera chip cube bonded to camera bondpads of an interposer; at least one light-emitting diode (LED) bonded to LED bondpads of the interposer at the same height as the camera bondpads; and a housing extending from the interposer and LEDs to the height of the camera chip cube, with light guides extending from the LEDs through the housing to a top of the housing. In embodiments, the electronic camera assembly includes a cable coupled to the interposer. In typical embodiments the camera chip cube has footprint dimensions of less than three and a half millimeters square.

Abstract: The present invention provides a GPS interference source positioning method, apparatus, electronic device, and readable storage medium, which relates to the technical field of wireless communications.

Abstract: A foldable electronic device, including a first body, a second body, an air valve movably disposed in the first body, at least one triggering member, and a hinge connecting the first body and the second body, is provided. The first body has multiple openings respectively located at two opposite surfaces. The triggering member is movably disposed in the first body and has a part exposed outside the first body. The air valve and the triggering member are mutually on moving paths of each other. The first body and the second body are rotated to be folded or unfolded relative to each other by the hinge. A part of the triggering member is suitable for bearing a force such that the triggering member drives the air valve, so that the air valve opens or closes the openings.

Abstract: A method for assessing test adequacy of deep neural networks based on element decomposition is provided. The network testing is divided into black box testing and white box testing, of which key elements are decomposed and defined. Network parameters including a weight matrix and a bias vector are extracted. Importance values of neurons in individual layers of the deep neural network are calculated and clustered, and an importance value hot map of neurons in each layer is generated based on clustering results. Mutation testing, and index calculation and evaluation are performed.

Abstract: A foldable electronic device, including a first body having a first shaft member, at least one second body having a second shaft member, and a latching member, is provided. The first shaft member and the second shaft member are coaxially pivoted together. The first shaft member has a recess. The second shaft member has a locking hole. The latching member is movably disposed in the recess and the locking hole, so that when the latching member leaves the locking hole, the first body and the second body are relatively pivoted through the first shaft member and the second shaft member, or when the latching member moves into the locking hole, the latching member interferes with the first shaft member and the second shaft member to block the first body and the second body from relatively pivoting.

Abstract: An apparatus to facilitate optimization of a convolutional neural network (CNN) is disclosed. The apparatus includes optimization logic to receive a CNN model having a list of instructions and including pruning logic to optimize the list of instructions by eliminating branches in the list of instructions that comprise a weight value of 0.

Abstract: One or more implementations of the present specification provide an invoice access method and apparatus based on a blockchain, and an electronic device. The method includes: generating first ciphertext data by encrypting plaintext data of the target invoice based on a first key corresponding to an invoice issuer; generating second ciphertext data by encrypting the plaintext data of the target invoice based on a second key corresponding to an invoice receiver; adding the first ciphertext data and an user identifier of the invoice issuer to the blockchain as related to one another; and adding the second ciphertext data and an user identifier of the invoice receiver to the blockchain as related to one another.

Abstract: An uninterruptible power apparatus is coupled between a power grid and a load. The uninterruptible power apparatus includes a bypass path, a power conversion module, and a control module. The bypass path is coupled to the power grid through a grid terminal, and coupled to the load through a load terminal. The control module turns off a first thyristor and a second thyristor by injecting a second voltage into the load terminal during a forced commutation period. The control module calculates a magnetic flux offset amount based on an error amount between the second voltage and a voltage command, and provides a compensation command in response to the magnetic flux offset amount. The control module controls the DC/AC conversion circuit to provide a third voltage to the load terminal based on the compensation command and the voltage command.

Abstract: An imaging system including an image acquisition device, a light-field imaging arrangement including an optical meta-device operable to facilitate imaging of a light-field of a target scene, and a structured-light imaging arrangement including an optical meta-device operable to facilitate generation of structured-light to be provided to a target scene to facilitate imaging of the target scene. The light-field imaging arrangement and the structured-light imaging arrangement are operably coupled with the image acquisition device such that the imaging system is selectively operable in, at least, a light-field imaging mode for performing light-field imaging of the target scene and a structured-light imaging mode for performing structured-light imaging of the target scene. The optical meta-device of the light-field imaging arrangement and the optical meta-device of the structured-light imaging arrangement may be provided by the same optical meta-device.

Abstract: A storage device is disclosed herein. The storage device comprises: a non-volatile memory, where the non-volatile memory includes a block of N wordlines partitioned into a plurality of sub-blocks; and control circuitry coupled to the N wordlines. The control circuitry is configured to: determine a program status of an unselected sub-block of the plurality of sub-blocks before performing an operation on a selected sub-block of the plurality of sub-blocks; based on determining that the program status of the unselected sub-block is programmed, perform a precharge operation including applying a first precharge time; and based on determining that the program status of the unselected sub-block is not programmed, perform a precharge operation including applying a second precharge time, wherein the first precharge time is for a longer period than the second precharge time.

Abstract: Methods and systems for budgeted and simplified training of deep neural networks (DNNs) are disclosed. In one example, a trainer is to train a DNN using a plurality of training sub-images derived from a down-sampled training image. A tester is to test the trained DNN using a plurality of testing sub-images derived from a down-sampled testing image. In another example, in a recurrent deep Q-network (RDQN) having a local attention mechanism located between a convolutional neural network (CNN) and a long-short time memory (LSTM), a plurality of feature maps are generated by the CNN from an input image. Hard-attention is applied by the local attention mechanism to the generated plurality of feature maps by selecting a subset of the generated feature maps. Soft attention is applied by the local attention mechanism to the selected subset of generated feature maps by providing weights to the selected subset of generated feature maps in obtaining weighted feature maps.