Abstract: A package structure includes an interposer, a die over and bonded to the interposer, and a Printed Circuit Board (PCB) underlying and bonded to the interposer. The interposer is free from transistors therein (add transistor), and includes a semiconductor substrate, an interconnect structure over the semiconductor substrate, through-vias in the silicon substrate, and redistribution lines on a backside of the silicon substrate. The interconnect structure and the redistribution lines are electrically coupled through the through-vias.

Abstract: A vehicle system includes a vehicle size sensor mounted in a subject vehicle, the vehicle size sensor configured to detect whether a leading vehicle in front of the subject vehicle is oversized, and a processor coupled to the subject vehicle and the vehicle size sensor. The subject vehicle is configured to perform an assisted passing of the leading vehicle based on a passing parameter that defines a characteristic of the assisted passing, and the processor is programmed to, during the assisted passing: communicate with the vehicle size sensor to determined whether the leading vehicle is oversized, and modify the passing parameter when the leading vehicle is determined to be oversized.

Abstract: A vehicle includes a plurality of wheels. A vehicle steering controller controls a heading of the vehicle by controlling at least one of the plurality of wheels. A heading sensor detects the heading of the vehicle. A processor is coupled to the vehicle steering controller and the heading sensor, and the processor is programmed to receive a lane change signal that requests a lane change. Then, the processor determines the heading of the vehicle from the heading sensor. Based on this determination, the processor instructs the vehicle steering controller to reduce the heading of the vehicle to prior to executing the requested lane change. As a result, the lane change may be executed from a similar state each time.

Abstract: Compounds of Formula (I): pharmaceutically acceptable salts thereof, deuterated derivatives of any of the foregoing, and metabolites of any of the foregoing are disclosed. Pharmaceutical compositions comprising the same, methods of treating cystic fibrosis using the same, and methods for making the same are also disclosed. Also disclosed are solid state forms of Compound 1 and salts and solvates thereof.

Abstract: A character recognition method is provided, including the steps of: recognizing a character string, which includes one or more characters, in a region of interest (ROI) using a first convolutional neural network (CNN) model to generate a recognized character string; and comparing the recognized character string with a plurality of character strings in a character database to find a character string corresponding to the recognized character string, wherein each of the character strings includes one or more characters; wherein if the character string corresponding to the recognized character string is found, the recognized character string is used as a character recognition result, otherwise, using a second CNN model to correct the recognized string and generate a new recognized character string as the character recognition result.

Abstract: A package structure includes an interposer, a die over and bonded to the interposer, and a Printed Circuit Board (PCB) underlying and bonded to the interposer. The interposer is free from transistors therein (add transistor), and includes a semiconductor substrate, an interconnect structure over the semiconductor substrate, through-vias in the silicon substrate, and redistribution lines on a backside of the silicon substrate. The interconnect structure and the redistribution lines are electrically coupled through the through-vias.

Abstract: An integrated fan-out package including a chip module, a second integrated circuit, a second insulating encapsulation, and a redistribution circuit structure is provided. The chip module includes a first insulating encapsulation and a first integrated circuit embedded in the first insulating encapsulation, and the first integrated circuit includes a first surface and first conductive terminals on the first surface. The second integrated circuit includes a second surface and second conductive terminals on the second surface. The chip module and the second integrated circuit are embedded in the second insulating encapsulation. The first and second conductive terminals are accessibly exposed from the first and second insulating encapsulation. The redistribution circuit structure covers the first surface, the second surfaces, the first insulating encapsulation, and the second insulating encapsulation. The redistribution circuit structure is electrically connected to the first and second conductive terminals.

Abstract: A package structure includes an interposer, a die over and bonded to the interposer, and a Printed Circuit Board (PCB) underlying and bonded to the interposer. The interposer is free from transistors therein (add transistor), and includes a semiconductor substrate, an interconnect structure over the semiconductor substrate, through-vias in the silicon substrate, and redistribution lines on a backside of the silicon substrate. The interconnect structure and the redistribution lines are electrically coupled through the through-vias.

Abstract: A method for scheduling encoding of streaming data by a scheduling apparatus includes: when there is at least one idle hardware encoder and there is no full GOF in any one of the at least one streaming buffer, but there is at least one non-full GOF in any one of the at least one streaming buffer, then, calculating a reception rate of each of the at least one non-full GOF, and starting encoding already-received frames of the one of the at least one non-full GOF with a highest reception rate using one of the at least one idle hardware encoder; and if there is at least one idle hardware encoder and there is at least one full GOF in any one of the at least one streaming buffer, encoding one of the at least one full GOF using one of the at least one idle hardware encoder.

Abstract: A package structure includes an interposer, a die over and bonded to the interposer, and a Printed Circuit Board (PCB) underlying and bonded to the interposer. The interposer is free from transistors therein (add transistor), and includes a semiconductor substrate, an interconnect structure over the semiconductor substrate, through-vias in the silicon substrate, and redistribution lines on a backside of the silicon substrate. The interconnect structure and the redistribution lines are electrically coupled through the through-vias.

Abstract: A combinational cooling pad structure with flash drive storage comprises a cooling pad and a flash drive. The cooling pad comprises at least three combinational pads with structural surfaces. At least two connecting portions are correspondingly disposed between the combinational pads. Limiting structures are correspondingly disposed on outer sides of the outer combinational pads. The combinational pads are connected by the connecting portions to form a structure which can be unfolded flatly; and are folded closely together to form a structural body surrounded by the structural surfaces; and are combined securely by the corresponding limiting structures. An inner hole for inserting the flash drive is defined and formed by inner surfaces of the surrounding combinational pads. A coupling portion is protrudingly disposed at an end of the flash drive, and an interface connector is disposed on the coupling portion. The coupling portion is then inserted into the inner hole.

Abstract: Embodiments of the present disclosure include a semiconductor device and methods of forming a semiconductor device. An embodiment is a method of forming a semiconductor device, the method comprising forming a conductive pad in a first substrate, forming an interconnecting structure over the conductive pad and the first substrate, the interconnecting structure comprising a plurality of metal layers disposed in a plurality of dielectric layers, bonding a die to a first side of the interconnecting structure, and etching the first substrate from a second side of the interconnecting structure, the etching exposing a portion of the conductive pad.

Abstract: A foldable trolley comprises a supporting frame having two lateral rods with a roller disposed at each of two ends of the lateral rods, opposite inner sides of the two horizontal lateral rods being coupled interlockingly with a cross connecting rod for compressing and expanding; a supporting plate placed on the expanded supporting frame comprising a plurality of plates connected with ligaments for forming a multi-section foldable structure; and a handle set comprising two vertical supporting rods with lower ends pivotally connected to the two lateral rods of the supporting frame, and upper ends sleevely connected to a dismountable horizontal rod. Thereby, after the horizontal rod and the supporting plate of the combinational structure are dismounted, the cross connecting rod between the two lateral rods of the supporting frame can be collapsed for forming a compact structure with a decreased volume.

Abstract: Embodiments of the present disclosure include a semiconductor device and methods of forming a semiconductor device. An embodiment is a method of forming a semiconductor device, the method comprising forming a conductive pad in a first substrate, forming an interconnecting structure over the conductive pad and the first substrate, the interconnecting structure comprising a plurality of metal layers disposed in a plurality of dielectric layers, bonding a die to a first side of the interconnecting structure, and etching the first substrate from a second side of the interconnecting structure, the etching exposing a portion of the conductive pad.

Abstract: A combinational cooling pad structure with flash drive storage comprises a cooling pad and a flash drive. The cooling pad comprises at least three combinational pads with structural surfaces. At least two connecting portions are correspondingly disposed between the combinational pads. Limiting structures are correspondingly disposed on outer sides of the outer combinational pads. The combinational pads are connected by the connecting portions to form a structure which can be unfolded flatly; and are folded closely together to form a structural body surrounded by the structural surfaces; and are combined securely by the corresponding limiting structures. An inner hole for inserting the flash drive is defined and formed by inner surfaces of the surrounding combinational pads. A coupling portion is protrudingly disposed at an end of the flash drive, and an interface connector is disposed on the coupling portion. The coupling portion is then inserted into the inner hole.

Abstract: A video compression method and system is specialized for uniform throughput video compression. The method/system encodes video sequences with uniform throughput, while reducing computational complexity as much as possible. By this means, it can efficiently decrease the latency incurred in video compression process and is suitable for real time video streaming and cloud gaming applications.

Abstract: A package structure includes an interposer, a die over and bonded to the interposer, and a Printed Circuit Board (PCB) underlying and bonded to the interposer. The interposer is free from transistors therein (add transistor), and includes a semiconductor substrate, an interconnect structure over the semiconductor substrate, through-vias in the silicon substrate, and redistribution lines on a backside of the silicon substrate. The interconnect structure and the redistribution lines are electrically coupled through the through-vias.

Abstract: Embodiments of the present disclosure include a semiconductor device and methods of forming a semiconductor device. An embodiment is a method of forming a semiconductor device, the method comprising forming a conductive pad in a first substrate, forming an interconnecting structure over the conductive pad and the first substrate, the interconnecting structure comprising a plurality of metal layers disposed in a plurality of dielectric layers, bonding a die to a first side of the interconnecting structure, and etching the first substrate from a second side of the interconnecting structure, the etching exposing a portion of the conductive pad.

Abstract: A data processing apparatus and a data processing method thereof are provided. The data processing apparatus includes a register and a processor electrically connected to the register. The register is stored with a plurality of data. The plurality of data each includes a first sub-datum and a second sub-datum. The plurality of first sub-data corresponds to a first column and the plurality of second sub-data corresponds to a second column. The processor compresses the first sub-data by a first compression algorithm according to a first characteristic of the plurality of first sub-data and compresses the second sub-data by a second compression algorithm according to a second characteristic of the plurality of second sub-data.