Abstract: A resistive random access memory is provided. The resistive memory cell includes a substrate, a transistor on the substrate, a bottom electrode on the substrate and electrically connected to the transistor source/drain, several top electrodes on the bottom electrode, several resistance-switching layers between the top and bottom electrode, and several current limiting layers between the resistance-switching layer and top electrodes. The cell could improve the difficulty on recognizing 1/0 signal by current at high temperature environment and save the area on the substrate by generating several conductive filaments at one transistor location.

Abstract: A data read method and a non-volatile memory apparatus using the same are provided. The data read method includes: obtaining a first read current and a second read current from a memory cell pair of the non-volatile memory; performing a calculation operation according to the first read current and the second read current to obtain a calculation result; and determining a logical state of the memory cell pair according to the calculation result. The calculation operation includes at least a signal addition operation and a signal multiplying operation.

Abstract: A resistive random access memory is provided. The resistive random access memory includes a bottom electrode over a substrate, a top electrode, a resistance-switching layer, an oxygen exchange layer, and a sidewall protective layer. The top electrode is disposed over the bottom electrode. The resistance-switching layer is disposed between the bottom electrode and the top electrode. The oxygen exchange layer is disposed between the resistance-switching layer and the top electrode. The sidewall protective layer containing metal or semiconductor is disposed at sidewalls of the resistance-switching layer, and the sidewalls of the resistance-switching layer is doped with the metal or semiconductor from the sidewall protective layer.

Abstract: A resistive random access memory is provided. The resistive random access memory includes a bottom electrode, a top electrode, a resistance-switching layer, an oxygen exchange layer, and a sidewall protective layer. The bottom electrode is disposed over a substrate. The top electrode is disposed over the bottom electrode. The resistance-switching layer is disposed between the bottom electrode and the top electrode. The oxygen exchange layer is disposed between the resistance-switching layer and the top electrode. The sidewall protective layer as an oxygen supply layer is at least disposed at sidewalls of the oxygen exchange layer.

Abstract: An operating method for a resistive memory cell and a resistive memory are provided. The operating method for the resistive memory cell includes following steps. A forming operation for the resistive memory cell is performed. Whether the resistive memory cell is in a first state is determined, wherein the first state is corresponding to a first operation. When the resistive memory cell is not in the first state, a complementary switching operation regarding a second operation for the resistive memory cell is performed, so that the resistive memory cell generates a complementary switching phenomenon regarding the second operation. Thus, the resistive memory cell which cannot retain data by normal forming operation can effectively obtain the data retention capability by the complementary switching phenomenon.

Abstract: A resistive random access memory is provided. The resistive random access memory includes a bottom electrode, a top electrode, a resistance-switching layer, an oxygen exchange layer, and a sidewall protective layer. The bottom electrode is disposed over a substrate. The top electrode is disposed over the bottom electrode. The resistance-switching layer is disposed between the bottom electrode and the top electrode. The oxygen exchange layer is disposed between the resistance-switching layer and the top electrode. The sidewall protective layer as an oxygen supply layer is at least disposed at sidewalls of the oxygen exchange layer.

Abstract: A resistive random access memory device is provided, which includes a bottom electrode, a resistive switching layer disposed on the bottom electrode, an oxidizable layer disposed on the resistive switching layer, a first oxygen diffusion barrier layer disposed between the oxidizable layer and the resistive switching layer, and a second oxygen diffusion barrier layer disposed on the oxidizable layer.

Abstract: An operating method for a resistive memory cell and a resistive memory are provided. The operating method for the resistive memory cell includes following steps. A forming operation for the resistive memory cell is performed. Whether the resistive memory cell is in a first state is determined, wherein the first state is corresponding to a first operation. When the resistive memory cell is not in the first state, a complementary switching operation regarding a second operation for the resistive memory cell is performed, so that the resistive memory cell generates a complementary switching phenomenon regarding the second operation. Thus, the resistive memory cell which cannot retain data by normal forming operation can effectively obtain the data retention capability by the complementary switching phenomenon.

Abstract: A resistive random access memory is provided. The resistive memory cell includes a substrate, a transistor on the substrate, a bottom electrode on the substrate and electrically connected to the transistor source/drain, several top electrodes on the bottom electrode, several resistance-switching layers between the top and bottom electrode, and several current limiting layers between the resistance-switching layer and top electrodes. The cell could improve the difficulty on recognizing 1/0 signal by current at high temperature environment and save the area on the substrate by generating several conductive filaments at one transistor location.

Abstract: A writing method for a resistive memory cell and a resistive memory are provided. The writing method includes following steps. A reference voltage is provided to a bit line of the resistive memory cell. A first voltage is provided to a word line of the resistive memory cell, and a second voltage is provided to a source line of the resistive memory cell, wherein the first voltage is not increased while the second voltage is progressively increased. Thus, when the writing method for the resistive memory cell is performed, the voltage of the word line is not increased while the voltage of the source line is progressively increased, so as to expand voltage window for reset operation. And, the chance for occurring the complementary switching manifestation of the resistive memory cell due to excessive input voltages is reduced.

Abstract: A resistive random access memory (RRAM) including a first electrode, a second electrode, and a variable-resistance oxide layer disposed between the first electrode and the second electrode is provided. The RRAM further includes an oxygen exchange layer, an oxygen-rich layer, and a first oxygen barrier layer. The oxygen exchange layer is disposed between the variable-resistance oxide layer and the second electrode. The oxygen-rich layer is disposed between the oxygen exchange layer and the second electrode. The first oxygen barrier layer is disposed between the oxygen exchange layer and the oxygen-rich layer.

Abstract: A resistive memory apparatus and a writing method thereof are provided. In the method, logic data is received, and a corresponding resistive memory cell is selected. A logic level of the logic data is determined. When the logic data is in a first logic level, where a first reading current of the corresponding resistive memory cell is greater than a first reference current, a set pulse and a reset pulse are provided to the resistive memory cell during a writing period. When the logic data is in a second logic level, where a second reading current of the resistive memory cell is smaller than a second reference current, the reset pulse is provided to the resistive memory cell during the writing period. Polarities of the reset pulse and the set pulse are opposite.

Abstract: A resistive memory apparatus and a reading method thereof are provided. In this method, two reading pulses are applied to a resistive memory cell, such that a first reading resistance and a second reading resistance of the resistive memory cell at different temperatures are sequentially obtained. Next, a resistive state of the second reading resistance is determined according to the reading resistances and the temperatures corresponding to the reading resistances. Thereafter, a logic level of storage data of the resistive memory cell is determined according to the resistive state of the second reading resistance.

Abstract: An operation method of a resistive random access memory (RRAM) cell is provided, wherein the RRAM cell includes a variable impedance element and a switch element connected in series. The operation method includes the following steps. When the switch element is turned-on, a writing signal is provided to the variable impedance element to set an impedance of the variable impedance element. In a first period, the writing signal is set to a first writing voltage level to transmit a first electrical energy to the variable impedance element. In a second period, a second electrical energy is transmitted to the variable impedance element by the writing signal. The second period is subsequent to the first period, the first electrical energy and the second electrical energy are greater than zero, and the second electrical energy is smaller than the first electrical energy.

Abstract: In a positioning apparatus for architectural construction, a footer element includes a base plate, and a passing column erected from the base plate and having guide teeth. The passing column is breakable from the base plate. A pressing seat has a penetrating hole for sheathing the passing column and a lateral hole communicating with the penetrating hole. A toggling element is pivoted at the lateral hole and has a circular gear portion and a positioning portion. The circular gear portion is extended into the penetrating hole, engaged with the guide tooth, and guided by the guide teeth to move up and down along the passing column when the toggling element is turned. A positioning element is installed at the pressing seat and on the same side of the toggling element, and has a blocking portion for limiting the positioning portion and blocking the turning of the toggling element.

Abstract: A device for detachably, adjustably securing a toilet to the ground is provided with two curved plates each including an intermediate curved slot including wide and narrows section, two end holes, two holed projections proximate the end holes respectively, and bottom protuberances; two curved spacers each including an intermediate protrusion and two bossed holes proximate both ends respectively, the bossed holes being inserted through the end holes to fit the protrusion between facing ends of the curved plates so that the curved spacer and the curved plates are joined; two threaded fasteners each including a head capable of freely passing the wide section but not passing the narrow section so as to threadedly secure to the toilet, and a bare section capable of frictionally moving along the narrow section so as to relatively position the toilet with respect to the device.

Abstract: A method of integrating a plurality of wires (40) of an electrical round cable (4) provides a jig (1) including an upper block (3) and a lower block (2). The lower block has a jig plane (20) in which a plurality of receiving grooves (22) is defined. The wires of the round cable are placed into the receiving grooves of the lower block. An adhesive strip (5) is placed onto insulative sheaths of the wires. The upper block is moved downwardly to depress the adhesive strip against the insulative sheaths. Simultaneously, the adhesive strip is heated so that it partly melts and integrally joins with the insulative sheaths.