Abstract: A time-to-digital converter (TDC) circuit generates a digital output indicating a time, known as a phase difference, from a phase of the generated signal to a corresponding phase of a reference signal. The digital output is used by the digitally controlled oscillator (DCO) to correct for the phase/frequency difference to synchronize the generated signal with the reference signal. In an aspect, an adaptive TDC circuit generates a first digital indication in a coarse mode when the offset time is above a threshold and generates a second digital indication in a fine mode when the offset time is below the threshold. The first digital indication and the second digital indication each comprise a same number of bits, and the first digital indication is normalized to the second digital indication for the digital output of the adaptive TDC circuit. A fractional bit may be employed to compensate for a quantization error.

Abstract: A phase-interpolator (PI) circuit generates an interpolated clock to capture data in a capture circuit at a target phase in a phase range between two reference clocks based on an interpolation code within a range of interpolation codes is described. A clamping circuit coupled to the PI circuit provides an interpolation code within a reduced range, where the integral non-linearity (INL) of the interpolated clocks is below a threshold, such that data capture based on the interpolated clock has a lower bit error rate (BER). As a result, the interpolated clock is generated within a reduced phase range corresponding to the reduced range of interpolation codes. When a target phase for an interpolated clock is outside the reduced phase range, the clamping circuit may adjust the target phase clock relative to a reference clock to adjust the target phase to be within the reduced phase range for improved BER.

Abstract: In a calibrated digital phase-locked-loop (DPLL) circuit, during a normal operating mode, a control value provided to a digitally controlled oscillator (DCO) is updated by a feedback circuit to keep an output clock generated by the DCO synchronized with a reference clock. The feedback circuit includes a time-to-digital converter (TDC) circuit to measure a phase difference as a time interval. In a calibration operating mode of the calibrated DPLL circuit, calibration of a resolution of a time measurement of the time interval measured by the TDC is performed in the feedback circuit while the control value provided to the DCO is kept constant. Calibrating the TDCs in each of the DPLLs in an integrated circuit (IC) to a nominal resolution in this manner improves synchronization of the clock domains. In some examples, the TDC circuit is a Vernier type circuit and calibration sets a delay difference to a nominal resolution.

Abstract: Disclosed are methods of treating diseases or disorders mediated by dysregulated CDK4/6 and/or Pin 1 activity comprising co-administering a therapeutically effective amount of one or more CDK4/6 inhibitors, and a therapeutically effective amount of one or more Pin1 inhibitors, or a pharmaceutically acceptable salt or salts thereof

Abstract: Certain substituted urea derivatives selectively modulate the cardiac sarcomere, for example by potentiating cardiac myosin, and are useful in the treatment of systolic heart failure including congestive heart failure.

Abstract: An apparatus, method and system are set forth for detection of fluids using Bragg grating sensors, wherein the Bragg grating sensing element comprises an optical fiber having a Bragg grating inscribed therein characterized by optical properties that are dependent upon the periodicity and effective refractive index of the grating, and a package for subjecting the Bragg grating to a change in strain when contacted by a fluid such that periodicity and effective refractive index of the grating changes, whereby when interrogated with laser light any such change in periodicity and effective refractive index may be detected.

Abstract: A time-to-digital converter (TDC) circuit generates a digital output indicating a time, known as a phase difference, from a phase of the generated signal to a corresponding phase of a reference signal. The digital output is used by the digitally controlled oscillator (DCO) to correct for the phase/frequency difference to synchronize the generated signal with the reference signal. In an aspect, an adaptive TDC circuit generates a first digital indication in a coarse mode when the offset time is above a threshold and generates a second digital indication in a fine mode when the offset time is below the threshold. The first digital indication and the second digital indication each comprise a same number of bits, and the first digital indication is normalized to the second digital indication for the digital output of the adaptive TDC circuit. A fractional bit may be employed to compensate for a quantization error.

Abstract: In a calibrated phase-locked loop (PLL), a time-to-digital (TDC) converter circuit can be calibrated to a nominal gain by a calibration circuit to achieve a desired jitter response in the PLL. The TDC circuit in the PLL measures a time difference between the reference clock and a feedback signal as a number of time increments, and the calibration circuit adjusts a resolution of the measurement by adjusting the length of the time increments (i.e., resolution). In a Vernier method employed to measure the time difference, the length of a time increment is determined by a delay difference between a first delay of a first delay circuit in a first series of first delay circuits and a second delay of a second delay circuit in a second series of second delay circuits. Adjusting the resolution of the TDC circuit includes adjusting the delay difference between the first delay and the second delay.

Abstract: A method and apparatus for inscribing a Bragg grating in an optical waveguide, comprising: providing electromagnetic radiation from an ultrashort pulse duration laser, wherein the electromagnetic radiation has a pulse duration of less than or equal to 5 picoseconds, and wherein the wavelength of the electromagnetic radiation has a characteristic wavelength in the wavelength range from 150 nanometers (nm) to 2.0 microns (?m): providing cylindrical focusing optics corrected for spherical aberration: providing a diffractive optical element that when exposed to the focused ultrashort laser pulse, creates an interference pattern on the optical waveguide, wherein the irradiation step comprises irradiating a surface of the diffractive optical element with the focused electromagnetic radiation, the electromagnetic radiation incident on the optical waveguide, from the diffractive optical element, being sufficiently intense to cause the permanent change in the index of refraction in the core of the optical waveguide.

Abstract: The present invention relates to the technical field of medicine, and in particular, relates to a composition of vancomycin aqueous solution. The pharmaceutical composition contains vancomycin or a pharmaceutically acceptable salt thereof, N-methylalanine, and water. The stability of vancomycin in the state of an aqueous solution can be improved by using N-methylalanine.

Abstract: Provided are novel pyrimidine dione compounds and pharmaceutically acceptable salts thereof, that are useful for the treatment of hypertrophic cardiomyopathy (HCM) and conditions associated with left ventricular hypertrophy or diastolic dysfunction. The synthesis and characterization of the compounds and pharmaceutically acceptable salts thereof, are described, as well as methods for treating HCM and other forms of heart disease.

Abstract: A medicine image recognition method applied to an electronic device is provided. The method includes obtaining target images by inputting medicine images into a position detection network. Character feature matrices are generated according to the target images and a character recognition network. Image feature matrices are generated by inputting the target images into a category recognition network. Reference matrices are generated according to the image feature matrices and corresponding character feature matrices. Once a matrix to be tested is generated by processing an image to be tested, and a recognition result of the image to be tested is generated according to a similarity between the matrix to be tested and each of the reference matrices.

Abstract: Provided herein are compounds of formula (I): or a stereoisomer or tautomer thereof, or a pharmaceutically acceptable salt of any of the foregoing, wherein X1, X2, Ry, Rz, R1, R2, R3, and R4 are as defined herein. Also provided herein is a pharmaceutically acceptable composition comprising a compound of formula (I), or a stereoisomer or tautomer thereof, or a pharmaceutically acceptable salt of any of the foregoing. Also provided herein are methods of using a compound of formula (I), or a stereoisomer or tautomer thereof, or a pharmaceutically acceptable salt of any of the foregoing, to treat various diseases, disorders, and conditions responsive to the modulation of the contractility of the skeletal sarcomere.

Abstract: Time-to-digital converters (TDC) employing a single-stage delay pair for a wide input range and reduced quantization noise in a phase-locked loop (PLL) and related fabrication methods are disclosed. Aspects disclosed in the detailed description include a single-stage Vernier time-to-digital converter (TDC) which mitigates the device mismatch impact and therefore avoids possible spurious tones in a fractional-N PLL application. Combined with a delta-sigma noise shaping stage and a ring-oscillator based coarse TDC, the invention achieves a good trade-off between resolution, detection range and PLL locking speed.

Abstract: A method of making an ejector device. The method includes providing a substrate and forming one or more ejector conduits on the substrate. The one or more ejector conduits comprise: a first end configured to accept a print material; a second end comprising an ejector nozzle, the ejector nozzle comprising a first electrode pair that includes a first electrode and a second electrode, at least one surface of the first electrode being exposed in the ejector nozzle and at least one surface of the second electrode being exposed in the ejector nozzle; and at least one passageway for allowing the print material to flow from the first end to the second end. A method of printing a three-dimensional object and a method for jetting print material from a printer jetting mechanism are also disclosed.

Abstract: The method includes: obtaining point cloud information collected by a depth camera, laser information collected by a lidar, and motion information of an unmanned aerial vehicle (UAV); generating a raster map based on the laser information, and obtaining pose information of the UAV based on the motion information; obtaining a map model through fusing the point cloud information, the raster map, and the pose information by a Bayesian fusion method; and correcting a latest map model by feature matching based on a previous map model.

Abstract: In a calibrated phase-locked loop (PLL), a time-to-digital (TDC) converter circuit can be calibrated to a nominal gain by a calibration circuit to achieve a desired jitter response in the PLL. The TDC circuit in the PLL measures a time difference between the reference clock and a feedback signal as a number of time increments, and the calibration circuit adjusts a resolution of the measurement by adjusting the length of the time increments (i.e., resolution). In a Vernier method employed to measure the time difference, the length of a time increment is determined by a delay difference between a first delay of a first delay circuit in a first series of first delay circuits and a second delay of a second delay circuit in a second series of second delay circuits. Adjusting the resolution of the TDC circuit includes adjusting the delay difference between the first delay and the second delay.

Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to track a quantity of translational units stored for each of a plurality of namespaces on an individual namespace basis. To format a given one of the plurality of namespaces, the individually tracked quantity of translational units can be deducted from a global quantity tracked for each respective block of the memory sub-system.

Abstract: Provided are compounds of Formula (I): or a pharmaceutically acceptable salt thereof, wherein Ring A, Ring B, L, RB, RC, n, and p are as defined herein. Also provided are pharmaceutically acceptable compositions comprising a compound of Formula (I), or a pharmaceutically acceptable salt thereof. Also provided are methods of using a compound of Formula (I), or a pharmaceutically acceptable salt thereof.

Abstract: Interfaces between clock domains of an integrated circuit (IC) depend on synchronization of phase-locked loops (PLLs) that generate clocks in the different domains and on how each PLL responds to jitter in a shared reference clock. The well-controlled same bandwidth (and loop dynamic) for those PLLs renders the same and, therefore, ignorable reference jitter contribution. As a key component that determines a digital PLL bandwidth, digitally controlled oscillator (DCO) may have its gain vary with process, temperature, and supply IR drop from chip to chip or even module to module. A calibration circuit provides a gain correction factor to achieve a nominal gain in DCO as well as a desired/target PLL loop bandwidth. In some examples, the calibration circuit in each PLL determines a gain correction factor that causes the PLLs to have a common jitter response and stores the gain correction factors in the calibration circuits.