Abstract: The invention includes a method and system for forming a semiconductor device. The invention involves the utilization of a stamping tool to generate three-dimensional resist structures whereby thin film patterning steps can be transferred to the resist in a single molding step and subsequently revealed in later processing steps. Accordingly, the alignments between successive patterning steps can be determined by the accuracy with which the stamping tool has been fabricated, regardless of the dilations or contractions that can take place during the fabrication process. A first aspect of the invention includes a method for forming a semiconductor device. The method comprises providing a substrate, depositing a first layer of material over the substrate and forming a 3-dimensional (3D) resist structure over the substrate wherein the 3D resist structure comprises a plurality of different vertical heights throughout the structure.

Abstract: A method and system for fabricating micron and sub-micron-sized features within a polymer layer of a nascent semiconductor device or other micro-device or nano-device. Small features are directly imprinted with an optical-mechanical stamp having corresponding intrusions. Large features are created by exposing the surface of selected areas of the polymer surface to UV radiation by transmitting UV radiation through the optical-mechanical stamp to chemically alter the polymer, allowing either UV-exposed or UV-shielded areas to be removed by solvents. Thus, described embodiments of the present invention provide for a partially transparent imprinting mask that employs purely mechanical stamping for fine features and lithography-like chemical polymer removal for large features.

Abstract: Several methods and structures for improving the yield of out-of-plane micro-device structures including springs and coils are described. In one method the springs used to form out-of-plane structures are constrained via a tether to avoid bunching and entanglement. The high yield structure may be used in numerous electronic applications such as filter circuits.

Abstract: A method of coating a semiconductor substrate material with a coating material consisting of the steps of mixing an adhesion promoter with a coating material and applying the mixture to a semiconductor substrate material. The invention also includes means for coating a semiconductor substrate material with a coating material comprising means for mixing adhesion promoters with coating materials and means for applying the mixture of adhesion promoters and coating materials to a semiconductor substrate.

Abstract: A cross point memory array is fabricated on a substrate with a plurality of memory cells, each memory cell including a diode and an anti-fuse in series. First and second conducting materials are disposed in separate strips on the substrate to form a plurality of first and second orthogonal electrodes with cross points. A plurality of semiconductor layers are disposed between the first and second electrodes to form a plurality of diodes between the cross points of the first and second electrodes. A passivation layer is disposed between the first electrodes and the diodes to form a plurality of anti-fuses adjacent to the diodes at the cross points of first and second electrodes. Portions of the diode layers are removed between the electrode cross points to form the plurality of memory cells with rows of trenches between adjacent memory cells to provide a barrier against crosstalk between adjacent memory cells. The trenches extend substantially to the depth of the n-doped layer in each diode.

Abstract: A method and system for fabricating micron and sub-micron-sized features within a polymer layer of a nascent semiconductor device or other micro-device or nano-device. Small features are directly imprinted with an optical-mechanical stamp having corresponding intrusions. Large features are created by exposing the surface of selected areas of the polymer surface to UV radiation by transmitting UV radiation through the optical-mechanical stamp to chemically alter the polymer, allowing either UV-exposed or UV-shielded areas to be removed by solvents. Thus, described embodiments of the present invention provide for a partially transparent imprinting mask that employs purely mechanical stamping for fine features and lithography-like chemical polymer removal for large features.

Abstract: Several methods and structures for improving the yield of out-of-plane micro-device structures including springs and coils are described. In one method the springs used to form out-of-plane structures are constrained via a tether to avoid bunching and entanglement. The high yield structure may be used in numerous electronic applications such as filter circuits.

Abstract: An improved method and system for laser doping a semiconductor material is described. In the invention, phosphorous nitride is used as a dopant source. The phosphorous nitride is brought into close proximity with a region of the semiconductor to be doped. A pulse of laser light decomposes the phosphorous nitride and briefly melts the region of semiconductor to be doped to allow incorporation of dopant atoms from the phosphorous nitride into the semiconductor.

Abstract: An improved method and system for laser doping a semiconductor material is described. In the invention, phosphorous nitride is used as a dopant source. The phosphorous nitride is brought into close proximity with a region of the semiconductor to be doped. A pulse of laser light decomposes the phosphorous nitride and briefly melts the region of semiconductor to be doped to allow incorporation of dopant atoms from the phosphorous nitride into the semiconductor.

Abstract: A hybrid structure or device is provided wherein carried on a single substrate is at least one micro-spring interconnect having an elastic material that is initially fixed to a surface of the substrate, an anchor portion which is fixed to the substrate surface and a free portion. The spring contact is self-assembling in that as the free portion is released it moves out of the plane of the substrate. Also integrated on the substrate is a sensor having an active layer and contacts. The substrate and sensor may be formed of materials which are somewhat partially transparent to light at certain infrared wavelengths. The integrated sensor/spring contact configuration may be used in an imaging system to sense output from a light source which is used for image formation. The light source may be a laser array, LED array or other appropriate light source. The sensor is appropriately sized to sense all or some part of light from the light source.

Abstract: A memory device includes a memory array of thin film transistor (TFT) memory cells. The memory cells include a floating gate separated from a gate electrode portion of a gate line by an insulator. The gate electrode portion includes a diffusive conductor that diffuses through the insulator under the application of a write voltage. The diffusive conductor forms a conductive path through the insulator that couples the gate line to the floating gate, changing the gate capacitance and therefore the state of the memory cell. The states of the memory cells are detectable as the differing current values for the memory cells. The memory cells are three terminal devices, and read currents do not pass through the conductive paths in the memory cells during read operations. This renders the memory cells robust, because read currents will not interfere with the storage mechanism in the memory cells. The memory array can be fabricated using multiple steps using the same mask.

Abstract: Amorphous and polycrystalline silicon (hybrid) devices are formed close to one another employing laser crystallization and back side lithography processes. A mask (e.g., TiW) is used to protect the amorphous silicon device during laser crystallization. A patterned nitride layer is used to protect the amorphous silicon device during rehydrogenation of the polycrystalline silicon. An absorption film (e.g., amorphous silicon) is used to compensate for the different transparencies of amorphous and polycrystalline silicon during the back side lithography. Device spacing of between 2 and 50 micrometers may be obtained, while using materials and process steps otherwise compatible with existing hybrid device formation processes.

Abstract: The signal-to-noise ratio of amorphous silicon (a-Si:H) image sensor arrays is limited by electronic noise, which is largely due to data line capacitance. To reduce data line capacitance, an air-gap (i.e., vacuum or gas-filled space) is produced at crossover points separating the data lines and gate lines. This air-gap crossover structure is formed by depositing a release material on the gate lines, forming the data lines on the release material, and then removing (etching) the release material such that the data lines form an arch extending over the gate lines. A dielectric material is then applied to strengthen the data line, and the sensor pixels are then formed.

Abstract: A cross point memory array is fabricated on a substrate with a plurality of memory cells, each memory cell including a diode and an anti-fuse in series. First and second conducting materials are disposed in separate strips on the substrate to form a plurality of first and second orthogonal electrodes with cross points. A plurality of semiconductor layers are disposed between the first and second electrodes to form a plurality of diodes between the cross points of the first and second electrodes. A passivation layer is disposed between the first electrodes and the diodes to form a plurality of anti-fuses adjacent to the diodes at the cross points of first and second electrodes. Portions of the diode layers are removed between the electrode cross points to form the plurality of memory cells with rows of trenches between adjacent memory cells to provide a barrier against crosstalk between adjacent memory cells. The trenches extend substantially to the depth of the n-doped layer in each diode.

Abstract: A method for placing nitride laser diode arrays on a thermally conducting substrate is described. The method uses an excimer laser to detach the nitride laser diode from the sapphire growth substrate after a thermally conducting substrate has been bonded to the side opposite the sapphire substrate.

Abstract: Several methods and structures for improving the yield of out-of-plane micro-device structures including springs and coils are described. In one method the springs used to form out-of-plane structures are constrained via a tether to avoid bunching and entanglement. The high yield structure may be used in numerous electronic applications such as filter circuits.

Abstract: A structure and method for suppressing lateral leakage current in full fill factor image arrays includes dual dielectric passivation layer. A first passivation layer includes a material that is an insulator, has a low dielectric constant to minimize capacitive coupling between the contacts, and is low stress to prevent cracking. A second passivation layer includes a thin oxide or nitride layer over the first passivation layer.

Abstract: A structure and method for suppressing lateral leakage current in full fill factor image arrays includes dual dielectric passivation layer. A first passivation layer includes a material that is an insulator, has a low dielectric constant to minimize capacitive coupling between the contacts, and is low stress to prevent cracking. A second passivation layer includes a thin oxide or nitride layer over the first passivation layer.

Abstract: A method for placing nitride laser diode arrays on a thermally conducting substrate is described. The method uses an excimer laser to detach the nitride laser diode from the sapphire growth substrate after an intermediate substrate has been attached to the side opposite the sapphire substrate. A thermally conducting substrate is subsequently bonded to the side where the sapphire substrate was removed.

Abstract: A method and apparatus for reducing vertical leakage current in a high fill factor sensor array is described. Reduction of vertical leakage current is achieved by eliminating Schottky junction interfaces that occur between metal back contacts and intrinsic amorphous silicon layers. One method of eliminating the Schottky junction uses an extra wide region of N doped amorphous silicon to serve as a buffer between the metal back contact and the intrinsic amorphous silicon layer. Another method of eliminating the Schottky junction completely replaces the metal back contact and the N doped amorphous silicon layer with a substitute material such as N doped poly-silicon.