Abstract: The present invention includes a method and system for forming a semiconductor device. Varying embodiments generate 2 dimensional alignment features in a device by implementing a 3-dimensional pattern into an underlying device substrate. Accordingly, alignments between successive device patterning steps can be determined regardless of the dilations or contractions that can take place during the device fabrication process. A first aspect of the present invention is a method for forming a semiconductor device. The method includes forming a 3-dimensional pattern in a substrate and depositing at least one material over the substrate in accordance with desired characteristics of the semiconductor device.

Abstract: A memory device includes a memory array of thin film transistor (TFT) memory cells. The memory cells include a floating gate separated from a gate electrode portion of a gate line by an insulator. The gate electrode portion includes a diffusive conductor that diffuses through the insulator under the application of a write voltage. The diffusive conductor forms a conductive path through the insulator that couples the gate line to the floating gate, changing the gate capacitance and therefore the state of the memory cell. The states of the memory cells are detectable as the differing current values for the memory cells. The memory cells are three terminal devices, and read currents do not pass through the conductive paths in the memory cells during read operations. This renders the memory cells robust, because read currents will not interfere with the storage mechanism in the memory cells. The memory array can be fabricated using multiple steps using the same mask.

Abstract: Disclosed are layered groupings and methods for constructing digital circuitry, such as memory known as Permanent Inexpensive Rugged Memory (PIRM) cross point arrays which can be produced on flexible substrates by patterning and curing through the use of a transparent embossing tool.

Abstract: A memory device includes a memory array of thin film transistor (TFT) memory cells. The memory cells include a floating gate separated from a gate electrode portion of a gate line by an insulator. The gate electrode portion includes a diffusive conductor that diffuses through the insulator under the application of a write voltage. The diffusive conductor forms a conductive path through the insulator that couples the gate line to the floating gate, changing the gate capacitance and therefore the state of the memory cell. The states of the memory cells are detectable as the differing current values for the memory cells. The memory cells are three terminal devices, and read currents do not pass through the conductive paths in the memory cells during read operations. This renders the memory cells robust, because read currents will not interfere with the storage mechanism in the memory cells. The memory array can be fabricated using multiple steps using the same mask.

Abstract: A method and system for forming a semiconductor device is provided. The method and system involves the utilization of a stamping tool to generate three-dimensional resist structures whereby thin film patterning steps can be transferred to the resist in a single molding step and subsequently revealed in later processing steps. Accordingly, the alignments between successive patterning steps can be determined by the accuracy with which the stamping tool has been fabricated, regardless of the dilations or contractions that can take place during the fabrication process.

Abstract: Several methods and structures for improving the yield of out-of-plane micro-device structures including springs and coils are described. In one method the springs used to form out-of-plane structures are constrained via a tether to avoid bunching and entanglement. The high yield structure may be used in numerous electronic applications such as filter circuits.

Abstract: A microelectromechanical system (MEMS) based sensor comprises: a substrate defining a plane; a first conductive material layer having a first stress, a first portion of the first conductive material layer being connected to the substrate and extending in a substantially parallel direction to the plane defined by the substrate and a second portion being disconnected from the substrate and extending in a substantially non-parallel direction to the plane defined by the substrate; and a sensor material layer formed over at least the second portion of the first conductive material layer, the sensor material layer having a second stress that is less than the first stress of the first conductive material layer. The stresses form a stress gradient that bends the second portion of the first conductive material layer and the sensor material layer formed over the second portion of the first conductive material layer away from the substrate.

Abstract: Disclosed are layered groupings and methods for constructing digital circuitry, such as memory known as Permanent Inexpensive Rugged Memory (PIRM) cross point arrays which can be produced on flexible substrates by patterning and curing through the use of a transparent embossing tool.

Abstract: An improved method and system for laser doping a semiconductor material is described. In the invention, phosphorous nitride is used as a dopant source. The phosphorous nitride is brought into close proximity with a region of the semiconductor to be doped. A pulse of laser light decomposes the phosphorous nitride and briefly melts the region of semiconductor to be doped to allow incorporation of dopant atoms from the phosphorous nitride into the semiconductor.

Abstract: A device that includes a layer of material having particles dispersed therein, a first electrode on a first surface of the layer, and a second electrode on a second surface of the layer opposite the first surface. A state of the particles is changed when a prescribed voltage is applied across the first and second electrodes.

Abstract: A hybrid structure or device is provided wherein carried on a single substrate is at least one micro-spring interconnect having an elastic material that is initially fixed to a surface of the substrate, an anchor portion which is fixed to the substrate surface and a free portion. The spring contact is self-assembling in that as the free portion is released it moves out of the plane of the substrate. Also integrated on the substrate is a sensor having an active layer and contacts. The substrate and sensor may be formed of materials which are somewhat partially transparent to light at certain infrared wavelengths. The integrated sensor/spring contact configuration may be used in an imaging system to sense output from a light source which is used for image formation. The light source may be a laser array, LED array or other appropriate light source. The sensor is appropriately sized to sense all or some part of light from the light source.

Abstract: An improved UV-curable polymerizable mixture comprises a compensation agent, a photoinitiator, and optionally, a cross-linker. Upon curing, the polymerizable mixture becomes a polymer that is more readily removable (e.g., by solvent or ion etching) than conventional UV-cured polymers. The improved polymerizable mixtures may be used in soft lithography applications, for example, as a mask used to protect a portion of an underlying layer during an etching process. The polymerizable mixture may also be used in other applications including, without limitation, during micromachining, in MEMS, as an optical cladding, as a coating, as an adhesive, as a sealant, as a potting medium, as an encapsulant, or for waterproofing.

Abstract: A method of coating a semiconductor substrate material with a coating material consisting of the steps of mixing an adhesion promoter with a coating material and applying the mixture to a semiconductor substrate material. The invention also includes means for coating a semiconductor substrate material with a coating material comprising means for mixing adhesion promoters with coating materials and means for applying the mixture of adhesion promoters and coating materials to a semiconductor substrate.

Abstract: A structure for nitride laser diode arrays attached to a thermally conducting substrate is described where the sapphire growth substrate has been removed. The thermally conducting substrate is attached to the side opposite of the sapphire growth substrate.

Abstract: A structure for nitride laser diode arrays attached to a thermally conducting substrate is described where the sapphire growth substrate has been removed. The thermally conducting substrate is attached to the side opposite of the sapphire growth substrate.

Abstract: A method of coating a semiconductor substrate material with a coating material consisting of the steps of mixing an adhesion promoter with a coating material and applying the mixture to a semiconductor substrate material. The invention also includes means for coating a semiconductor substrate material with a coating material comprising means for mixing adhesion promoters with coating materials and means for applying the mixture of adhesion promoters and coating materials to a semiconductor substrate.

Abstract: A device that includes a layer of material having particles dispersed therein, a first electrode on a first surface of the layer, and a second electrode on a second surface of the layer opposite the first surface. A state of the particles is changed when a prescribed voltage is applied across the first and second electrodes.

Abstract: A large area display workstation provides a liquid crystal display, configured to produce an image. The electrical components of the liquid crystal display are disposed on a substrate through a large area fabrication technique. The workstation has a first, high-resolution video display, and the large area display is a second, lower-resolution file identification display. The computer displays a user-selected file in a high-resolution format on the high-resolution video display for manipulation, and displays a plurality of file indicators in a low-resolution format on the large area display.

Abstract: Disclosed are layered groupings and methods for constructing digital circuitry, such as memory known as Permanent Inexpensive Rugged Memory (PIRM) cross point arrays which can be produced on flexible substrates by patterning and curing through the use of a transparent embossing tool.

Abstract: A memory cell comprises at least two antifuses in series with a diode. Each antifuse expresses a different resistance from the others when blown, and each requires an escalating programming voltage over the last to be programmed. The antifuse structures differ in their respective geometries and materials so that a low programming voltage will blow the more sensitive fuse first, and a higher voltages will program the lesser sensitive fuses thereafter.