Abstract: A structure and method for suppressing lateral leakage current in full fill factor image arrays includes dual dielectric passivation layer. A first passivation layer includes a material that is an insulator, has a low dielectric constant to minimize capacitive coupling between the contacts, and is low stress to prevent cracking. A second passivation layer includes a thin oxide or nitride layer over the first passivation layer.

Abstract: Disclosed are layered groupings and methods for constructing digital circuitry, such as memory known as Permanent Inexpensive Rugged Memory (PIRM) cross point arrays which can be produced on flexible substrates by patterning and curing through the use of a transparent embossing tool.

Abstract: A large area display workstation provides a liquid crystal display, configured to produce an image. The electrical components of the liquid crystal display are disposed on a substrate through a large area fabrication technique. The workstation has a first, high-resolution video display, and the large area display is a second, lower-resolution file identification display. The computer displays a user-selected file in a high-resolution format on the high-resolution video display for manipulation, and displays a plurality of file indicators in a low-resolution format on the large area display.

Abstract: The present invention relates to a liquid silicone rubber composition useful for textile coating, in particular for textile coating by screen-printing. The LSR composition of the present invention shows better film appearance and better physical properties such as softness, low-tackiness, and elongation.

Abstract: A method of forming a thin film device on a flexible substrate is disclosed. The method includes depositing an imprintable material over the flexible substrate. The imprintable are stamped material forming a three-dimensional pattern in the imprintable material. A sacrificial layer is formed over the three-dimensional pattern. A conductive layer is deposited over the sacrificial layer. The sacrificial layer is removed, leaving portions of the conductive layer as defined by the three-dimensional pattern.

Abstract: Provided is a thin film device and an associated method of making a thin film device. For example, fabrication of an inverter thin film device is described. Moreover, a parallel spaced electrically conductive strips are provided upon a substrate. A functional material is deposited upon the conductive strips. A 3D structure is then provided upon the functional material, the 3D structure having a plurality of different heights, at least one height defining a first portion of the conductive strips to be bundled. The 3D structure and functional material are then etched to define a TFD disposed above the first portion of the conductive strips. The first portion of the conductive strips is bundled adjacent to the TFD.

Abstract: This invention provides a method of forming at least one thin film device, such as for example a thin film transistor. The method includes providing a substrate and depositing a plurality of thin film device layers upon the substrate. An imprinted 3D template structure is provided upon the plurality of thin film device layers. The plurality of thin film layers and 3D template structure are etched and at least one thin film layer is undercut.

Abstract: Thin film devices and methods for forming the same are disclosed herein. A method for forming a thin film device includes forming a first at least semi-conductive strip located at a first height relative to a surface of a substrate, and forming a second at least semi-conductive strip adjacent to the first at least semi-conductive strip. The second strip is located at a second height relative to the substrate surface, and the second height is different than the first height. A nano-gap is formed between the first and second at least semi-conductive strips.

Abstract: A memory device includes a memory array of thin film transistor (TFT) memory cells. The memory cells include a floating gate separated from a gate electrode portion of a gate line by an insulator. The gate electrode portion includes a diffusive conductor that diffuses through the insulator under the application of a write voltage. The diffusive conductor forms a conductive path through the insulator that couples the gate line to the floating gate, changing the gate capacitance and therefore the state of the memory cell. The states of the memory cells are detectable as the differing current values for the memory cells. The memory cells are three terminal devices, and read currents do not pass through the conductive paths in the memory cells during read operations. This renders the memory cells robust, because read currents will not interfere with the storage mechanism in the memory cells. The memory array can be fabricated using multiple steps using the same mask.

Abstract: Provided is an article of manufacturer with anti-counterfeit properties a consumable, having taggant nanoparticles dispersed within it. Each taggant nanoparticle has at least one known physical characteristic such as, the taggant nanoparticles being a predetermined combination of nanoparticles providing at least two different taggant physical characteristics as a taggant code encoding product identification for the consumable so as to permit identification of the consumable. The physical characteristics in an embodiment include a combination of fluorescence, particle size, shape, and/or magnetic properties.

Abstract: Provided is a thin film device and an associated method of making a thin film device. For example, a thin film transistor with nano-gaps in the gate electrode. The method involves providing a substrate. Upon the substrate are then provided a plurality of parallel spaced electrically conductive strips. A plurality of thin film device layers are then deposited upon the conductive strips. A 3D structure is provided upon the plurality of thin film device layers, the structure having a plurality of different heights. The 3D structure and the plurality of thin film device layers are then etched to define a thin film device, such as for example a thin film transistor that is disposed above at least a portion of the conductive strips.

Abstract: Disclosed is an anti-counterfeiting system. In a particular embodiment, the anti-counterfeiting system has a first structure having a plurality of three-dimensional nanostructures, each having a height dimension less than a wavelength of visible light. In addition, there is a second structure having a second plurality of three-dimensional nanostructures, each having a height dimension less than a wavelength of visible light. The first and second structures are configured to couple together. An alignment mechanism is operable to align the first structure to the second structure and establish proximate contact between the first and second pluralities of nanostructures. With respect to the first and second structures, each encodes part of an authentication key. The authentication key includes pre-determined elements and interaction modalities. The resolution of the structures makes them copy-resistant. An associated method of use is also provided.

Abstract: Provided is a low cost system and method for forming electronic devices, especially large surface area devices. The process of imprint lithography is combined with alternate manufacturing techniques to fabricate the devices. Initially, a template imprints a three-dimensional pattern into a resist layer deposited on a flexible substrate. The resist layer is cured using ultraviolet light or other curing techniques. After curing, the 3-D pattern is modified using one of several techniques to include inkjetting, electrodeposition or laser patterning. In one embodiment, a semi-fluid material may be jetted into channels formed in the pattern, thereby forming conductive or insulating lead lines. Alternatively, a two-dimensional pattern may be jetted onto the resist layer. Final processing may include multiple etch-mask-etch steps. The integration of techniques into a single system provides a low cost, efficient method for manufacturing high quality, large surface area electronic devices.

Abstract: This invention provides a pattern reversal process for self aligned imprint lithography (SAIL). The method includes providing a substrate and depositing at least one layer of material upon the substrate. A pattern is then established upon the layer of material, the pattern providing at least one exposed area and at least one covered area of the layer of material. The exposed areas are treated to toughen the material and reverse the pattern. Subsequent etching removes the un-toughened material. A thin-film transistor device provided by the pattern reversal process is also provided.

Abstract: This invention provides a method of fabricating an active matrix of thin film devices through a pattern reversal self aligned imprint lithography (SAIL) process. The method includes providing a substrate and depositing at least one layer of material upon the substrate. A pattern is then established upon the layer of material, the pattern providing at least one exposed area and at least one covered area of the layer of material. The exposed areas are treated to provide etch resistance to the material and reverse the pattern. Subsequent etching removes the etch susceptible material, the etch resistant material remaining. A thin-film stack is then deposited upon the remaining etch resistant material. These deposited thin-films are then processed in accordance with the desired characteristics of the thin film devices.

Abstract: An article comprises a semiconductor substrate and a coating mixture on the semiconductor substrate. The coating mixture Is comprised of adhesion promoter and photopolymer. The adhesion promoter contains ?-amino propyltriethoxysilane in organic solution.

Abstract: Cells can include variable volumes defined between a flexible structure, such as a polymer layer, and a support surface, with the flexible structure and support surface being attached in a first region that surrounds a second region in which they are unattached. Various adhesion structures can attach the flexible structure and the support surface. When unstretched, the flexible structure can lie in a flat position on the support surface. In response to a stretching force away from the support surface, the flexible structure can move out of the flat position, providing the variable volume. Electrodes, such as on the flexible structure, on the support surface, and over the flexible structure, can have charge levels that couple with each other and with the variable volume. A support structure can include a device layer with signal circuitry that provides a signal path between an electrode and external circuitry. One or more ducts can provide fluid communication with each cell's variable volume.

Abstract: This invention provides a method of forming at least one thin film device, such as for example a thin film transistor. The method includes providing a substrate and depositing a plurality of thin film device layers upon the substrate. An imprinted 3D template structure is provided upon the plurality of thin film device layers. The plurality of thin film layers and 3D template structure are etched and at least one thin film layer is undercut.

Abstract: An aspect of the present invention is a method for forming a plurality of thin-film devices. The method includes providing a flexible substrate and utilizing a self-aligned imprint lithography (SAIL) process to form the plurality of thin-film devices on the flexible substrate.

Abstract: The signal-to-noise ratio of amorphous silicon (a-Si:H) image sensor arrays is limited by electronic noise, which is largely due to data line capacitance. To reduce data line capacitance, an air-gap (i.e., vacuum or gas-filled space) is produced at crossover points separating the data lines and gate lines. This air-gap crossover structure is formed by depositing a release material on the gate lines, forming the data lines on the release material, and then removing (etching) the release material such that the data lines form an arch extending over the gate lines. A dielectric material is then applied to strengthen the data line, and the sensor pixels are then formed.