Abstract: Apparatus and method are provided for small cell energy saving. In one novel aspect, switch-off-request is broadcasted by the small cell detecting the low-load condition. The small cells upon receiving the switch-off-request message enter the frozen state, which prevents the small cells from switching off. In another novel aspect, the small cell in the low-load condition request measurement reports from the UEs. The UEs replies with the measurement-reports message, which includes the detected neighboring IDs and the UE's traffic load. The low-load small cell includes the information derived from the measurement-reports in the switch-off-request message. In another novel aspect, the small cell broadcasts the switch-on-request message. Upon receiving switch-on-acknowledge messages from switched-off neighboring small cells, the small cell selects one or more target cells to send the cell-activation-request.

Abstract: A voltage compensation circuit and a control method thereof dynamically compensate a voltage drop caused by supplying power from a first power line to a function circuit. The voltage compensation circuit includes an amplifier, a detection module and a boosting module. The amplifier has an inverting input end coupled to the first power line and the function circuit to be supplied with a load voltage supplying to the function circuit, a non-inverting input end for being supplied with a reference voltage, and an output end coupled to the detection module to output a comparison signal. The boosting module is coupled between the detection module and the inverting input end of the amplifier. The detection module generates compensation voltage information according to the comparison signal. The boosting module outputs the compensation voltage to the inverting input end of the amplifier according to the compensation voltage information.

Abstract: A non-violate memory device and a control method thereof are provided. The non-violate memory device includes a flip-flop, a retention cell and a memory cell. The flip-flop includes an output inverter. The flip-flop generates a second data according to a first data and a retention signal. The retention cell is coupled to the output inverter of the flip-flop. The retention cell temporarily stores the second data when the retention signal is enabled. During the period that retention signal is enabled, the memory cell stores the second data temporarily stored by the retention cell. Thus, another operation mode of the non-violate memory device is provided to save more power.

Abstract: A non-violate memory device and a control method thereof are provided. The non-violate memory device includes a flip-flop, a retention cell and a memory cell. The flip-flop includes an output inverter. The flip-flop generates a second data according to a first data and a retention signal. The retention cell is coupled to the output inverter of the flip-flop. The retention cell temporarily stores the second data when the retention signal is enabled. During the period that retention signal is enabled, the memory cell stores the second data temporarily stored by the retention cell. Thus, another operation mode of the non-violate memory device is provided to save more power.

Abstract: A chip card ejecting mechanism includes a main body, a tray assembled in the main body and configured to receive a chip card, and a door. The door includes a rotating end rotatably mounted on the main body and a push pole protruding from the rotating end. A resisting portion is located on an end of the push pole away from the rotating end. When the door is opened and the rotating end is rotated relative to the main body, the resisting portion resists against the chip card and drives the chip card to move out from the main body.

Abstract: A heat shrinkable material-enclosed porous particle including a porous body that has a plurality of pores and a heat shrinkable material that encloses the porous body is disclosed. A method for preparing heat shrinkable material-enclosed porous particles is also disclosed.

Abstract: A voltage compensation circuit and a control method thereof dynamically compensate a voltage drop caused by supplying power from a first power line to a function circuit. The voltage compensation circuit includes an amplifier, a detection module and a boosting module. The amplifier has an inverse input end coupled to the first power line and the function circuit to be supplied with a load voltage supplying to the function circuit, a non-inverse input end for being supplied with a reference voltage, and an output end coupled to the detection module to output a comparison signal. The boosting module is coupled between the detection module and the inverse input end of the amplifier. The detection module generates compensation voltage information according to the comparison signal. The boosting module outputs the compensation voltage to the inverse input end of the amplifier according to the compensation voltage information.

Abstract: Apparatus and method are provided for small cell energy saving. In one novel aspect, switch-off-request is broadcasted by the small cell detecting the low-load condition. The small cells upon receiving the switch-off-request message enter the frozen state, which prevents the small cells from switching off. In another novel aspect, the small cell in the low-load condition request measurement reports from the UEs. The UEs replies with the measurement-reports message, which includes the detected neighboring IDs and the UE's traffic load. The low-load small cell includes the information derived from the measurement-reports in the switch-off-request message. In another novel aspect, the small cell broadcasts the switch-on-request message. Upon receiving switch-on-acknowledge messages from switched-off neighboring small cells, the small cell selects one or more target cells to send the cell-activation-request.

Abstract: A chip card ejecting mechanism includes a main body, a tray assembled in the main body and configured to receive a chip card, and a door. The door includes a rotating end rotatably mounted on the main body and a push pole protruding from the rotating end. A resisting portion is located on an end of the push pole away from the rotating end. When the door is opened and the rotating end is rotated relative to the main body, the resisting portion resists against the chip card and drives the chip card to move out from the main body.

Abstract: The present invention discloses a system and method for nondestructively measuring the refractive index and the central thickness of a lens. The system comprises a radius measurement module arranged for measuring the curvature radius of the first surface of the lens; a focus measurement module arranged for measuring the best focus distance of the first surface of the lens; and a calculation module arranged for performing the first or the second calculation process according to the lensmaker's formula. Wherein, when the central thickness is given, the calculation module performs the first calculation process according to the curvature radius, the best focus distance and the central thickness to calculate the refractive index. On the contrary, when the refractive index is given, the calculation module performs the second calculation process according to the curvature radius, the best focus distance and the refractive index to calculate the central thickness.

Abstract: A very long instruction word (VLIW) processor and an apparatus with power management and a method of power management therefor are provided in consistent with the exemplary embodiments of the disclosure. The power management method includes the following steps. Valid instruction(s) and no operation (NOP) instruction(s) of an input instruction package are rearranged to output a transcoded instruction package, wherein the transcoded instruction package by the rearrangement has its NOP instruction(s) corresponding to at least one execution unit, which is to be placed in power reduction state, of a VLIW processor. Power reduction control is selectively performed on at least one execution unit corresponding to at least one NOP instruction of the transcoded instruction package according to the transcoded instruction package.

Abstract: The present invention discloses a system and method for nondestructively measuring the refractive index and the central thickness of a lens. The system comprises a radius measurement module arranged for measuring the curvature radius of the first surface of the lens; a focus measurement module arranged for measuring the best focus distance of the first surface of the lens; and a calculation module arranged for performing the first or the second calculation process according to the lensmaker's formula. Wherein, when the central thickness is given, the calculation module performs the first calculation process according to the curvature radius, the best focus distance and the central thickness to calculate the refractive index. On the contrary, when the refractive index is given, the calculation module performs the second calculation process according to the curvature radius, the best focus distance and the refractive index to calculate the central thickness.

Abstract: A system and a corresponding method for multi-core synchronous debugging of a multi-core platform including a plurality of cores are provided. The method includes the following steps. Transmit a core debugging instruction to one of the cores selected by a system debugging instruction or store a group setting included in the system debugging instruction according to the type of the system debugging instruction. Control every core in a group to start executing program instructions simultaneously according to another system debugging instruction. The group is a subset of the cores and the group setting indicates which ones of the cores are included in the group. Use a handshaking mechanism to control all cores of the group to enter a debug mode simultaneously when a debug event happens in any core of the group.

Abstract: A system and a corresponding method for multi-core synchronous debugging of a multi-core platform including a plurality of cores are provided. The method includes the following steps. Transmit a core debugging instruction to one of the cores selected by a system debugging instruction or store a group setting included in the system debugging instruction according to the type of the system debugging instruction. Control every core in a group to start executing program instructions simultaneously according to another system debugging instruction. The group is a subset of the cores and the group setting indicates which ones of the cores are included in the group. Use a handshaking mechanism to control all cores of the group to enter a debug mode simultaneously when a debug event happens in any core of the group.

Abstract: A pump structure for dispenser includes a base having a space defined therein and passing therethrough. The base has a vertical groove axially defined in an outer periphery thereof and a plurality of horizontal grooves parallelly defined in the outer periphery thereof and communicated with the horizontal grooves. A base ring is sleeved on the base. The base ring has a protrusion extending from an inner periphery thereof for slidably moving in the vertical groove and the horizontal groove. A saddle head is movably sleeved on the base. An upper valve set is mounted in a pathway in the saddle head and a lower valve set is mounted in the space in the base.

Abstract: A dispenser for adjusting rationing liquid includes a base having a space defined therein. A saddle head is movably sleeved on the base. The saddle head has a pathway defined therein and passing therethrough. The saddle head has a piston movably received in the space. The piston has an outer periphery abutting against an inner periphery of the space. A spring is sleeved on the base. An upper valve set is mounted in the pathway and a lower valve set is mounted in the space in the base.

Abstract: A refill pouch includes a head member and a pouch member connected with the head member. The head member has a threaded portion and a disc portion formed thereon. The threaded portion has one end connected with a top side of the disc portion. The threaded portion adapts to be threadedly connected with a pump head. The head member has a through hole defined therein and extending through the threaded portion and the disc portion. The pouch member is securely connected with a bottom side of the disc portion. The pouch member has an opening defined in a top thereof and located corresponding to the through hole for communicating with the through hole. The pouch member has a wall thickness gradually decreasing from the top to a bottom thereof.

Abstract: A very long instruction word (VLIW) processor and an apparatus with power management and a method of power management therefor are provided in consistent with the exemplary embodiments of the disclosure. The power management method includes the following steps. Valid instruction(s) and no operation (NOP) instruction(s) of an input instruction package are rearranged to output a transcoded instruction package, wherein the transcoded instruction package by the rearrangement has its NOP instruction(s) corresponding to at least one execution unit, which is to be placed in power reduction state, of a VLIW processor. Power reduction control is selectively performed on at least one execution unit corresponding to at least one NOP instruction of the transcoded instruction package according to the transcoded instruction package.

Abstract: A method and corresponding apparatus for compiling high-level languages into specific processor architectures are provided. In this embodiment, the specific processor is encapsulated in a virtual processor interface with simple instruction set architecture, and a compiler translates application programs into corresponding assembly codes. Further, the difficulty of the compiler design is reduced.

Abstract: A digital signal processor is provided, comprising at least one cluster. The cluster may comprise at least two function units each conducting different instruction types, at least two private register files each associated with one function unit for data storage, a ping-pong register providing exclusively accessible data storage, and a public register file. The public register file comprises at least two read ports, each coupled to a function unit, providing read accessibility for the function units, and one write port to write data to the public register file.