Abstract: A pipelined datapath with dynamically reconfigurable pipeline stages is provided, having a pipeline controller which generates clock signals and selects signals based on a system clock and a valid data signal to control each of the registers and each of the multiplexers in the pipeline circuit. In other words, when a valid datum is being processed, the pipeline register is activated to latch the output of the combinational logic circuit; otherwise, when an invalid datum is received, the register is not activated and the datum bypasses the register through a multiplexer. Therefore, the pipeline stages of the pipelined datapath are dynamically reconfigured to save the power dissipation effectively.

Abstract: An inter-cluster communication module using the memory access network is provided, including a plurality of clusters, a memory subsystem, a controller and a switch device. When some clusters issue a load instruction and some clusters issue a store instruction of an identical memory address concurrently, the controller controls the switch device which connects the clusters and the memory banks of the memory subsystem, so that the data item is transmitted from the cluster issuing the store instruction to the cluster issuing the load instruction through the switch device, thereby achieving data exchange between the clusters. Herein, the data item is selectively stored in the memory module depending on the address. Furthermore, the data item is also transmitted between the memory and the clusters over the switch device.

Abstract: A digital signal processor is provided, comprising at least one cluster. The cluster may comprise at least two function units each conducting different instruction types, at least two private register files each associated with one function unit for data storage, a ping-pong register providing exclusively accessible data storage, and a public register file. The public register file comprises at least two read ports, each coupled to a function unit, providing read accessibility for the function units, and one write port to write data to the public register file.

Abstract: The present invention is a flexible fuel cell, which overcomes the shortcomings of a conventional fuel cell made of solid materials. The flexible fuel cell includes a battery pack of fuel cell units with a preset amount and configuration of fuel cell units, and a flexible locator. The flexible locator is made of flexible materials to ensure the ability to maintain gas-tight seals. Because of the ability to maintain good gas-tight seals and to have stronger resistance to heat and corrosion, the fuel cell of the present invention offers advantages of light weight, gas-tight sealing, and shock resistance.

Abstract: The present invention provides a portable power supply device with a fuel cell. The device includes a main body with predefined internal and exterior parts. A fuel cell stack is mounted onto a predefined location of the main body. A fuel supplier is mounted at a preset location of the main body. A control switch is mounted at a predefined location of main body for switching the fuel cell stack on and off. A transformer system is used to convert DC of the fuel cell stack into AC. At least one AC socket is mounted onto a preset location of the main body. The portable power supply device of the present invention offers a longer lasting power supply via a fuel cell stack. The portable power supply device is an environment-friendly and weather-proof power generating system for currently used electronics.

Abstract: An apparatus for cooperative sharing of operand access port of a banked register file comprises a partitioned register file, a first group of functional unit, a second group of function units and an access control circuit. The access control circuit includes three control bits to control the accesses to the register file by the functional units for operands. The invention is to relax the constraint encountered by the compiler and a smart assembler using a conventional Ping-Pong file register. The relaxed constraint allows the two banks of the partitioned register file accessed by two instructions simultaneously as long as each corresponding operand of the two instructions are in different register banks. By the relaxed constraint, a compiler and a smart assembler have more choices to schedule instructions in a program, potentially increasing program performance.

Abstract: A process for preparing titanyl phthalocyanines in one reaction reactor includes the reaction of titanium tetrachloride or titanium trichloride and o-phthalodinitrile in an organic solvent such as 1-chloronaphthalene in the presence of a molecular sieve as a promoter followed by hydrolysis resulting in titanyl phthalocyanines. The prepared titanyl phthalocyanines is usable as a high-quality charge generating material and can be used as a charge generating layer in an organic photoconductor drum.

Abstract: A method for preparing three types of benzidine compounds in a specific ratio, the method uses two types of diphenylamine compounds and one type of biphenyldihalide compound in a specific ratio as reactants to mix with an organic solvent and an additive to synthesize benzidine compounds in one step. The synthesized three types of benzidine compounds specially perform in a designated mixturing ratio having excellent photoelectric characteristics for a charge transporting layer in an organic photo-conductive drum.

Abstract: A pipelined datapath with dynamically reconfigurable pipeline stages is provided, having a pipeline controller which generates clock signals and selects signals based on a system clock and a valid data signal to control each of the registers and each of the multiplexers in the pipeline circuit. In other words, when a valid datum is being processed, the pipeline register is activated to latch the output of the combinational logic circuit; otherwise, when an invalid datum is received, the register is not activated and the datum bypasses the register through a multiplexer. Therefore, the pipeline stages of the pipelined datapath are dynamically reconfigured to save the power dissipation effectively.

Abstract: A method and corresponding apparatus for compiling high-level languages into specific processor architectures are provided. In this embodiment, the specific processor is encapsulated in a virtual processor interface with simple instruction set architecture, and a compiler translates application programs into corresponding assembly codes. Further, the difficulty of the compiler design is reduced.

Abstract: A unified single-core and multi-mode processor and its program execution method are provided. In an embodiment of this processor, a single instruction stream is different types of instructions randomly arranged in thereof. The processor switches its modes based on the type of a fetched instruction to execute the program corresponding to the fetched instruction.

Abstract: An inter-cluster communication module using the memory access network is provided, including a plurality of clusters, a memory subsystem, a controller and a switch device. When some clusters issue a load instruction and some clusters issue a store instruction of an identical memory address concurrently, the controller controls the switch device which connects the clusters and the memory banks of the memory subsystem, so that the data item is transmitted from the cluster issuing the store instruction to the cluster issuing the load instruction through the switch device, thereby achieving data exchange between the clusters. Herein, the data item is selectively stored in the memory module depending on the address. Furthermore, the data item is also transmitted between the memory and the clusters over the switch device.

Abstract: A method for preparing three types of benzidine compounds in a specific ratio, the method uses two types of diphenylamine compounds and one type of biphenyldihalide compound in a specific ratio as reactants to mix with an organic solvent and an additive to synthesize benzidine compounds in one step. The synthesized three types of benzidine compounds specially perform in a designated mixturing ratio having excellent photoelectric characteristics for a charge transporting layer in an organic photo-conductive drum.