Abstract: An interface card assembly adapted for fixing an M.2 interface card to a circuit board body with an M.2 connector is provided. The M.2 interface card includes a connecting end and an end. The interface card assembly includes a heat dissipation plate and a fastener. The heat dissipation plate is disposed at a position adjacent to the M.2 connector, and the heat dissipation plate includes a hole. The fastener is detachably disposed in the hole. The fastener includes a main body and a cantilever, and a clamping part is disposed between the main body and the cantilever. When the M.2 interface card is inserted into the M.2 connector through the connecting end, the fastener moves relative to the heat dissipation plate at the end, so that the M.2 interface card extends into the clamping part and is clamped between the main body and the cantilever.

Abstract: A semiconductor device includes: a memory circuit having a plurality of quadrants arranged at corners of the memory circuit and surrounding a bank control component; wherein a first quadrant of the plurality of quadrants includes a first bit cell core and a first set of input output circuits configured to access the first bit cell core, the first quadrant defined by a rectangular boundary that encloses portions of two perpendicular edges of the memory circuit; wherein a second quadrant of the plurality of quadrants includes a second bit cell core and a second set of input output circuits configured to access the second bit cell core, the second quadrant being adjacent the first quadrant, wherein a border between the first quadrant and the second quadrant defines a first axis about which the first quadrant and the second quadrant are symmetrical.

Abstract: A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a molded semiconductor device, a first redistribution structure, and conductive vias. The molded semiconductor device comprises a sensor die with a first surface and a second surface opposite the first surface, wherein the sensor die has an input/output region and a sensing region at the first surface. The first redistribution structure is disposed on the first surface of the sensor die, wherein the first redistribution structure covers the input/output region and exposes the sensing region, and the first redistribution structure comprises a conductive layer having a redistribution pattern and a ring structure. The redistribution pattern is electrically connected with the sensor die. The ring structure surrounds the sensing region and is separated from the redistribution pattern, wherein the ring structure is closer to the sensing region than the redistribution pattern.

Abstract: A method includes forming a plurality of dielectric layers, forming a lower portion of a seal ring including a plurality of metal layers, each extending into one of the plurality of dielectric layers, depositing a first passivation layer over the plurality of dielectric layers, forming an opening in the first passivation layer, forming a via ring in the opening and physically contacting the lower portion of the seal ring, and forming a metal ring over the first passivation layer and joined to the via ring. The via ring and the metal ring form an upper portion of the seal ring. The metal ring includes an edge portion having a zigzag pattern. The method further includes forming a second passivation layer on the metal ring, and performing a singulation process to form a device die, with the seal ring being proximate edges of the device die.

Abstract: An semiconductor package includes a redistribution structure, a first semiconductor device, a second semiconductor device, an underfill layer and an encapsulant. The first semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface connected with each other, the first sub-surface is connected with the first bottom surface, and a first obtuse angle is between the first sub-surface and the second sub-surface.

Abstract: A package structure and a formation method of a package structure are provided. The package structure includes a circuit substrate and a die package bonded to the circuit substrate through bonding structures. The package structure also includes a warpage-control element attached to the circuit substrate. The warpage-control element has a protruding portion extending into the circuit substrate. The warpage-control element has height larger than that of the die package.

Abstract: An electronic door lock is provided and includes a housing, a movable latch assembly, a telescopic rod, a driving member, an elastic member and a driving assembly. The telescopic rod is arranged in the movable latch assembly, and the elastic member is connected to the movable latch assembly and the driving assembly. The elastic member is driven by the driving assembly to drive the movable latch assembly, so that the telescopic rod located in the movable latch assembly can be controlled to retract or protrude from the movable latch assembly and the movable latch assembly is in a locked mode or an unlocked mode. In the unlocked mode, the driving member can push the telescopic rod to drive the movable latch assembly to move. Therefore, the problem that the driving assembly must accurately calculate the operating time can be solved and damage to the driving assembly can be prevented.

Abstract: A flip-flop circuit configured to latch an input signal to an output signal is disclosed. The circuit includes a first latch circuit; and a second latch circuit coupled to the first latch circuit. In some embodiments, in response to a clock signal, the first and second latch circuits are complementarily activated so as to latch the input signal to the output signal, and the first and second latch circuits each comprises at most two transistors configured to receive the clock signal.

Abstract: An antenna module includes a first antenna radiator including a feeding terminal, a second antenna radiator, a first ground radiator, a second ground radiator and a capacitive element. The second antenna radiator is disposed on one side of the first antenna radiator, and a first gap is formed between a main portion of the second antenna radiator and the first antenna radiator. The first ground radiator is disposed on another side of the first antenna radiator, and a second gap is formed between the first antenna radiator and the first antenna radiator. The second ground radiator is disposed between the second antenna radiator and the first ground radiator, and a third gap is formed between the second ground radiator and a first branch of the second antenna radiator. The capacitive element is disposed on the third gap and connects the second antenna radiator and the second ground radiator.

Abstract: An organic light-emitting display (OLED) panel, including an OLED layer, a touch sensing layer, and a shielding layer, is provided. The OLED layer is suitable for displaying an image. The touch sensing layer is suitable for sensing a touch event of the OLED panel. The shielding layer is disposed between the OLED layer and the touch sensing layer. The shielding layer is suitable for blocking a mutual interference between the OLED layer and the touch sensing layer.

Abstract: A method of manufacturing a semiconductor device includes forming a transistor layer with an M*1st layer that overlays the transistor layer with one or more first conductors that extend in a first direction. Forming an M*2nd layer that overlays the M*1st layer with one or more second conductors which extend in a second direction. Forming a first pin in the M*2nd layer representing an output pin of a cell region. Forming a long axis of the first pin substantially along a selected one of the one or more second conductors. Forming a majority of the total number of pins in the M*1st layer, the forming including: forming second, third, fourth and fifth pins in the M*1st layer representing corresponding input pins of the circuit; and forming long axes of the second to fifth pins substantially along corresponding ones of the one or more first conductors.

Abstract: The present disclosure describes a semiconductor device with a nitrided capping layer and methods for forming the same. One method includes forming a first conductive structure in a first dielectric layer on a substrate, depositing a second dielectric layer on the first conductive structure and the first dielectric layer, and forming an opening in the second dielectric layer to expose the first conductive structure and a portion of the first dielectric layer. The method further includes forming a nitrided layer on a top portion of the first conductive structure, a top portion of the portion of the first dielectric layer, sidewalls of the opening, and a top portion of the second dielectric layer, and forming a second conductive structure in the opening, where the second conductive structure is in contact with the nitrided layer.

Abstract: A package assembly includes a package substrate, a package lid located on the package substrate and including a plate portion, an outer foot extending from the plate portion, and an inner foot having a height greater than or equal to a height of the outer foot, extending from the plate portion and including a first inner foot corner portion located inside a first corner of the outer foot, and an adhesive that adheres the outer foot to the package substrate and adheres the inner foot to the package substrate.

Abstract: A circuit board includes a board body, a card slot, a release structure, and a transmission mechanism. The card slot is disposed on the board body and adapted for inserting an expansion card. The release structure is rotatably disposed beside the card slot. The transmission mechanism includes a contact part and a stressed part that are linked to each other, wherein the contact part is connected to the release structure. When the stressed part receives an external force, the contact part is moved correspondingly, so that the release structure is rotated relative to the card slot, thereby releasing the expansion card.

Abstract: A compensator compensates for the distortions of a power amplifier circuit. A power amplifier neural network (PAN) is trained to model the power amplifier circuit using pre-determined input and output signal pairs that characterize the power amplifier circuit. Then a compensator is trained to pre-distort a signal received by the PAN. The compensator uses a neural network trained to optimize a loss between a compensator input and a PAN output, and the loss is calculated according to a multi-objective loss function that includes one or more time-domain loss function and one or more frequency-domain loss functions. The trained compensator performs signal compensation to thereby output a pre-distorted signal to the power amplifier circuit.

Abstract: A temperature calibration method includes providing a temperature measuring device including a movable shutter module, and a first and a second non-contacting temperature sensing module, and a movable shutter structure of the movable shutter module includes a black substance for generating a predetermined heating temperature; moving the movable shutter structure to a first position by driving of the electric control driver, so as to completely block a first temperature-measuring viewing angle of the first non-contacting temperature sensing module and a second temperature-measuring viewing angle of the second non-contacting temperature sensing module by the black substance; measuring the predetermined heating temperature that is generated by the black substance by the second non-contacting temperature sensing module at the second temperature-measuring viewing angle so as to obtain black body temperature information of the black substance; and calibrating the first non-contacting temperature sensing module acco

Abstract: A chemical mechanical planarization system includes a chemical mechanical planarization pad that rotates during a chemical mechanical planarization process. A chemical mechanical planarization head places a semiconductor wafer in contact with the chemical mechanical planarization pad during the process. A slurry supply system supplies a slurry onto the pad during the process. A pad conditioner conditions the pad during the process. An impurity removal system removes debris and impurities from the slurry.

Abstract: A contact lens includes at least one color changeable region, wherein the color changeable region includes at least one photoluminescence material. When a wavelength of the photoluminescence material having a maximum radiation intensity is WEmMx, an average transmittance in a wavelength range of 400 nm-700 nm of the color changeable region is T4070, a size of a total area of the color changeable region is AC, and a size of a total area of the contact lens is AL, certain conditions relating to WEmMx, T4070 and AC/AL are satisfied.

Abstract: An electronic package is provided and includes a carrier for carrying electronic components. Electrical contact pads of the carrier for planting solder balls are connected with a plurality of columnar conductors, and the conductors are electrically connected to a circuit portion in the carrier. By connecting a plurality of conductors with a single electrical contact pad, structural stress can be distributed and breakage of the circuit portion can be prevented.