Patents by Inventor Po-Hung Chen

Po-Hung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110273949
    Abstract: A circuit includes a fuse and a sensing and control circuit. The fuse is coupled between a MOS transistor and a current source node. The sensing and control circuit is configured to receive a programming pulse and output a modified programming signal to the gate of the MOS transistor for programming the fuse. The modified programming signal has a pulse width based on a magnitude of a current through the first fuse.
    Type: Application
    Filed: May 6, 2010
    Publication date: November 10, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Po-Hung CHEN, Sung-Chieh LIN, Kuoyuan HSU, Jiann-Tseng HUANG
  • Publication number: 20110223503
    Abstract: The present invention discloses an electrode structure capable of separately delivering gas and fluid which is applied to a passive fuel cell. The electrode structure includes an electrode portion and a water removal plate, and the electrode portion is adjacent to the water removal plate. The water removal plate includes a first surface, a second surface opposite to the first surface, a plurality of gas passages passing from the first surface to the second surface, and a plurality of liquor passages disposed on the first surface. The surfaces of the gas passages are treated with hydrophobic treatment, and the surfaces of the liquor passages are treated with hydrophilic treatment.
    Type: Application
    Filed: March 8, 2011
    Publication date: September 15, 2011
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: Fan Gang Tseng, Hsien Chih Peng, Po Hung Chen
  • Patent number: 7961270
    Abstract: A display device and a manufacturing method thereof are provided. The display device includes a light guide, a light source, and a brightness enhancement film (BEF), and a dual brightness enhancement film (DBEF). The light guide has a first edge along a first direction and a second edge adjacent to the first edge corresponding to the light source. The BEF is disposed on the light guide and has a plurality of prisms along a second direction which rotates from 0 to 90 degrees with respect to the first direction. The DBEF has a transmission axis along a third direction which also rotates from 0 to 90 degrees with respect to the first direction.
    Type: Grant
    Filed: August 20, 2009
    Date of Patent: June 14, 2011
    Assignee: AU Optronics Corporation
    Inventors: Kuang-Hua Mei, Shih-Ping Lin, Po-Hung Chen
  • Publication number: 20100329055
    Abstract: A circuit having a first circuit configured to receive an input voltage and generate a first voltage that generates a first current flowing through a resistive device and a second voltage that generates a second current; a node electrically coupled to the resistive device and having a third voltage that generates a third current; and a second circuit configured to generate a fourth voltage having a logic state indicating a logic state of the resistive device.
    Type: Application
    Filed: June 28, 2010
    Publication date: December 30, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuoyuan HSU, Po-Hung CHEN, Jiann-Tseng HUANG, Subramani KENGERI
  • Publication number: 20100325364
    Abstract: A cache controller, a method for controlling the cache controller, and a computing system comprising the same are provided. The computer system comprises a processor and a cache controller. The cache controller is electrically connected to the processor and comprises a first port, a second port, and at least one cache. The first port is configured to receive an address of a content, wherein a type of the content is one of instruction and data. The second port is configured to receive an information bit corresponding to the content, wherein the information bit indicates the type of the content. The at least one cache comprises at least one cache lines. Each of the cache lines comprises a content field and corresponding to an information field. The content and the information bit is stored in the content field of one of the cache lines and the corresponding information field respectively according to the information bit and the address. Thereby, instruction and data are separated in a unified cache.
    Type: Application
    Filed: June 23, 2009
    Publication date: December 23, 2010
    Applicant: MEDIATEK INC.
    Inventors: Po-Hung CHEN, Chang-Hsien TAI
  • Patent number: 7843747
    Abstract: A system for testing logic circuits for executing writing and reading operations in a one-time programmable (OTP) memory having an array of memory cells is disclosed, the system comprising a column of testing cells having the same number of cells as that of an entire column of the array of memory cells, a row of testing cells having the same number of cells as that of an entire row of the array of memory cells, wherein both the column and row of testing cells are first written to and then read out from during a testing operation, and can never be accessed during non-testing operations of the OTP memory.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: November 30, 2010
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Lung Hsueh, Shine Chung, Wen-Kuan Fang, Po-Hung Chen
  • Patent number: 7733096
    Abstract: A method of testing a fuse element for a memory device is provided. A first test probe is electrically connected to a program terminal of the memory device. A second test probe is electrically connected to a ground terminal. The fuse element is on an electrical circuit path between the program terminal and the ground terminal. The first and second test probes are electrically connected to a testing device. A first voltage is applied with the testing device between the program terminal and the ground terminal. At least part of a first current of the first voltage flows across the fuse element. The first voltage and the at least part of the first current that flows across the fuse element is not large enough to change the conductivity state of the fuse element. The first current is measured and used to evaluated the conductive state of the fuse element.
    Type: Grant
    Filed: April 2, 2007
    Date of Patent: June 8, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sung-Chieh Lin, Po-Hung Chen
  • Publication number: 20100066944
    Abstract: A display device and a manufacturing method thereof are provided. The display device includes a light guide, a light source, and a brightness enhancement film (BEF), and a dual brightness enhancement film (DBEF). The light guide has a first edge along a first direction and a second edge adjacent to the first edge corresponding to the light source. The BEF is disposed on the light guide and has a plurality of prisms along a second direction which rotates from 0 to 90 degrees with respect to the first direction. The DBEF has a transmission axis along a third direction which also rotates from 0 to 90 degrees with respect to the first direction.
    Type: Application
    Filed: August 20, 2009
    Publication date: March 18, 2010
    Applicant: AU Optronics Corporation
    Inventors: Kuang-Hua Mei, Shih-Ping Lin, Po-Hung Chen
  • Patent number: 7547571
    Abstract: The present invention discloses a packaging method of a light-sensing semiconductor device and a packaging structure thereof, wherein a matrix of spacer walls is formed on a light-sensing wafer, which has multiple light-sensing chips, and the adhesive is directly applied to between two neighboring spacer walls on the non-light-sensing regions. Thus, when the light transparent cover is installed, there is no more adhesive dropping onto the light-sensing regions of the light-sensing chips. Further, when the light transparent cover is pressed to join with the spacer walls, with the trenches formed at the tops of the spacer walls, the adhesive will not overflow from the joint seams into the light-sensing regions.
    Type: Grant
    Filed: April 7, 2008
    Date of Patent: June 16, 2009
    Assignee: Sigurd Microelectronics Corp.
    Inventors: Po-Hung Chen, Mao-Jung Chen
  • Publication number: 20090141573
    Abstract: A system for testing logic circuits for executing writing and reading operations in a one-time programmable (OTP) memory having an array of memory cells is disclosed, the system comprising a column of testing cells having the same number of cells as that of an entire column of the array of memory cells, a row of testing cells having the same number of cells as that of an entire row of the array of memory cells, wherein both the column and row of testing cells are first written to and then read out from during a testing operation, and can never be accessed during non-testing operations of the OTP memory.
    Type: Application
    Filed: May 21, 2008
    Publication date: June 4, 2009
    Inventors: Fu Lung Hsueh, Shine Chung, Wen-Kuan Fang, Po-Hung Chen
  • Patent number: 7459629
    Abstract: The invention discloses an extension box of storage media, which mainly utilized a plurality of heat dissipation fins protruding from a bottom surface of a bottom shell of the extension box. The heat dissipation fins efficaciously dissipate heat from the storage media, so it improves the dissipation heat efficiency and reduces breakdown for the storage media. The extension box of storage media of the present invention is electrically connected with an external electronic apparatus by a universal series bus (USB) or an IEEE 1394 interface connector for transmitting a data.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: December 2, 2008
    Assignee: Macpower & Tytech Technology Co., Ltd.
    Inventor: Po-Hung Chen
  • Publication number: 20080238439
    Abstract: A method of testing a fuse element for a memory device is provided. A first test probe is electrically connected to a program terminal of the memory device. A second test probe is electrically connected to a ground terminal. The fuse element is on an electrical circuit path between the program terminal and the ground terminal. The first and second test probes are electrically connected to a testing device. A first voltage is applied with the testing device between the program terminal and the ground terminal. At least part of a first current of the first voltage flows across the fuse element. The first voltage and the at least part of the first current that flows across the fuse element is not large enough to change the conductivity state of the fuse element. The first current is measured and used to evaluated the conductive state of the fuse element.
    Type: Application
    Filed: April 2, 2007
    Publication date: October 2, 2008
    Inventors: Sung-Chieh Lin, Po-Hung Chen
  • Publication number: 20080188031
    Abstract: The present invention discloses a packaging method of a light-sensing semiconductor device and a packaging structure thereof, wherein a matrix of spacer walls is formed on a light-sensing wafer, which has multiple light-sensing chips, and the adhesive is directly applied to between two neighboring spacer walls on the non-light-sensing regions. Thus, when the light transparent cover is installed, there is no more adhesive dropping onto the light-sensing regions of the light-sensing chips. Further, when the light transparent cover is pressed to join with the spacer walls, with the trenches formed at the tops of the spacer walls, the adhesive will not overflow from the joint seams into the light-sensing regions.
    Type: Application
    Filed: April 7, 2008
    Publication date: August 7, 2008
    Inventors: Po-Hung Chen, Mao-Jung Chen
  • Patent number: 7405456
    Abstract: The present invention relates to an optical sensor chip package in a cavity of forming frame thereof and has a gap between protection layer and optical sensor chip. The optical sensor chip avoids accepting the pressure from protection layer that damage the reliability between pads and metallic traces when protection layer lay on the forming frame. It improves drawbacks of the glue pass trough the gap between optical sensor chip and pads into the optical sensor area of optical sensor chip. It improves the high process yield and reduces the height of optical sensor chip package to achieve lightly and thinly.
    Type: Grant
    Filed: September 14, 2005
    Date of Patent: July 29, 2008
    Assignee: Sigurd Microelectronics Corp.
    Inventors: Po-Hung Chen, Chin-Cheng Lo, Mao-Jung Chen
  • Patent number: 7358482
    Abstract: The present invention discloses a packaging structure of a light-sensing element and a fabrication method thereof, wherein the light-sensing chip is installed on the substrate, and then a cleaning step is undertaken; next, a light transparent cover with a cavity is installed to the substrate with a glue material in order to envelop the light-sensing chip. Thereby, the present invention not only can clean pollutants completely and promote the yield, but also can reduce the packaging area. In the present invention, the engagement portions may also be formed on the substrate and the light transparent cover so that the alignment can be undertaken easily.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: April 15, 2008
    Assignee: Sigurd Microelectronics Corp.
    Inventor: Po-Hung Chen
  • Patent number: 7323675
    Abstract: The present invention discloses a packaging structure of a light-sensing device with a spacer wall, wherein a spacer wall is used to protect the light-sensing region from external pollutants or two spacer walls are used to confine the glue to therebetween lest the overflow glue pollute the light-sensing region as in the conventional technology. Further, the present invention can reduce the packaging area and can promote the yield and quality obviously.
    Type: Grant
    Filed: September 21, 2005
    Date of Patent: January 29, 2008
    Assignee: Sigurd Microelectronics Corp.
    Inventor: Po-Hung Chen
  • Patent number: 7297918
    Abstract: An image sensor package structure and an image sensing module are proposed. A substrate, a frame and a light transparent layer are used to package an image sensing chip to form the image sensor package structure. The frame is mounted on the substrate and located around the image sensing chip. The top of the frame extends toward the image sensing chip and upwards to form a locking and placing portion with an L-shaped cross section. Bend positions of the locking and placing portion form a placement space formed to accommodate and position the light transparent layer. The structure is simple, the fabrication is easy, and the gluing and packaging operations can be facilitated. Moreover, when the image sensor package structure and a lens set are assembled into an image sensing module, a lens base with a smaller size can be used to shrink the package area.
    Type: Grant
    Filed: August 15, 2006
    Date of Patent: November 20, 2007
    Assignee: Sigurd Microelectronics Corp.
    Inventors: Po-Hung Chen, Mao-Jung Chen, Chung-Chi Hsiao
  • Patent number: 7282788
    Abstract: In an image sensing chip package structure, plated through vias penetrate a substrate to electrically connect metallization traces disposed on the upper and lower surfaces of the substrate. The plated through vias can be opened from the center of the substrate instead of being located at the periphery of the substrate. Contamination can thus be avoided during the glue dispensing process, and protection layers can also be used to seal gaps generated by the plated through vias, hence enhancing the producing yield. Moreover, protection layers having stickiness can further be used to secure components so as to reduce the production cost and enhance the product quality.
    Type: Grant
    Filed: September 14, 2005
    Date of Patent: October 16, 2007
    Assignee: Sigurd Microelectronics Corp.
    Inventor: Po-Hung Chen
  • Patent number: 7218628
    Abstract: A method and a device for detecting a preamble type of a wireless data frame are provided. The preamble has a synchronization (SYNC) field and a start frame delimiter (SFD) field, and the method comprises following steps. The wireless data frame is first received, and then determined whether the wireless data frame has a short preamble. When the wireless data frame has the short preamble, the wireless data frame is transmitted to a MAC device. In addition, if the wireless data frame does not have the short preamble, it determines whether the wireless data frame has a long preamble. When the wireless data frame has the long preamble, the wireless data frame is then transmitted to the MAC device.
    Type: Grant
    Filed: July 29, 2002
    Date of Patent: May 15, 2007
    Assignee: MediaTek Incorporation
    Inventors: Mao-Ching Chiu, Chu-Ming Lin, Po-Hung Chen, Chin-Wen Lin, Tai-Yuan Cheng
  • Publication number: 20070090504
    Abstract: The present invention relates to an optical sensor chip package in a cavity of forming frame thereof and has a gap between protection layer and optical sensor chip. The optical sensor chip avoids accepting the pressure from protection layer that damage the reliability between pads and metallic traces when protection layer lay on the forming frame. It improves drawbacks of the glue pass trough the gap between optical sensor chip and pads into the optical sensor area of optical sensor chip. It improves the high process yield and reduces the height of optical sensor chip package to achieve lightly and thinly.
    Type: Application
    Filed: September 14, 2005
    Publication date: April 26, 2007
    Inventors: Po-Hung Chen, Chin-Cheng Lo, Mao-Jung Chen