Patents by Inventor Purushottam Kumar

Purushottam Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210384029
    Abstract: Methods and apparatuses for modifying a wafer surface using an organosilicon precursor are provided herein. The wafer surface is dosed with the organosilicon precursor following deposition of a dielectric material by an atomic layer deposition (ALD) process. In some implementations, the dielectric layer is made of silicon oxide. Dosing the wafer surface with the organosilicon precursor may occur in the same chamber as the ALD process. The organosilicon precursor may modify the wafer surface to increase its hydrophobicity so that photoresist adhesion is improved on the wafer surface. In some implementations, the wafer surface may be exposed to an inert gas RF plasma after dosing the wafer surface with the organosilicon precursor.
    Type: Application
    Filed: April 8, 2019
    Publication date: December 9, 2021
    Inventors: Jeremy D. Fields, Awnish Gupta, Douglas W. Agnew, Joseph R. Abel, Purushottam Kumar
  • Patent number: 11180850
    Abstract: Methods and apparatuses for controlling precursor flow in a semiconductor processing tool are disclosed. A method may include flowing gas through a gas line, opening an ampoule valve(s), before a dose step, to start a flow of precursor from the ampoule to a process chamber through the gas line, closing the ampoule valve(s) to stop the precursor from flowing out of the ampoule, opening a process chamber valve, at the beginning of the dose step, to allow the flow of precursor to enter the process chamber, and closing the process chamber valve, at the end of the dose step, to stop the flow of precursor from entering the process chamber. A controller may include at least one memory and at least one processor and the at least one memory may store instructions for controlling the at least one processor to control precursor flow in a semiconductor processing tool.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: November 23, 2021
    Assignee: Lam Research Corporation
    Inventors: Purushottam Kumar, Adrien LaVoie, Jun Qian, Hu Kang, Ishtak Karim, Fung Suong Ou
  • Publication number: 20210343520
    Abstract: Methods for depositing ultrathin films by atomic layer deposition with reduced wafer-to-wafer variation are provided. Methods involve exposing the substrate to soak gases including one or more gases used during a plasma exposure operation of an atomic layer deposition cycle prior to the first atomic layer deposition cycle to heat the substrate to the deposition temperature.
    Type: Application
    Filed: July 16, 2021
    Publication date: November 4, 2021
    Applicant: Lam Research Corporation
    Inventors: Jun Qian, Hu Kang, Adrien LaVoie, Seiji Matsuyama, Purushottam Kumar
  • Patent number: 11101129
    Abstract: Methods for depositing films by atomic layer deposition using cyclic siloxane precursors are provided. Methods involve exposing the substrate to a cyclic siloxane precursor during operation of an atomic layer deposition cycle to form silicon oxide.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: August 24, 2021
    Assignee: Lam Research Corporation
    Inventors: Jun Qian, Hu Kang, Adrien LaVoie, Seiji Matsuyama, Purushottam Kumar
  • Publication number: 20210238743
    Abstract: A gas delivery system for a processing chamber includes a first channel for delivering a first chemistry and a second channel for delivering a second chemistry. The first channel includes a first outlet valve and the second channel includes a second outlet valve. A trickle gas source is connected to both the first and the second channels. A first junction is coupled to the first outlet valve and a second junction is connected to the second outlet valve. A common conduit connects between the first junction and the second junction. The first junction includes an input to provide a push gas from a push gas source and the second junction includes an output to a processing chamber. During operation, one of the first channel or the second channel is active at one time. A trickle gas from a trickle gas source is flowed into an active one and a non-active one of the first or second channels.
    Type: Application
    Filed: April 22, 2021
    Publication date: August 5, 2021
    Inventors: Eli Jeon, Adrien LaVoie, Purushottam Kumar, Jeffrey Kersten, Gautam Dhar
  • Publication number: 20210202250
    Abstract: A method for forming features over a wafer with a carbon based deposition is provided. The carbon based deposition is pretuned, wherein the pretuning causes a non-uniform removal of some of the carbon based deposition. An oxide deposition is deposited through an atomic layer deposition process, wherein the depositing the oxide deposition causes a non-uniform removal of some of the carbon based deposition. At least one additional process is provided, wherein the at least one additional process completes formation of features over the wafer, wherein the features are more uniform than features that would be formed without pretuning.
    Type: Application
    Filed: March 17, 2021
    Publication date: July 1, 2021
    Inventors: Ishtak KARIM, Pulkit AGARWAL, Joseph R. ABEL, Purushottam KUMAR, Adrien LAVOIE
  • Patent number: 11021792
    Abstract: A gas delivery system for a processing chamber includes a first channel for delivering a first chemistry and a second channel for delivering a second chemistry. The first channel includes a first outlet valve and the second channel includes a second outlet valve. A trickle gas source is connected to both the first and the second channels. A first junction is coupled to the first outlet valve and a second junction is connected to the second outlet valve. A common conduit connects between the first junction and the second junction. The first junction includes an input to provide a push gas from a push gas source and the second junction includes an output to a processing chamber. During operation, one of the first channel or the second channel is active at one time. A trickle gas from a trickle gas source is flowed into an active one and a non-active one of the first or second channels.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: June 1, 2021
    Assignee: Lam Research Corporation
    Inventors: Eli Jeon, Adrien LaVoie, Purushottam Kumar, Jeffrey Kersten, Gautam Dhar
  • Patent number: 10978302
    Abstract: A method for forming features over a wafer with a carbon based deposition is provided. The carbon based deposition is pretuned, wherein the pretuning causes a non-uniform removal of some of the carbon based deposition. An oxide deposition of a silicon oxide based material is deposited through an atomic layer deposition process, wherein the depositing the oxide deposition causes a non-uniform removal of some of the carbon based deposition, which is complementary to the non-uniform removal of some of the carbon based deposition by the pretuning.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: April 13, 2021
    Assignee: Lam Research Corporation
    Inventors: Ishtak Karim, Pulkit Agarwal, Joseph Abel, Purushottam Kumar, Adrien Lavoie
  • Publication number: 20200407849
    Abstract: A method for delivering vaporized precursor in a substrate processing system using a vapor delivery system includes (a) selectively supplying push gas to an inlet of an ampoule storing liquid and vaporized precursor during a deposition period of a substrate; (b) measuring a pressure of the push gas and the vaporized precursor at an outlet of the ampoule during the deposition period; (c) determining a maximum pressure during the deposition period; (d) determining an integrated area for the deposition period based on a sampling interval and the maximum pressure during the sampling interval; and (e) repeating (a), (b), (c) and (d) for a plurality of the deposition periods for the substrate.
    Type: Application
    Filed: June 28, 2019
    Publication date: December 31, 2020
    Inventors: Jun QIAN, Purushottam KUMAR, Adrien LAVOIE, You ZHAI, Jeremiah BALDWIN, Sung Je KIM
  • Patent number: 10847352
    Abstract: A controller includes memory that stores data correlating accumulation values to respective adjustment factors. The accumulation values correspond to accumulation of material on surfaces within a processing chamber and the respective adjustment factors correspond to adjustments to a control parameter of RF power provided to the processing chamber. An accumulation calculation module is configured to calculate a first accumulation value indicating an amount of accumulation of the material. An RF power control module is configured to receive the first accumulation value, receive at least one of a setpoint power and a duration of an etching step, retrieve the stored data from the memory, adjust the control parameter based on the first accumulation value, the at least one of the setpoint power and the duration of the etching step, and the stored data, and control the RF power provided to the processing chamber in accordance with the adjusted control parameter.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: November 24, 2020
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Pulkit Agarwal, Adrien Lavoie, Ravi Kumar, Purushottam Kumar
  • Publication number: 20200357636
    Abstract: Method for gap fill includes performing in order the following: (a) performing, consecutively, a first plurality of cycles of an atomic layer deposition process on a substrate; (b) purging process gases from the atomic layer deposition process; (c) performing a first plasma treatment on the substrate by introducing a fluorine plasma in the process chamber; (d) purging process gases from the plasma treatment; (e) repeating, in order, operations (a) through (d) until a predefined plurality of cycles has been performed; (f) performing, consecutively, a second plurality of cycles of the atomic layer deposition process on the substrate; (g) purging process gases from the atomic layer deposition process; (h) performing a second plasma treatment on the substrate by introducing a fluorine plasma in the process chamber; (i) purging process gases from the plasma treatment; (j) repeating, in order, operations (f) through (i) until a predefined plurality of cycles has been performed.
    Type: Application
    Filed: July 24, 2020
    Publication date: November 12, 2020
    Inventors: Joseph Abel, Adrien Lavoie, Purushottam Kumar
  • Patent number: 10832909
    Abstract: Methods and apparatuses for patterning carbon-containing material over a layer to be etched are provided herein. Methods involve trimming carbon-containing material by atomic layer etching including exposing the carbon-containing material to an oxygen-containing gas without a plasma to modify a surface of the carbon-containing material and exposing the carbon-containing material to an inert gas and igniting a plasma to remove the modified surface of the carbon-containing material. Methods may be used for multiple patterning techniques such as double and quad patterning. Methods also include depositing a conformal film over a carbon-containing material patterned using atomic layer etching without breaking vacuum. The oxygen-containing gas may be one containing any one or more of oxygen, ozone, water vapor, nitrous oxide, carbon monoxide, formic acid vapor and/or carbon dioxide.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: November 10, 2020
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Adrien LaVoie, Puikit Agarwal, Purushottam Kumar
  • Publication number: 20200350219
    Abstract: A pattern of core material is formed on a wafer to include core features that have a critical dimension. A trim amount indicates an average amount of thickness to be removed from vertically oriented surfaces of the core features. A trim profile indicates how much variation in removal of thickness from vertically oriented surfaces of the core features is to be applied as a function of radial location on the wafer. A first set of data correlates the trim amount to one or more plasma trim process parameters. A second set of data correlates the trim profile to one or more plasma trim process parameters. Based on the trim amount, trim profile, and first and second sets of data, a set of plasma trim process parameters to achieve the trim amount and trim profile on the wafer is determined and a corresponding plasma trim process is performed on the wafer.
    Type: Application
    Filed: July 21, 2020
    Publication date: November 5, 2020
    Inventors: Pulkit Agarwal, Adrien LaVoie, Ravi Kumar, Purushottam Kumar
  • Patent number: 10727143
    Abstract: A pattern of core material is formed on a wafer to include core features that have a critical dimension. A trim amount indicates an average amount of thickness to be removed from vertically oriented surfaces of the core features. A trim profile indicates how much variation in removal of thickness from vertically oriented surfaces of the core features is to be applied as a function of radial location on the wafer. A first set of data correlates the trim amount to one or more plasma trim process parameters. A second set of data correlates the trim profile to one or more plasma trim process parameters. Based on the trim amount, trim profile, and first and second sets of data, a set of plasma trim process parameters to achieve the trim amount and trim profile on the wafer is determined and a corresponding plasma trim process is performed on the wafer.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: July 28, 2020
    Assignee: Lam Research Corporation
    Inventors: Pulkit Agarwal, Adrien Lavoie, Ravi Kumar, Purushottam Kumar
  • Patent number: 10727046
    Abstract: A method for performing gap fill of a feature on a substrate includes the following operations: (a) moving the substrate into a process chamber; (b) performing a plurality of cycles of an ALD process; (c) purging process gases from the ALD process from the process chamber; (d) performing a plasma treatment on the substrate by introducing a fluorine-containing gas into the process chamber and applying RF power to the fluorine-containing gas to generate a fluorine plasma in the process chamber; (e) purging process gases from the plasma treatment from the process chamber; (f) repeating operations (b) through (e) until a predefined number of cycles has been performed.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: July 28, 2020
    Assignee: Lam Research Corporation
    Inventors: Joseph Abel, Adrien Lavoie, Purushottam Kumar
  • Patent number: 10679848
    Abstract: Methods and apparatuses for depositing films in high aspect ratio features and trenches using a post-dose treatment operation during atomic layer deposition are provided. Post-dose treatment operations are performed after adsorbing precursors onto the substrate to remove adsorbed precursors at the tops of features prior to converting the adsorbed precursors to a silicon-containing film. Post-dose treatments include exposure to non-oxidizing gas, exposure to non-oxidizing plasma, and exposure to ultraviolet radiation.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: June 9, 2020
    Assignee: Lam Research Corporation
    Inventors: Purushottam Kumar, Adrien LaVoie, Ishtak Karim, Jun Qian, Frank L. Pasquale, Bart J. van Schravendijk
  • Patent number: 10655224
    Abstract: A semiconductor system includes a chamber, a pedestal disposed in the chamber, and a focus ring that surrounds the pedestal. The pedestal has a center region for supporting a central region of a substrate, e.g., a wafer. The focus ring is configured to surround the center region of the pedestal. The focus ring has an annular support region that extends between an inner portion of the focus ring and an outer portion of the focus ring. The annular support region, which is disposed at an angle relative to a horizontal line, provides a knife-edge contact for the substrate when present over the center region of the pedestal and the annular support region of the focus ring. The knife-edge contact between the edge of the substrate and the annular support region of the focus ring disables chemical access to the substrate backside and thereby reduces unwanted backside deposition.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: May 19, 2020
    Assignee: Lam Research Corporation
    Inventors: Pulkit Agarwal, Ishtak Karim, Purushottam Kumar, Adrien LaVoie, Sung Je Kim, Patrick Breiling
  • Patent number: 10658172
    Abstract: Methods and apparatuses for depositing material into high aspect ratio features, features in a multi-laminate stack, features having positively sloped sidewalls, features having negatively sloped sidewalls, features having a re-entrant profile, and/or features having sidewall topography are described herein. Methods involve depositing a first amount of material, such as a dielectric (e.g., silicon oxide), into a feature and forming a sacrificial helmet on the field surface of the substrate, etching some of the first amount of the material to open the feature opening and/or smoothen sidewalls of the feature, and depositing a second amount of material to fill the feature. The sacrificial helmet may be the same as or different material from the first amount of material deposited into the feature.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: May 19, 2020
    Assignee: Lam Research Corporation
    Inventors: Joseph R. Abel, Pulkit Agarwal, Richard Phillips, Purushottam Kumar, Adrien LaVoie
  • Publication number: 20200152446
    Abstract: Methods for depositing ultrathin films by atomic layer deposition with reduced wafer-to-wafer variation are provided. Methods involve exposing the substrate to soak gases including one or more gases used during a plasma exposure operation of an atomic layer deposition cycle prior to the first atomic layer deposition cycle to heat the substrate to the deposition temperature.
    Type: Application
    Filed: January 10, 2020
    Publication date: May 14, 2020
    Inventors: Jun Qian, Hu Kang, Adrien LaVoie, Seiji Matsuyama, Purushottam Kumar
  • Patent number: 10636686
    Abstract: A method for monitoring drift in a plasma processing chamber for semiconductor processing is provided. A plurality of cycles is provided, wherein each cycle comprises depositing a deposition layer over a chuck in the plasma processing chamber, plasma etching the deposition layer, and measuring a time for plasma etching the deposition layer to etch through the deposition layer. The measured time for plasma etching is used to determine plasma processing chamber drift.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: April 28, 2020
    Assignee: Lam Research Corporation
    Inventors: Joseph Abel, Purushottam Kumar, Adrien Lavoie