Patents by Inventor Purushottam Kumar

Purushottam Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10727143
    Abstract: A pattern of core material is formed on a wafer to include core features that have a critical dimension. A trim amount indicates an average amount of thickness to be removed from vertically oriented surfaces of the core features. A trim profile indicates how much variation in removal of thickness from vertically oriented surfaces of the core features is to be applied as a function of radial location on the wafer. A first set of data correlates the trim amount to one or more plasma trim process parameters. A second set of data correlates the trim profile to one or more plasma trim process parameters. Based on the trim amount, trim profile, and first and second sets of data, a set of plasma trim process parameters to achieve the trim amount and trim profile on the wafer is determined and a corresponding plasma trim process is performed on the wafer.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: July 28, 2020
    Assignee: Lam Research Corporation
    Inventors: Pulkit Agarwal, Adrien Lavoie, Ravi Kumar, Purushottam Kumar
  • Patent number: 10679848
    Abstract: Methods and apparatuses for depositing films in high aspect ratio features and trenches using a post-dose treatment operation during atomic layer deposition are provided. Post-dose treatment operations are performed after adsorbing precursors onto the substrate to remove adsorbed precursors at the tops of features prior to converting the adsorbed precursors to a silicon-containing film. Post-dose treatments include exposure to non-oxidizing gas, exposure to non-oxidizing plasma, and exposure to ultraviolet radiation.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: June 9, 2020
    Assignee: Lam Research Corporation
    Inventors: Purushottam Kumar, Adrien LaVoie, Ishtak Karim, Jun Qian, Frank L. Pasquale, Bart J. van Schravendijk
  • Patent number: 10655224
    Abstract: A semiconductor system includes a chamber, a pedestal disposed in the chamber, and a focus ring that surrounds the pedestal. The pedestal has a center region for supporting a central region of a substrate, e.g., a wafer. The focus ring is configured to surround the center region of the pedestal. The focus ring has an annular support region that extends between an inner portion of the focus ring and an outer portion of the focus ring. The annular support region, which is disposed at an angle relative to a horizontal line, provides a knife-edge contact for the substrate when present over the center region of the pedestal and the annular support region of the focus ring. The knife-edge contact between the edge of the substrate and the annular support region of the focus ring disables chemical access to the substrate backside and thereby reduces unwanted backside deposition.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: May 19, 2020
    Assignee: Lam Research Corporation
    Inventors: Pulkit Agarwal, Ishtak Karim, Purushottam Kumar, Adrien LaVoie, Sung Je Kim, Patrick Breiling
  • Patent number: 10658172
    Abstract: Methods and apparatuses for depositing material into high aspect ratio features, features in a multi-laminate stack, features having positively sloped sidewalls, features having negatively sloped sidewalls, features having a re-entrant profile, and/or features having sidewall topography are described herein. Methods involve depositing a first amount of material, such as a dielectric (e.g., silicon oxide), into a feature and forming a sacrificial helmet on the field surface of the substrate, etching some of the first amount of the material to open the feature opening and/or smoothen sidewalls of the feature, and depositing a second amount of material to fill the feature. The sacrificial helmet may be the same as or different material from the first amount of material deposited into the feature.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: May 19, 2020
    Assignee: Lam Research Corporation
    Inventors: Joseph R. Abel, Pulkit Agarwal, Richard Phillips, Purushottam Kumar, Adrien LaVoie
  • Publication number: 20200152446
    Abstract: Methods for depositing ultrathin films by atomic layer deposition with reduced wafer-to-wafer variation are provided. Methods involve exposing the substrate to soak gases including one or more gases used during a plasma exposure operation of an atomic layer deposition cycle prior to the first atomic layer deposition cycle to heat the substrate to the deposition temperature.
    Type: Application
    Filed: January 10, 2020
    Publication date: May 14, 2020
    Inventors: Jun Qian, Hu Kang, Adrien LaVoie, Seiji Matsuyama, Purushottam Kumar
  • Patent number: 10636686
    Abstract: A method for monitoring drift in a plasma processing chamber for semiconductor processing is provided. A plurality of cycles is provided, wherein each cycle comprises depositing a deposition layer over a chuck in the plasma processing chamber, plasma etching the deposition layer, and measuring a time for plasma etching the deposition layer to etch through the deposition layer. The measured time for plasma etching is used to determine plasma processing chamber drift.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: April 28, 2020
    Assignee: Lam Research Corporation
    Inventors: Joseph Abel, Purushottam Kumar, Adrien Lavoie
  • Publication number: 20200087786
    Abstract: Methods of depositing uniform films on substrates using multi-cyclic atomic layer deposition techniques are described. Methods involve varying one or more parameter values from cycle to cycle to tailor the deposition profile. For example, some methods involve repeating a first ALD cycle using a first carrier gas flow rate during precursor exposure and a second ALD cycle using a second carrier gas flow rate during precursor exposure. Some methods involve repeating a first ALD cycle using a first duration of precursor exposure and a second ALD cycle using a second duration of precursor exposure.
    Type: Application
    Filed: November 21, 2019
    Publication date: March 19, 2020
    Inventors: Purushottam Kumar, Adrien LaVoie, Hu Kang, Jun Qian, Tuan Nguyen, Ye Wang
  • Publication number: 20200063259
    Abstract: A method for processing a substrate is provided, wherein the substrate is located below a showerhead in a processing chamber. A deposition layer is deposited on the substrate, wherein at least one deposition gas is provided through the showerhead. A secondary purge gas is flowed during the depositing the deposition layer from a location outside of the showerhead in the processing chamber forming a flow curtain around an outer edge of the showerhead, wherein the secondary purge gas comprises at least one component gas. A partial pressure of the at least one component gas is changed over time during the depositing the deposition layer, wherein the depositing the deposition layer has a non-uniformity, wherein the changing the partial pressure changes the non-uniformity over time during the depositing the deposition layer.
    Type: Application
    Filed: August 22, 2018
    Publication date: February 27, 2020
    Inventors: Pulkit AGARWAL, Adrien LAVOIE, Purushottam KUMAR
  • Publication number: 20200056288
    Abstract: A gas delivery system for a processing chamber includes a first channel for delivering a first chemistry and a second channel for delivering a second chemistry. The first channel includes a first outlet valve and the second channel includes a second outlet valve. A trickle gas source is connected to both the first and the second channels. A first junction is coupled to the first outlet valve and a second junction is connected to the second outlet valve. A common conduit connects between the first junction and the second junction. The first junction includes an input to provide a push gas from a push gas source and the second junction includes an output to a processing chamber. During operation, one of the first channel or the second channel is active at one time. A trickle gas from a trickle gas source is flowed into an active one and a non-active one of the first or second channels.
    Type: Application
    Filed: August 17, 2018
    Publication date: February 20, 2020
    Inventors: Eli Jeon, Adrien LaVoie, Purushottam Kumar, Jeffrey Kersten, Gautam Dhar
  • Patent number: 10566187
    Abstract: Methods for depositing ultrathin films by atomic layer deposition with reduced wafer-to-wafer variation are provided. Methods involve exposing the substrate to soak gases including one or more gases used during a plasma exposure operation of an atomic layer deposition cycle prior to the first atomic layer deposition cycle to heat the substrate to the deposition temperature.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: February 18, 2020
    Assignee: Lam Research Corporation
    Inventors: Jun Qian, Hu Kang, Adrien LaVoie, Seiji Matsuyama, Purushottam Kumar
  • Publication number: 20200043709
    Abstract: A controller includes memory that stores data correlating accumulation values to respective adjustment factors. The accumulation values correspond to accumulation of material on surfaces within a processing chamber and the respective adjustment factors correspond to adjustments to a control parameter of RF power provided to the processing chamber. An accumulation calculation module is configured to calculate a first accumulation value indicating an amount of accumulation of the material. An RF power control module is configured to receive the first accumulation value, receive at least one of a setpoint power and a duration of an etching step, retrieve the stored data from the memory, adjust the control parameter based on the first accumulation value, the at least one of the setpoint power and the duration of the etching step, and the stored data, and control the RF power provided to the processing chamber in accordance with the adjusted control parameter.
    Type: Application
    Filed: August 2, 2018
    Publication date: February 6, 2020
    Inventors: Pulkit Agarwal, Adrien Lavoie, Ravi Kumar, Purushottam Kumar
  • Publication number: 20200035572
    Abstract: A pattern of core material is formed on a wafer to include core features that have a critical dimension. A trim amount indicates an average amount of thickness to be removed from vertically oriented surfaces of the core features. A trim profile indicates how much variation in removal of thickness from vertically oriented surfaces of the core features is to be applied as a function of radial location on the wafer. A first set of data correlates the trim amount to one or more plasma trim process parameters. A second set of data correlates the trim profile to one or more plasma trim process parameters. Based on the trim amount, trim profile, and first and second sets of data, a set of plasma trim process parameters to achieve the trim amount and trim profile on the wafer is determined and a corresponding plasma trim process is performed on the wafer.
    Type: Application
    Filed: July 24, 2018
    Publication date: January 30, 2020
    Inventors: Pulkit Agarwal, Adrien Lavoie, Ravi Kumar, Purushottam Kumar
  • Publication number: 20200017967
    Abstract: A method for performing gapfill of features of a substrate including a) arranging a substrate on a substrate support in a processing chamber; b) performing atomic layer deposition (ALD) to deposit film in a feature of the substrate; c) supplying an inhibitor plasma gas to the processing chamber and striking plasma in the processing chamber to inhibit deposition in upper portions of the feature as compared to lower portions of the feature; d) repeating b) N times, where N is an integer greater than one, and repeating c) M of the N times where M is an integer greater than zero and less than or equal to N; e) supplying an etch gas to the processing chamber to etch the film in the feature of the substrate; and f) repeating b) to d) one or more times to gapfill the feature of the substrate.
    Type: Application
    Filed: July 11, 2018
    Publication date: January 16, 2020
    Inventors: Joseph ABEL, Purushottam KUMAR, Bart VAN SCHRAVENDIJK, Adrien LAVOIE
  • Publication number: 20200013616
    Abstract: A method for performing gap fill of a feature on a substrate includes the following operations: (a) moving the substrate into a process chamber; (b) performing a plurality of cycles of an ALD process; (c) purging process gases from the ALD process from the process chamber; (d) performing a plasma treatment on the substrate by introducing a fluorine-containing gas into the process chamber and applying RF power to the fluorine-containing gas to generate a fluorine plasma in the process chamber; (e) purging process gases from the plasma treatment from the process chamber; (f) repeating operations (b) through (e) until a predefined number of cycles has been performed.
    Type: Application
    Filed: July 6, 2018
    Publication date: January 9, 2020
    Inventors: Joseph Abel, Adrien Lavoie, Purushottam Kumar
  • Patent number: 10526700
    Abstract: The present inventors have conceived of a multi-stage process gas delivery system for use in a substrate processing apparatus. In certain implementations, a first process gas may first be delivered to a substrate in a substrate processing chamber. A second process gas may be delivered, at a later time, to the substrate to aid in the even dosing of the substrate. Delivery of the first process gas and the second process gas may cease at the same time or may cease at separate times.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: January 7, 2020
    Assignee: Lam Research Corporation
    Inventors: Purushottam Kumar, Hu Kang, Adrien LaVoie, Yi Chung Chiu, Frank L. Pasquale, Jun Qian, Chloe Baldasseroni, Shankar Swaminathan, Karl F. Leeser, David Charles Smith, Wei-Chih Lai
  • Patent number: 10526701
    Abstract: Methods of depositing uniform films on substrates using multi-cyclic atomic layer deposition techniques are described. Methods involve varying one or more parameter values from cycle to cycle to tailor the deposition profile. For example, some methods involve repeating a first ALD cycle using a first carrier gas flow rate during precursor exposure and a second ALD cycle using a second carrier gas flow rate during precursor exposure. Some methods involve repeating a first ALD cycle using a first duration of precursor exposure and a second ALD cycle using a second duration of precursor exposure.
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: January 7, 2020
    Assignee: Lam Research Corporation
    Inventors: Purushottam Kumar, Adrien LaVoie, Hu Kang, Jun Qian, Tuan Nguyen, Ye Wang
  • Publication number: 20190378710
    Abstract: Methods for depositing ultrathin films by atomic layer deposition with reduced wafer-to-wafer variation are provided. Methods involve exposing the substrate to soak gases including one or more gases used during a plasma exposure operation of an atomic layer deposition cycle prior to the first atomic layer deposition cycle to heat the substrate to the deposition temperature.
    Type: Application
    Filed: June 28, 2019
    Publication date: December 12, 2019
    Inventors: Jun Qian, Hu Kang, Adrien LaVoie, Seiji Matsuyama, Purushottam Kumar
  • Patent number: 10494715
    Abstract: Methods and apparatuses for removing photoresist patterning scum from patterning mandrel structures without damaging other features or structures on a semiconductor substrate are desirable for patterning precision. Methods involve cleaning carbon-containing features on a semiconductor substrate by an atomic layer cleaning (ALC) process to descum the carbon-containing features without substantially modifying feature critical dimensions. The ALC process involves exposing the carbon-containing features to an oxidant or reductant in absence of a plasma, or other energetic activation, to modify scum on the surface of the carbon-containing features. The modified scum on the surface of the carbon-containing features is then exposed to an inert gas along with a plasma ignited at a pressure between 0.1 Torr and 10 Torr and a power of less than 200 W to remove the modified scum from the surface of the carbon-containing features.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: December 3, 2019
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Pulkit Agarwal, Purushottam Kumar, Adrien LaVoie
  • Publication number: 20190345608
    Abstract: A method for depositing a layer on a substrate is provided. A plurality of plasma atomic layer deposition (ALD) layers is deposited over the substrate, wherein each plasma ALD layer of the plurality of ALD layers is deposited at a first RF power. The plurality of plasma ALD layers is densified, comprising generating a densifying plasma using a second RF power greater than the first RF power, wherein at least one of the plurality of plasma ALD layers is densified.
    Type: Application
    Filed: May 8, 2018
    Publication date: November 14, 2019
    Inventors: Pulkit AGARWAL, Purushottam KUMAR, Adrien LAVOIE
  • Patent number: 10431451
    Abstract: Certain embodiments herein relate to methods of increasing a reaction chamber batch size. A portion of a batch of wafers is processed within the chamber. The processing results in at least some off-target deposition of material on interior surfaces of the reaction chamber. A mid-batch chamber processing is conducted to stabilize the off-target deposition materials accumulated on the chamber interior surfaces. Another portion of the batch of wafers is processed within the chamber. In various embodiments, processing of the chamber (e.g., mid-batch) and subsequent portion of the batch of wafers is repeated until processing of all wafers is complete. Batch size refers to the number of wafers that may be processed in the reaction chamber between chamber clean cycles. Chamber interior surfaces are seasoned prior to batch processing. Seasoning of the chamber interior surfaces involves applying a coating of the same material that may be used for deposition on the wafers during processing of the same.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: October 1, 2019
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Pulkit Agarwal, Purushottam Kumar, Richard Phillips, Adrien LaVoie