Patents by Inventor Quang (Tim) Nguyen

Quang (Tim) Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240430141
    Abstract: Certain examples of the present disclosure relate to an apparatus (10), method (400) and computer program (14) for: receiving at least one first signal (501) comprising an indication of at least one bit of a first System Frame Number, SFN (302); determining, based at least in part on the received at least one first signal, at least one value of a reliability metric for the at least one bit of the first SFN; receiving at least one second signal (503) comprising an indication of at least one bit of a second SFN different than the first SFN; determining, based at least in part on the received at least one second signal and the determined at least one value of the reliability metric for the at least one bit of the first SFN, at least one value of a reliability metric for the at least one bit of the second SFN.
    Type: Application
    Filed: October 27, 2021
    Publication date: December 26, 2024
    Applicant: Nokia Technologies Oy
    Inventors: Alessio MARCONE, Elena PERALTA CALVO, Nhat-Quang NHAN, Cássio Barboza RIBEIRO
  • Patent number: 12174239
    Abstract: Techniques are described herein that are capable of using variable voltage sources to control respective thermoelectric coolers independently in a thermal testing environment. The variable voltage sources create temperature differentials between first and second opposing surfaces of the thermoelectric coolers by applying input voltages to the respective thermoelectric coolers. Heat is transferred, by first heat exchanger(s), between a fluid and respective subset(s) of the thermoelectric coolers Heat is transferred, by second heat exchanger(s), between semiconductor device(s) and the subset(s) of the thermoelectric coolers.
    Type: Grant
    Filed: November 5, 2021
    Date of Patent: December 24, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Quang Thanh Tran, Judith Cutaran Aarts, John S. Hickman
  • Patent number: 12171655
    Abstract: Methods and systems for rotationally aligning a commissure of a prosthetic heart valve with a commissure of a native valve are disclosed. In some examples, a delivery apparatus can include a first shaft configured to rotate around a central longitudinal axis of the delivery apparatus to rotationally align a prosthetic valve mounted on the delivery apparatus with native anatomy, a second shaft extending through the first shaft and having a distal end portion extending distally beyond a distal end portion of the first shaft, an inflatable balloon coupled to the distal end portion of the first shaft, and a distal shoulder mounted on the distal end portion of the second shaft and arranged within a distal end portion of the balloon. The distal shoulder comprises a base portion and a flared portion that extends radially outward from the base portion, and a radiopaque marker is disposed on the flared portion.
    Type: Grant
    Filed: February 23, 2023
    Date of Patent: December 24, 2024
    Assignee: EDWARDS LIFESCIENCES CORPORATION
    Inventors: Michael R. Bialas, Kristen Hicks, Michael C. Murad, Gil Senesh, Quang Ngoc Vu, Gonzalo German Angelico, Carla Susana Cerqueira, Victoria Mariko Low, Andrea Fernandez, Karl J. Britzman, Shannon Nicole Ash, Haley Nicole Whitehead
  • Patent number: 12177061
    Abstract: Lightweight, dynamic mechanisms are provided to support service layer interworking and resource extensibility. For example, one mechanism disclosed herein comprises defining a new service layer (SL) resource definition registration procedure that allows for specifying custom attributes of service layer resources to represent third party technology resources. A second mechanism disclosed herein comprises defining a new SL data model mapping registration procedure to map service layer resources to third party data models and to provide a new interworked retargeting indicator to the service layer. Further, a third mechanism disclosed herein comprises defining a SL generic interworking procedure to intelligently retarget requests toward interworked resources based on the interworked retargeting indicator provided by the data model mapping.
    Type: Grant
    Filed: September 6, 2023
    Date of Patent: December 24, 2024
    Assignee: Convida Wireless, LLC
    Inventors: Quang Ly, Dale N. Seed, William Robert Flynn, IV, Catalina M. Mladin, Chonggang Wang, Rocco Di Girolamo, Zhuo Chen
  • Patent number: 12177302
    Abstract: Internet of Things (IoT) configurable event and action sequencing mechanisms for interconnecting various IoT events together to achieve an event and action sequencing process that may efficiently enable complex uses of the data available in IoT systems.
    Type: Grant
    Filed: May 26, 2023
    Date of Patent: December 24, 2024
    Assignee: Convida Wireless, LLC
    Inventors: Quang Ly, Dale N. Seed, Zhuo Chen, William Robert Flynn, IV, Catalina Mihaela Mladin, Rocco Di Girolamo, Shoshana Loeb, Hongkun Li
  • Patent number: 12176132
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) device comprising a first bismuth antimony (BiSb) layer having a (001) orientation. The SOT device comprises a first BiSb layer having a (001) orientation and a second BiSb layer having a (012) orientation. The first BiSb layer having a (001) orientation is formed by depositing an amorphous material selected from the group consisting of: B, Al, Si, SiN, Mg, Ti, Sc, V, Cr, Mn, Y, Zr, Nb, AlN, C, Ge, and combinations thereof, on a substrate, exposing the amorphous material to form an amorphous oxide surface on the amorphous material, and depositing the first BiSb layer on the amorphous oxide surface. By utilizing a first BiSb layer having a (001) orientation and a second BiSb having a (012) orientation, the signal through the SOT device is balanced and optimized to match through both the first and second BiSb layers.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: December 24, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Quang Le, Brian R. York, Cherngye Hwang, Xiaoyong Liu, Michael A. Gribelyuk, Xiaoyu Xu, Randy G. Simmons, Kuok San Ho, Hisashi Takano
  • Publication number: 20240417968
    Abstract: A locking assembly for use in building construction includes a locking body configured to be mounted on a first modular building unit and extend in a first direction away from the first modular building unit. The locking body is configured to receive and engage another locking assembly of a second modular building unit for locating the first modular building unit and the second modular building unit with respect to each other. A locking extension is configured to be mounted on the first modular building unit and extend in a second direction, opposite the first direction, away from the first modular building unit. The locking extension is configured to engage another locking body on a third modular building unit to lock the first modular building unit to the third modular building unit.
    Type: Application
    Filed: August 29, 2024
    Publication date: December 19, 2024
    Inventors: Behzad Rafezy, Quang Minh Huynh, Henry Gallart, Jared J Adams
  • Publication number: 20240423098
    Abstract: The present disclosure generally relate to an integrated circuit utilizing spin orbital-spin orbital (SO-SO) logic. The integrated circuit comprises a plurality of SO-SO logic cells, where each SO-SO logic cell comprises a first spin orbit torque (SOT1) layer, a second spin orbit torque (SOT2) layer, and a ferromagnetic layer disposed between the SOT1 and SOT2 layer. Each SO-SO logic cell is configured for: a first current path that is in plane to a plane of the SOT1 layer, and a second current path that is perpendicular to a plane of the SOT2 layer, the second current path being configured to extend into the ferromagnetic layer. The integrated circuit further comprises a common voltage source connected to each SOT device, and one or more interconnects disposed between adjacent SOT devices of the plurality of SOT devices, the one or more interconnects connecting the adjacent SOT devices together.
    Type: Application
    Filed: April 24, 2024
    Publication date: December 19, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Xiaoyong LIU, Brian R. YORK, Cherngye HWANG, Hisashi TAKANO, Nam Hai PHAM
  • Publication number: 20240419910
    Abstract: A method includes receiving an indication of a first coverage value corresponding to a desired overlap between a dataset of natural language phrases and a training dataset for training a machine learning model; determining a second coverage value corresponding to a measured overlap between the dataset of natural language phrases and the training dataset; determining a coverage delta value based on a comparison between the first coverage value and the second coverage value; modifying, based on the coverage delta value, the dataset of natural language phrases; and processing, utilizing a machine learning model including the modified dataset of natural language phrases, an input dataset including a set of input features. The machine learning model processes the input dataset based at least in part on the dataset of natural language phrases to generate an output dataset.
    Type: Application
    Filed: August 29, 2024
    Publication date: December 19, 2024
    Applicant: Oracle International Corporation
    Inventors: Thanh Long Duong, Vishal Vishnoi, Mark Edward Johnson, Elias Luqman Jalaluddin, Tuyen Quang Pham, Cong Duy Vu Hoang, Poorya Zaremoodi, Srinivasa Phani Kumar Gadde, Aashna Devang Kanuga, Zikai Li, Yuanxu Wu
  • Publication number: 20240420733
    Abstract: The present disclosure generally relates to spintronic material stacks and devices. The various disclosed embodiments of YBiPt based spin orbit torque (SOT) stacks can be used for high temperature applications. Disclosed herein are various buffer and/or interlayer configurations in spintronic stacks that can promote growth of YBiPt in the (110) orientation, to promote a high spin Hall angle (SHA) in SOT applications. One embodiment is a spintronic stack comprising a buffer layer comprising one or more layers, the one or more layers each individually comprising: MgO (100), TiN (100), Ta, Nb, HfN, Ta3W2 (110), TaW2 (100), Ta3W2N, TaW2N, or heated YPt, an SOT layer comprising YBiPt in the (110) orientation, an interlayer comprising one or more of MgO, Ta3WN, TaW3N, Ta3W (110), TaW3 (100), YPt (110), NiFeGeN, NiAlN, NiAl, NiFeGe, NiAlGe, or HfN, and a ferromagnetic layer.
    Type: Application
    Filed: June 11, 2024
    Publication date: December 19, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Brian R. YORK, Sharon Swee Ling BANH, Hassan OSMAN, Hisashi TAKANO
  • Publication number: 20240420732
    Abstract: The present disclosure generally relates to a magnetic recording head comprising a read head. The read head comprises a sensor disposed at a media facing surface (MFS) and a spin generator spaced from the sensor and recessed from the MFS. The sensor and spin generators are disposed on a non-magnetic layer. The sensor comprises a free layer and the spin generator comprises at least one spin orbit torque (SOT) layer. The SOT layer may comprise topological material such as BiSb. The sensor is configured to detect a read signal using a first voltage lead and a second voltage lead. The spin generator is configured to inject spin current through the non-magnetic layer to the sensor using a first current lead and a second current lead. The shape of the non-magnetic layer is a triangular or trapezoidal shape to further concentrate spin current.
    Type: Application
    Filed: September 13, 2023
    Publication date: December 19, 2024
    Applicants: Western Digital Technologies, Inc., Tokyo Institute of Technology
    Inventors: Quang LE, Xiaoyong LIU, Brian R. YORK, Cherngye HWANG, Son T. LE, Hisashi TAKANO, Fan TUO, Hassan OSMAN, Nam Hai PHAM
  • Publication number: 20240419923
    Abstract: One example method includes selecting an entry from a validation set based on similarity to a first communication record, wherein the entry from the validation set includes a second communication record and a corresponding summary of the second communication record; generating a prompt that includes the first communication record, the second communication record, and the corresponding summary of the second communication record; inputting the prompt to a first language model to obtain a generated summary of the first communication record; and training a second language model based on the first communication record and the generated summary.
    Type: Application
    Filed: June 14, 2024
    Publication date: December 19, 2024
    Applicant: Zoom Video Communications, Inc.
    Inventors: Shamil Chollampatt Muhammed Ashraf, Sathish Reddy Indurthi, Minh-Quang Pham, Marco Turchi
  • Publication number: 20240419606
    Abstract: An example device includes a first register storing a first vector comprised of a set of vector elements; a second register having a set of lanes and configured to store a second vector; and a storage that stores a set of control elements. Each such control element corresponds to a respective one of the vector elements of the set of vector elements in the first register. In addition, each control element of the set of control elements has a first portion that specifies, for the corresponding vector element of the set of vector elements, a lane of the set of lanes of the second register, and a second portion that specifies whether the corresponding vector element of the set of vector elements is to be routed to the lane specified by the first portion. The example device further includes processing circuitry to, based on an instruction that specifies the first register and the second register, generate the second vector based on the set of control elements.
    Type: Application
    Filed: August 22, 2024
    Publication date: December 19, 2024
    Inventors: Timothy David Anderson, Mujibur Rahman, Dheera Balasubramanian Samudrala, Peter Richard Dent, Duc Quang Bui
  • Publication number: 20240407693
    Abstract: The invention relates to a measurement device for measuring weak magnetic fields, such as fields in the sub-picotesla range (e.g. lower than a few nanotesla). The measurement device comprises ultrasensitive magnetic sensors (or arrays of ultrasensitive magnetic sensors) coupled to low-noise processing circuitry. The processing circuitry comprises a two-stage design including low-noise amplifiers and analog filters. The invention is suitable for magnetocardiovascular (MCV) applications thanks to its ability to measure very small magnetic fields with good accuracy and very little noise.
    Type: Application
    Filed: October 10, 2022
    Publication date: December 12, 2024
    Inventors: Quang Hung TRAN, Férial TERKI, Trung Kien NGUYEN, Gudrun BOGE, Sidina WANE, Azzedine BOUSSEKSOU
  • Publication number: 20240414233
    Abstract: Mechanisms for subscription and notification may include dynamically changing notification behavior based on notification target status or support access to notification history information.
    Type: Application
    Filed: June 18, 2024
    Publication date: December 12, 2024
    Inventors: Chonggang WANG, Gregory S. Sternberg, Shamim Akbar Rahman, Xu Li, Quang Ly, Catalina Mihaela Mladin
  • Publication number: 20240412759
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) device comprising a bismuth antimony (BiSb) layer. The SOT device comprises a seed layer and a BiSb layer having a (012) orientation. The seed layer comprises at least one of an amorphous/nanocrystalline material with a nearest neighbor x-ray diffraction peak with a d-spacing in the range of about 2.02 ? to about 2.20 ?; a polycrystalline material having a (111) orientation and an a-axis of about 3.53 ? to about 3.81 ?; and a polycrystalline material having a cubic (100) or tetragonal (001) orientation and an a-axis of about 4.1 ? to about 4.7 ?. When the seed layer comprises an amorphous material or a polycrystalline material having a (111), the BiSb layer is doped, and the seed layer has a lower a/c ratio than when the seed layer comprises polycrystalline material having a cubic (100) or tetragonal (001) orientation.
    Type: Application
    Filed: August 3, 2023
    Publication date: December 12, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Brian R. YORK, Cherngye HWANG, Xiaoyong LIU, Michael A. GRIBELYUK, Son T. LE, Hisashi TAKANO
  • Publication number: 20240414213
    Abstract: IoT service layer capabilities may be employed to automate and simplify the service enrollment process for IoT service subscribers/enrollees. These capabilities enable virtualization of a service subscriber and the physical IoT devices, applications, data and authorized users of the subscriber into a software profile that is representative of the subscriber. Once virtualized, a service subscriber may then delegate the complexities and burden of service enrollment to an automated IoT service enrollment software function.
    Type: Application
    Filed: June 13, 2024
    Publication date: December 12, 2024
    Inventors: Dale N. Seed, William Robert Flynn, IV, Quang Ly, Rocco Di Girolamo, Zhuo Chen, Catalina Mihaela Mladin, Shoshana Loeb, Mahmoud Watfa, Michael F. Starsinic, Vinod Kumar Choyi
  • Publication number: 20240411703
    Abstract: Disclosed embodiments include an electronic device having a processor core, a memory, a register, and a data load unit to receive a plurality of data elements stored in the memory in response to an instruction. All of the data elements hare the same data size, which is specified by one or more coding bits. The data load unit includes an address generator to generate addresses corresponding to locations in the memory at which the data elements are located, and a formatting unit to format the data elements. The register is configured to store the formatted data elements, and the processor core is configured to receive the formatted data elements from the register.
    Type: Application
    Filed: August 23, 2024
    Publication date: December 12, 2024
    Inventors: Timothy D. Anderson, Joseph Zbiciak, Duc Quang Bui, Abhijeet Chachad, Kai Chirca, Naveen Bhoria, Matthew D. Pierson, Daniel Wu, Ramakrishnan Venkatasubramanian
  • Patent number: 12164438
    Abstract: In a method of operating a computer system, an instruction loop is executed by a processor in which each iteration of the instruction loop accesses a current data vector and an associated current vector predicate. The instruction loop is repeated when the current vector predicate indicates the current data vector contains at least one valid data element and the instruction loop is exited when the current vector predicate indicates the current data vector contains no valid data elements.
    Type: Grant
    Filed: September 5, 2023
    Date of Patent: December 10, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Duc Quang Bui, Joseph Raymond Michael Zbiciak
  • Patent number: 12167500
    Abstract: Cellular devices are becoming more and more powerful, and may host a number of different non-cellular capabilities, such as cameras, accelerometers, and sensors. Today, these capabilities are used mainly to provide some service to the device or the device owner. Disclosed herein are methods and systems for enabling devices to register their device capabilities with a cellular network, providing a mechanism for Application Servers to discover non-cellular capabilities of the devices, providing a mechanism to have the Application Servers configure these non-cellular capabilities of the devices, and preparing the device and the network for cellular traffic generated as a result of the Application Server using these non-cellular capabilities.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: December 10, 2024
    Assignee: InterDigital Patent Holdings, Inc.
    Inventors: Rocco Di Girolamo, Catalina Mihaela Mladin, Hongkun Li, Michael F. Starsinic, Quang Ly, Dale N. Seed