Patents by Inventor R. Post

R. Post has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240114894
    Abstract: Stabilizing compositions for stabilizing a post-draw, but pre-analysis sample include, a saccharide, at least one heavy metal salt, and a pH from 5.9 to 8.0. The stabilizing compositions may include an aliphatic aldehyde, a buffer, and a preservative. The stabilizing compositions stabilize a sample for analysis. The analysis preformed on the stabilized cell may determine the state of a condition of interest, quantification of absolute cell counts, cellular activity, and qualitative analysis of cell types. Stabilizing a sample means that cells of the sample retain their biophysical properties, including biophysical properties of cell surface markers, for analysis. Preferably, the stabilizing compositions and methods may stabilize a sample for at least 16 days, and up to 30 days. The stabilizing compositions and methods may stabilize a sample for up to 180 days.
    Type: Application
    Filed: December 15, 2023
    Publication date: April 11, 2024
    Applicant: Chryos, LLC
    Inventors: Gregory R. Post, David Adle
  • Patent number: 11934860
    Abstract: Novel tools and techniques are provided for implementing network experience shifting, and, in particular embodiments, using either a roaming or portable hypervisor associated with a user or a local hypervisor unassociated with the user. In some embodiments, a network node in a first network might receive, via a first network access device in a second network, a request from a user device to establish roaming network access, and might authenticate a user associated with the user device, the user being unassociated with the first network access device. Based on a determination that the user is authorized to access data, content, profiles, and/or software applications that are accessible via a second network access device, the network node might establish a secure private connection through a hypervisor or container communicatively coupled to the first network access device to provide the user with access to her data, content, profiles, and/or software applications.
    Type: Grant
    Filed: October 20, 2022
    Date of Patent: March 19, 2024
    Assignee: CenturyLink Intellectual Property LLC
    Inventors: Charles I. Cook, Kevin M. McBride, Matthew J. Post, William R. Walker
  • Patent number: 11926988
    Abstract: A system and method for automatically adjusting the pitch of a work implement attached to a work vehicle, wherein the work implement has adjustable wings. The system and method include moving materials with a blade having an adjustable wing located at one end of a center portion of the blade. blade operatively connected to the work vehicle is positionable with respect to the work vehicle in response to an operator command. A commanded position of the blade is identified based on a blade positioning signal received from the operator command transmitted by an operator control device. An inclined position of the adjustable wing with respect to the center portion of the blade is identified. A pitch of the blade with respect to the work vehicle based is automatically adjusted based on the identified commanded position of the blade and the identified inclined position of the adjustable wing.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: March 12, 2024
    Assignee: DEERE & COMPANY
    Inventors: Giovanni A. Wuisan, Jeffrey M. Stenoish, Patrick J. Mulligan, Michael R. Tigges, Ryan R. Neilson, Nathan J. Horstman, Cory J. Brant, Timothy M. Post
  • Patent number: 11882823
    Abstract: Stabilizing compositions for stabilizing a post-draw, but pre-analysis sample include, a saccharide, at least one heavy metal salt, and a pH from 5.9 to 8.0. The stabilizing compositions may include an aliphatic aldehyde, a buffer, and a preservative. The stabilizing compositions stabilize a sample for analysis. The analysis preformed on the stabilized cell may determine the state of a condition of interest, quantification of absolute cell counts, cellular activity, and qualitative analysis of cell types. Stabilizing a sample means that cells of the sample retain their biophysical properties, including biophysical properties of cell surface markers, for analysis. Preferably, the stabilizing compositions and methods may stabilize a sample for at least 16 days, and up to 30 days. The stabilizing compositions and methods may stabilize a sample for up to 180 days.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: January 30, 2024
    Inventors: Gregory R. Post, David Adle
  • Publication number: 20220387207
    Abstract: A shoulder brace includes a base layer having a first side and a second side, a side support coupled to the first side, and a sling attached to the side support and having a sling strap. A counterforce strap has a first end coupled to the second side of the base layer, and a second end attached to a portion of the sling strap. So configured, the counterforce strap applies a force to the sling strap in a direction toward the second side of the base layer to relieve pressure on a user's neck during use. In addition, a cold therapy device assembly is coupled to the shoulder brace and includes a cold therapy device having first and second portions and at least one connecting member attached to one of the first and second portions and configured to be attached to a portion of the shoulder brace.
    Type: Application
    Filed: June 3, 2021
    Publication date: December 8, 2022
    Inventor: William R. Post.
  • Publication number: 20220377856
    Abstract: A method by an electromagnetic device includes determining a pattern of electromagnetic energy absorbed by a load disposed inside a cavity into which electromagnetic radiation is directed and generating one or more maps of the pattern of electromagnetic energy absorbed by the load. The one or more maps comprises an indication of a distribution of heating within the load. The method further includes determining, based on the one or more maps, a plurality of sequences of operating parameter combinations configured so as to heat the load via absorption of the electromagnetic radiation in accordance with a target temperature profile with respect to the load. The method thus includes emitting electromagnetic radiation into the cavity based on the plurality of sequences of operating parameter combinations to achieve the target temperature profile with respect to the load.
    Type: Application
    Filed: May 10, 2021
    Publication date: November 24, 2022
    Inventors: Brian R. Patton, Pedro Martinez Lopez, Mohammad J Abu Saude, Jun Yeon Cho, Nigel A. Clarke, Marc Estruch Tena, Gustavo A. Guayaquil Sosa, Cathy Kim, Bob W. Cheng Lian, Jacob A. Marks, Santiago Ortega Avila, Ian D. Parker, Sergio Perdices-Gonzalez, Ernest R. Post, Sajid Sadi, Forrest G. Tran, Kushal K. Vyas
  • Publication number: 20190357526
    Abstract: Stabilizing compositions for stabilizing a post-draw, but pre-analysis sample include, a saccharide, at least one heavy metal salt, and a pH from 5.9 to 8.0. The stabilizing compositions may include an aliphatic aldehyde, a buffer, and a preservative. The stabilizing compositions stabilize a sample for analysis. The analysis preformed on the stabilized cell may determine the state of a condition of interest, quantification of absolute cell counts, cellular activity, and qualitative analysis of cell types. Stabilizing a sample means that cells of the sample retain their biophysical properties, including biophysical properties of cell surface markers, for analysis. Preferably, the stabilizing compositions and methods may stabilize a sample for at least 16 days, and up to 30 days. The stabilizing compositions and methods may stabilize a sample for up to 180 days.
    Type: Application
    Filed: January 19, 2018
    Publication date: November 28, 2019
    Applicant: Chryos, LLC
    Inventor: Gregory R. Post
  • Patent number: 8744977
    Abstract: Disclosed is an integrated global shipment system that provides end-to-end visibility of the movement of a package. The integrated global shipment system employs a shipment consolidating application for integrating one or more freight tracking systems with one or more end-delivery systems. As a result, shippers are provided with complete visibility of the movement of their shipments of goods from an origin country to a destination country and till the final consignees. In addition, the integrated shipment system significantly decreases the cost of managing inventories by providing a virtual inventory solution. Under this virtual inventory solution, suppliers are able to bypass distribution centers and delay allocation of goods until after the importation of goods into a destination country.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: June 3, 2014
    Assignee: United Parcel Service of America, Inc.
    Inventors: Alan Amling, George R. Post, David S. Zamsky, Kenneth T. Rankin, Stuart D. Marcus, Bruce L. Woods
  • Patent number: 8741720
    Abstract: A semiconductor device and method to form a semiconductor device is described. The semiconductor includes a gate stack disposed on a substrate. Tip regions are disposed in the substrate on either side of the gate stack. Halo regions are disposed in the substrate adjacent the tip regions. A threshold voltage implant region is disposed in the substrate directly below the gate stack. The concentration of dopant impurity atoms of a particular conductivity type is approximately the same in both the threshold voltage implant region as in the halo regions. The method includes a dopant impurity implant technique having sufficient strength to penetrate a gate stack.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: June 3, 2014
    Assignee: Intel Corporation
    Inventors: Giuseppe Curello, Ian R. Post, Nick Lindert, Walid M. Hafez, Chia-Hong Jan, Mark T. Bohr
  • Publication number: 20130224926
    Abstract: A semiconductor device and method to form a semiconductor device is described. The semiconductor includes a gate stack disposed on a substrate. Tip regions are disposed in the substrate on either side of the gate stack. Halo regions are disposed in the substrate adjacent the tip regions. A threshold voltage implant region is disposed in the substrate directly below the gate stack. The concentration of dopant impurity atoms of a particular conductivity type is approximately the same in both the threshold voltage implant region as in the halo regions. The method includes a dopant impurity implant technique having sufficient strength to penetrate a gate stack.
    Type: Application
    Filed: April 5, 2013
    Publication date: August 29, 2013
    Inventors: Giuseppe Curello, Ian R. Post, Nick Lindert, Walid M. Hafez, Chai-Hong Jan, Mark T. Bohr
  • Patent number: 8459163
    Abstract: An action breech assembly features a one-piece action housing movable between a horizontal at rest position and a vertical cocked position to move a cocking plunger rearwardly as a result of a lateral offset between a pivot pin on which the housing is mounted and a plunger stop pin to which the plunger is attached. Pressure relief devices are provided for the powder chamber. An adjustable sizing die permits the amount of material removed from an external portion of a bullet to be adjusted to optimize the performance of the bullet in a particular rifle barrel.
    Type: Grant
    Filed: March 12, 2012
    Date of Patent: June 11, 2013
    Inventor: Thomas R Post
  • Patent number: 8426927
    Abstract: A semiconductor device and method to form a semiconductor device is described. The semiconductor includes a gate stack disposed on a substrate. Tip regions are disposed in the substrate on either side of the gate stack. Halo regions are disposed in the substrate adjacent the tip regions. A threshold voltage implant region is disposed in the substrate directly below the gate stack. The concentration of dopant impurity atoms of a particular conductivity type is approximately the same in both the threshold voltage implant region as in the halo regions. The method includes a dopant impurity implant technique having sufficient strength to penetrate a gate stack.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: April 23, 2013
    Assignee: Intel Corporation
    Inventors: Giuseppe Curello, Ian R. Post, Nick Lindert, Walid M. Hafez, Chia-Hong Jan, Mark T. Bohr
  • Patent number: 8174060
    Abstract: A method of selectively forming a spacer on a first class of transistors and devices formed by such methods. The method can include depositing a conformal first deposition layer on a substrate with different classes of transistors situated thereon, depositing a blocking layer to at least one class of transistors, dry etching the first deposition layer, removing the blocking layer, depositing a conformal second deposition layer on the substrate, dry etching the second deposition layer and wet etching the remaining first deposition layer. Devices may include transistors of a first class with larger spacers compared to spacers of transistors of a second class.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: May 8, 2012
    Assignee: Intel Corporation
    Inventors: Giuseppe Curello, Ian R. Post, Chia-Hong Jan, Mark Bohr
  • Patent number: 8154067
    Abstract: A method of selectively forming a spacer on a first class of transistors and devices formed by such methods. The method can include depositing a conformal first deposition layer on a substrate with different classes of transistors situated thereon, depositing a blocking layer to at least one class of transistors, dry etching the first deposition layer, removing the blocking layer, depositing a conformal second deposition layer on the substrate, dry etching the second deposition layer and wet etching the remaining first deposition layer. Devices may include transistors of a first class with larger spacers compared to spacers of transistors of a second class.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: April 10, 2012
    Assignee: Intel Corporation
    Inventors: Giuseppe Curello, Ian R. Post, Chia-Hong Jan, Mark Bohr
  • Patent number: 8132348
    Abstract: An action breech assembly features a one-piece action housing movable between a horizontal at rest position and a vertical cocked position to move a cocking plunger rearwardly as a result of a lateral offset between a pivot pin on which the housing is mounted and a plunger stop pin to which the plunger is attached. Pressure relief devices are provided for the powder chamber.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: March 13, 2012
    Inventor: Thomas R Post
  • Publication number: 20110215422
    Abstract: A semiconductor device and method to form a semiconductor device is described. The semiconductor includes a gate stack disposed on a substrate. Tip regions are disposed in the substrate on either side of the gate stack. Halo regions are disposed in the substrate adjacent the tip regions. A threshold voltage implant region is disposed in the substrate directly below the gate stack. The concentration of dopant impurity atoms of a particular conductivity type is approximately the same in both the threshold voltage implant region as in the halo regions. The method includes a dopant impurity implant technique having sufficient strength to penetrate a gate stack.
    Type: Application
    Filed: May 13, 2011
    Publication date: September 8, 2011
    Inventors: Giuseppe Curello, Ian R. Post, Nick Lindert, Walid M. Hafez, Chia-Hong Jan, Mark T. Bohr
  • Publication number: 20110157854
    Abstract: A method of selectively forming a spacer on a first class of transistors and devices formed by such methods. The method can include depositing a conformal first deposition layer on a substrate with different classes of transistors situated thereon, depositing a blocking layer to at least one class of transistors, dry etching the first deposition layer, removing the blocking layer, depositing a conformal second deposition layer on the substrate, dry etching the second deposition layer and wet etching the remaining first deposition layer. Devices may include transistors of a first class with larger spacers compared to spacers of transistors of a second class.
    Type: Application
    Filed: March 4, 2011
    Publication date: June 30, 2011
    Inventors: Giuseppe Curello, Ian R. Post, Chia-Hong Jan, Mark Bohr
  • Patent number: 7943468
    Abstract: A semiconductor device and method to form a semiconductor device is described. The semiconductor includes a gate stack disposed on a substrate. Tip regions are disposed in the substrate on either side of the gate stack. Halo regions are disposed in the substrate adjacent the tip regions. A threshold voltage implant region is disposed in the substrate directly below the gate stack. The concentration of dopant impurity atoms of a particular conductivity type is approximately the same in both the threshold voltage implant region as in the halo regions. The method includes a dopant impurity implant technique having sufficient strength to penetrate a gate stack.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: May 17, 2011
    Assignee: Intel Corporation
    Inventors: Giuseppe Curello, Ian R. Post, Nick Lindert, Walid M. Hafez, Chia-Hong Jan, Mark T. Bohr
  • Publication number: 20110055102
    Abstract: Disclosed is an integrated global shipment system that provides end-to-end visibility of the movement of a package. The integrated global shipment system employs a shipment consolidating application for integrating one or more freight tracking systems with one or more end-delivery systems. As a result, shippers are provided with complete visibility of the movement of their shipments of goods from an origin country to a destination country and till the final consignees. In addition, the integrated shipment system significantly decreases the cost of managing inventories by providing a virtual inventory solution. Under this virtual inventory solution, suppliers are able to bypass distribution centers and delay allocation of goods until after the importation of goods into a destination country.
    Type: Application
    Filed: November 10, 2010
    Publication date: March 3, 2011
    Inventors: Alan Amling, George R. Post, David S. Zamsky, Kenneth T. Rankin, Stuart D. Marcus, Bruce L. Woods
  • Patent number: D636864
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: April 26, 2011
    Inventor: Joseph R. Post