Abstract: Techniques are disclosed relating to providing data views from a time-series data lake to a data warehousing system. In various embodiments, the disclosed techniques include providing, by a cloud-based service, a data lake service that maintains a time-series data lake storing a time-series representation of data from a plurality of data sources associated with a first organization. In some embodiments, the cloud-based service may receive additional backup data, including a first backup image of a first data source, associated with the first organization as part of a backup operation. The cloud-based service may then store a logical backup of the first data source in the data lake and, in response to a query from a data warehousing system, the cloud-based service may retrieve a particular view of the backup data from the data lake and provide it to the data warehousing system.

Abstract: Techniques are disclosed relating to data preservation using a time-series data lake. For example, in some embodiments, the disclosed techniques include maintaining, by a cloud-based service, a time-series data lake that includes, for an organization, a time-series representation of a plurality of data sources associated with the organization. In various embodiments, the time-series data lake retains data according to a first retention policy. In response to a request for a subset of data that is associated with the organization, the cloud-based service may retrieve the subset of data from the time-series data lake and then store the subset of data in a particular storage location that retains data according to a second, different retention policy.

Abstract: Techniques are disclosed relating to the storage of backup data using a time-series data lake. For example, in various embodiments, the disclosed techniques include providing a cloud-based data lake service that maintains data for a plurality of organizations and where, for a first organization, the cloud-based data lake service maintains a time-series data lake that stores a time-series representation of data associated with the first organization. In various embodiments, the data lake service may receive backup data from a plurality of data sources associated with the first organization, generate metadata associated with the backup data, and store the backup data, along with the corresponding metadata, in the time-series data lake.

Abstract: Techniques are disclosed relating to the retrieval of data from a time-series data lake. For example, in various embodiments, the disclosed techniques include providing, by a cloud-based service, a data lake service that maintains data for a plurality of organizations and where, for a first organization, the data lake service maintains a time-series data lake that stores a time-series representation of backup data associated with the first organization. The cloud-based service may receive a request, including one or more search criteria, for data associated with the first organization and, based on the search criteria, retrieve a particular view of the backup data that is stored in the data lake. In various embodiments, the particular view may include backup data from various different data sources and from various different points in time. The cloud-based service may then provide the particular view of the backup data to the requesting entity.

Abstract: Embodiments provide methods and systems of enabling an electronic payment from a merchant device using customer credential when a customer does not have mobile device or card with him. The customer enters customer credential, associated with a customer wallet, on a merchant wallet application accessible in the merchant device. The customer credential and merchant credential are transmitted to a server system associated with a payment network. The server system validates the customer credential, generates and transmits a pull payment request to a customer wallet server for approval of the payment request for transferring funds from customer wallet to the merchant wallet. After the approval, the server system transmits the successful payment response to the merchant device.

Abstract: The present disclosure involves systems, software, and computer implemented methods for a remittance system that pre-populates remittance data based on historical usage of remittance transactions. One example system includes operations to generate, using a predictive model, data indicating a predicted likelihood of a user selecting at least one data exchange transaction, wherein the data indicates the predicted likelihood of the user performing the at least one data exchange transaction. A request is received to access a remittance page. In response, the at least one data exchange transaction that was previously generated is selected from a repository of predicted likelihoods. Remittance data associated with a UI element is generated that includes the at least one data exchange transaction. The remittance data is transmitted to the device. An indication from the device is received for interacting with the UI element. The data exchange transaction is executed in response to receiving the indication.

Abstract: This disclosure provides methods, devices and systems for neighbor awareness networking extension to 6 GHz networks. A method is provided that may be performed by a wireless communication device. The wireless communication device discovers one or more peer devices in a neighborhood aware network (NAN) on a first radio frequency band. The wireless communication device discovers a capability of at least one of the one or more peer devices for communicating on a 6 GHz radio frequency band and/or publishes a capability of the wireless communication device for communicating on the 6 GHz radio frequency band. The wireless communication device establishes a NAN device link with the at least one peer device on the 6 GHz radio frequency band.

Abstract: Described herein are microbial stimulating compounds that act as a surfactant to increase fermentation. Also described are methods for enhancing fermentation utilizing these compounds as well as methods for the producing the compounds from lignocellulosic biomass and biomass components during high temperature reactions with alcohols. The stimulating compounds can be produced from a variety of polysaccharides or sugars.

Abstract: An adder with first and second majority gates. For a 1-bit adder, output from a 3-input majority gate is inverted and input two times to a 5-input majority gate. Other inputs to the 5-input majority gate are same as those of the 3-input majority gate. The output of the 5-input majority gate is a sum while the output of the 3-input majority gate is the carry. Multiple 1-bit adders are concatenated to form an N-bit adder. The input signals are driven to first terminals of non-ferroelectric capacitors while the second terminals are coupled to form a majority node. Majority function of the input signals occurs on this node. The majority node is then coupled to a first terminal of a non-linear polar capacitor. The second terminal of the capacitor provides the output of the logic gate. A reset mechanism initializes the non-linear polar capacitor before addition function is performed.

Abstract: The present disclosure relates to a process to reduce total acid number (TAN) of a heat transfer fluid. The process comprises contacting the heat transfer fluid with an adsorbent composition at a temperature in the range of 50° C. to 350° C. and a pressure in the range of 1 bar to 10 bar to obtain a treated heat transfer fluid having total acid number (TAN) in the range of 0.003 to 0.03 and pH in the range of 6 to 7.5, wherein the adsorbent composition is provided in a fixed bed and the heat transfer fluid is passed through the fixed bed comprising the adsorbent composition at a liquid hourly space velocity (LHSV) in the range of 0.5 per hour to 10 per hour.

Abstract: An adder uses with first and second majority gates. For a 1-bit adder, output from a 3-input majority gate is inverted and input two times to a 5-input majority gate. Other inputs to the 5-input majority gate are the same as those of the 3-input majority gate. The output of the 5-input majority gate is a sum while the output of the 3-input majority gate is the carry. Multiple 1-bit adders are concatenated to form an N-bit adder. The input signals to the majority gates can be analog, digital, or a combination of them, which are driven to first terminals of non-ferroelectric capacitors. The second terminals of the non-ferroelectric capacitors are coupled to form a majority node. Majority function of the input signals occurs on this node. The majority node is then coupled to a first terminal of a non-linear polar capacitor. The second terminal of the capacitor provides the output of the logic gate.

Abstract: An adder with first and second majority gates is provided. For a 1-bit adder, output from a 3-input majority gate is inverted and input two times to a 5-input majority gate. Other inputs to the 5-input majority gate are same as those of the 3-input majority gate. The output of the 5-input majority gate is a sum while the output of the 3-input majority gate is the carry. Multiple 1-bit adders are concatenated to form an N-bit adder. The input signals are driven to first terminals of non-ferroelectric capacitors while the second terminals are coupled to form a majority node. Majority function of the input signals occurs on this node. The majority node is then coupled to a first terminal of a non-linear polar capacitor. The second terminal of the capacitor provides the output of the logic gate. A reset mechanism initializes the non-linear polar capacitor before addition function is performed.

Abstract: The memory bit-cell formed using the ferroelectric capacitor results in a taller and narrower bit-cell compared to traditional memory bit-cells. As such, more bit-cells can be packed in a die resulting in a higher density memory that can operate at lower voltages than traditional memories while providing the much sought after non-volatility behavior. The pillar capacitor includes a plug that assists in fabricating a narrow pillar.

Abstract: A new class of logic gates are presented that use non-linear polar material. The logic gates include multi-input majority gates and threshold gates. Input signals in the form of analog, digital, or combination of them are driven to first terminals of non-ferroelectric capacitors. The second terminals of the non-ferroelectric capacitors are coupled to form a majority node. Majority function of the input signals occurs on this node. The majority node is then coupled to a first terminal of a capacitor comprising non-linear polar material. The second terminal of the capacitor provides the output of the logic gate, which can be driven by any suitable logic gate such as a buffer, inverter, NAND gate, NOR gate, etc. Any suitable logic or analog circuit can drive the output and inputs of the majority logic gate. As such, the majority gate of various embodiments can be combined with existing transistor technologies.

Abstract: Ferroelectric capacitor is formed by conformably depositing a non-conductive dielectric over the etched first and second electrodes, and forming a metal cap or helmet over a selective part of the non-conductive dielectric, wherein the metal cap conforms to portions of sidewalls of the non-conductive dielectric. The metal cap is formed by applying physical vapor deposition at a grazing angle to selectively deposit a metal mask over the selective part of the non-conductive dielectric. The metal cap can also be formed by applying ion implantation with tuned etch rate. The method further includes isotopically etching the metal cap and the non-conductive dielectric such that non-conductive dielectric remains on sidewalls of the first and second electrodes but not on the third and fourth electrodes.

Abstract: Approaches for integrating FE memory arrays into a processor, and the resulting structures are described. Simultaneous integrations of regions with ferroelectric (FE) cells and regions with standard interconnects are also described. FE cells include FE capacitors that include a FE stack of layers, which is encapsulated with a protection material. The protection material protects the FE stack of layers as structures for regular logic are fabricated in the same die.

Abstract: Ferroelectric capacitor is formed by conformably depositing a non-conductive dielectric over the etched first and second electrodes, and forming a metal cap or helmet over a selective part of the non-conductive dielectric, wherein the metal cap conforms to portions of sidewalls of the non-conductive dielectric. The metal cap is formed by applying physical vapor deposition at a grazing angle to selectively deposit a metal mask over the selective part of the non-conductive dielectric. The metal cap can also be formed by applying ion implantation with tuned etch rate. The method further includes isotopically etching the metal cap and the non-conductive dielectric such that non-conductive dielectric remains on sidewalls of the first and second electrodes but not on the third and fourth electrodes.

Abstract: The present application provides a method of optimizing fan usage in a cooling water system having a number of fans with a heat exchanger to cool a cooling fluid for use with a number of gas turbine subsystems. The method may include the steps of running all of the fans at base load, calculating a heat transfer capability of each fan at base load, calculating a temperature difference between an actual temperature and a target temperature of the cooling fluid, selecting a minimum target temperature of the cooling fluid, calculating a target thermal energy of the cooling fluid for the minimum target temperature, calculating a number of the fans to be turned on or off by dividing the target thermal energy with the heat transfer capability of each fan, and turn on or off the calculated number of fans in a predetermined manner with an objective of balancing the running hours of each fan.

Abstract: Described is a packaging technology to improve performance of an AI processing system. An IC package is provided which comprises: a substrate; a first die on the substrate, and a second die stacked over the first die. The first die includes memory and the second die includes computational logic. The first die comprises DRAM having bit-cells. The memory of the first die may store input data and weight factors. The computational logic of the second die is coupled to the memory of the first die. In one example, the second die is an inference die that applies fixed weights for a trained model to an input data to generate an output. In one example, the second die is a training die that enables learning of the weights. Ultra high-bandwidth is changed by placing the first die below the second die. The two dies are wafer-to-wafer bonded or coupled via micro-bumps.

Abstract: A method, apparatus, and computer program product are disclosed for facilitating two-way email communication in manner that obfuscates sender and recipient email addresses. The method includes receiving a correspondence request indication; assigning a first transaction address to a sender and a second transaction address to a recipient; receiving a message from the sender; associating the message from the sender with the first transaction address; and causing a transmission of the message from the sender to the recipient using the first transaction address. A corresponding apparatus and computer program product are also provided.