Patents by Inventor Rajesh

Rajesh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240232096
    Abstract: An embodiment of an integrated circuit may comprise an array of hardware counters, and circuitry communicatively coupled to the array of hardware counters, the circuitry to count accesses to one or more selected pages of a memory with the array of hardware counters. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: March 25, 2021
    Publication date: July 11, 2024
    Applicant: Intel Corporation
    Inventors: Sanjay Kumar, Phillip Lantz, Rajesh Sankaran, David Hansen, Evgeny V. Voevodin, Andrew Anderson, Lizhen You, Xin Zhou, Nikhil Talpallikar
  • Publication number: 20240236618
    Abstract: The present disclosure pertains to a system for delivering location information between a calling party and a called party call including a processor (202), communicatively coupled to a first mobile computing device (106), and a second mobile computing device (110). The first mobile computing device (106), and the second mobile computing device (110) can include a set of sensors configured to determine location of the first mobile computing device (106), and the second mobile computing device (110). The processor (202) can be configured to determine a first displayable location code and a second displayable location code and facilitates transmitting and displaying the first displayable location code to the second mobile computing device (110), and the second displayable location code to the first mobile computing device (106) in online mode. The system (102) can be configured to display the first displayable location code and the second displayable location code in form of audio, text, pop up.
    Type: Application
    Filed: February 22, 2022
    Publication date: July 11, 2024
    Inventors: Kaushal Bansal, Rajesh Kumar
  • Publication number: 20240231459
    Abstract: Methods, systems, and devices for power management and delivery for high bandwidth memory are described. A high bandwidth memory (HBM) device may include a power management integrated circuit (PMIC) and a voltage regulator integrated within an interface die of the HBM system or included as a separate chip within the HBM system stack. Accordingly, the HBM system may be supplied a higher voltage and may regulate the voltage to a desired power level, which may increase the total power available to the HBM system without increasing the quantity of microbumps. Additionally, a ground voltage, a positive voltage, or both, may be supplied to the HBM device via a back interface of the HBM device, which may reduce the quantity of microbumps at a front interface. In some examples, a modified heatsink assembly may supply the ground voltage, the positive voltage, or both, to the HBM system.
    Type: Application
    Filed: December 29, 2023
    Publication date: July 11, 2024
    Inventor: Rajesh H. Kariya
  • Publication number: 20240236796
    Abstract: Systems, method sand computer readable medium are provided for proving real-time Self Optimizing Network (SON) Virtual Network Function (VRF) included as part of the HNG. In one embodiment data from connected devices is forwarded to the HNG; the data is organized into virtualized containers; and the data is processed by agile analytics and results are displayed to a user.
    Type: Application
    Filed: March 19, 2024
    Publication date: July 11, 2024
    Inventors: Rajesh Kumar Mishra, Michael Silva
  • Publication number: 20240232210
    Abstract: A method of ranking recommendations includes receiving a recommendation to improve asset utilization of at least one asset, detecting, via one or more user interfaces, user interaction with one or more other recommendations related to the recommendation, the user interaction indicating user interest in the one or more other recommendations related to the recommendation, calculating a score for the recommendation based on the user interest in the one or more other recommendations related to the recommendation, and performing an action that affects a utilization of the at least one asset based on at least one of the score or the recommendation.
    Type: Application
    Filed: December 29, 2023
    Publication date: July 11, 2024
    Inventors: Rajesh Nayak, Vineet Binodshanker Sinha, Joe S. Stangarone
  • Publication number: 20240231924
    Abstract: It is provided an apparatus comprising interface circuitry, machine-readable instructions, and processing circuitry to execute the machine-readable instructions. The machine-readable instructions comprise instructions to identify a processing flow pattern of a large language model, LLM, wherein the LLM is executed on a processor circuitry comprising a plurality of processor cores and wherein the processing flow pattern comprising a plurality of processing phases. The machine-readable instructions further comprise instructions to identify a processing phase of the LLM from the processing flow pattern. The machine-readable instructions further comprise instructions to allocate processing resources to the processor circuitry based on the identified processing phase of the LLM.
    Type: Application
    Filed: March 27, 2024
    Publication date: July 11, 2024
    Inventors: Sharanyan SRIKANTHAN, Karthik KUMAR, Francesc GUIM BERNAT, Rajesh POORNACHANDRAN, Marcos CARRANZA
  • Publication number: 20240228520
    Abstract: The present patent application discloses the compounds according to Formula I shown below, or pharmaceutically acceptable salts thereof, wherein JB, n, R1, R2, R3, R4, R5, m and X as defined herein.
    Type: Application
    Filed: September 1, 2023
    Publication date: July 11, 2024
    Inventors: James Edward Sheppeck, Paul Allan Renhowe, Ara Mermerian, Timothy Claude Barden, Glen Robert Rennie, Rajesh R. Iyengar, Takashi Nakai
  • Publication number: 20240232622
    Abstract: Apparatus, articles of manufacture, and methods for managing processing units are disclosed. An example apparatus includes first processor circuitry to implement a central processing unit and second processor circuitry to perform at least one of first operations, second operations or third operations to obtain a resource request associated with a first workload; determine if a processing resource of a programmable network device is available to perform processing for the workload; determine if a second workload can be migrated from execution on the programmable network device; based on the determination that the second workload can be migrated, cause the second workload to be migrated; and cause the first workload to execute on the processing resource of the programmable network device.
    Type: Application
    Filed: June 23, 2022
    Publication date: July 11, 2024
    Inventors: Rajesh Poornachandran, Kaushik Balasubramanian, Karan Puttannaiah
  • Publication number: 20240237316
    Abstract: One example discloses an on-chip shielded device, including: a planar structure including a substrate and a passivation layer; an electrical component formed within the substrate and coupled to an input signal path and an output signal path; a first shielding element positioned above the electrical component and the passivation layer; and a second shielding element positioned above the electrical component, the passivation layer and the first shielding element.
    Type: Application
    Filed: October 21, 2022
    Publication date: July 11, 2024
    Inventors: Philipp Franz Freidl, Mustafa Acar, Antonius Hendrikus Jozef Kamphuis, Erik Daniel Björk, Konstantinos Giannakidis, Jan Willem Bergman, Rajesh Mandamparambil, Paul Mattheijssen
  • Publication number: 20240226226
    Abstract: The present disclosure provides compositions, methods and kits for treatment of pruritus (itch) in an individual. The compositions, methods, and kits are for administering an implant comprising a kappa-opioid receptor agonist to an individual, where the implant comprises a sustained release composition comprising a kappa-opioid receptor agonist and a biocompatible polymeric matrix. Implantation of the device allows a controlled release of kappa-opioid receptor agonist for an extended period of time. The implant may be implanted subcutaneously in an individual in need of continuous treatment with a kappa-opioid receptor agonist for treatment and relief of pruritus.
    Type: Application
    Filed: April 14, 2022
    Publication date: July 11, 2024
    Inventors: Katherine BEEBE DEVARNEY, Marc RUBIN, Rajesh A. PATEL, Sunil SREEDHARAN
  • Publication number: 20240231801
    Abstract: The technology disclosed herein includes getting a system update configuration for managing updating of at least one of a software component and a firmware component of a computing system powered by a battery; determining an estimated system update time of usage of the battery to update the at least one of the software component and the firmware component based at least in part on the system update configuration; updating the at least one of the software component and the firmware component when resource requirements of the system update configuration are met and the estimated system update time is less than or equal to a minimum remaining time of usage of the battery; and deferring the updating when the resource requirements of the system update configuration are not met or the estimated system update time is greater than the minimum remaining time of usage of the battery.
    Type: Application
    Filed: May 26, 2022
    Publication date: July 11, 2024
    Applicant: Intel Corporation
    Inventors: Subrata BANIK, Rajesh POORNACHANDRAN, Vincent ZIMMER, Utkarsh Y. KAKAIYA
  • Publication number: 20240230778
    Abstract: Battery testing and monitoring by determining battery characteristics such as an increase thickness of the battery SEI layer, extent of lithium-ion plating, loss of cyclable lithium, dendrite growth (and extent), and/or other characteristics that may impact the performance and/or safety of a lithium-ion battery. The battery characteristics may be determined at perioding intervals using test data that includes voltage and current at various charging levels and state of charge, thus providing impedance profiles that can be compared to modelled and/or known thresholds of battery conditions.
    Type: Application
    Filed: January 9, 2024
    Publication date: July 11, 2024
    Inventors: Jayant Vitthal SARLASHKAR, Venkata Rajesh CHUNDRU, Bapiraju SURAMPUDI
  • Patent number: 12033222
    Abstract: An electronic social network can be provided that unifies products and services of one or more entities, such as financial institutions. Users of the social network can provide input regarding one or more products or services. Feedback can be solicited from other users of the social network regarding the input, and a score can be generated for a user that represents a level of agreement of the other users. A recommendation is generated and conveyed to users of the social network based on the score and user profile of the user associated with the score.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: July 9, 2024
    Assignee: Wells Fargo Bank, N.A.
    Inventors: Chandrasekaran Sivaraman, Priya R. Radia, Ashalatha Seetharam, Susmita Santra, Manas Ranjan Sahu, Mothi Mai Malli Viswanathan, Rajesh P. Mannachery, Shanmukeswara Rao Donkada
  • Patent number: 12035529
    Abstract: Aspects of the disclosure relate to forming a completed stack of layers. Forming the completed stack of layers may include forming a first stack of layers on a first substrate and forming a second stack of layers on a second substrate. The first stack of layers may be bonded to the second stack of layers. The first or second substrate may be removed. Prior to bonding the first stack of layers and the second stack of layer, one or more holes may be etched in the first stack of layers. After removing the second substrate, one or more holes may be etched in the second stack of layers, wherein each of the one or more holes in the second stack of layers extend into a corresponding hole in the one or more holes in the first stack of layers.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: July 9, 2024
    Assignee: Adeia Semiconductor Inc.
    Inventors: Rajesh Katkar, Xu Chang, Belgacem Haba
  • Patent number: 12034566
    Abstract: Methods and systems to operate an Ethernet ring protection switching (ERPS) network. In one embodiment, a method performed by a network device in the ERPS network device is disclosed. The ERPS network comprises a major ring and a sub-ring, where the network device is a first interconnection network device that is on both major ring and sub-ring. The method comprises determining that a topology change notification is received from the sub-ring, identifying a link that is coupled to the network device and that is towards a second interconnection network device, where the second interconnection network device is also on both major ring and sub-ring. The method further comprises terminating the topology change notification and transmitting a first message using the link towards the second interconnection network device, where the first message is a filtering database (FDB) flush message.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: July 9, 2024
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Gangadhara Reddy Chavva, Rajesh Kumar Meduri, Nallamothu Pardhasaradhi
  • Patent number: 12032509
    Abstract: A system for camera serial interface lane implementation between camera sensor and host processor is disclosed. An input data receiving unit receives first input signal from a first camera sensor in at least one of a two-lane camera serial interface configuration (CSI) or a four-lane CSI configuration; receives second input signal from a second camera sensor in the two-lane CSI. A data selector device selecting a first port for forwarding input signal when the first input signal is received in the two-lane CSI, selecting a second port for forwarding the input signal when the first input signal is obtained in the four-lane CSI configuration. A host processor block including a first receiver block to generate a first output signal when the first input signal is received from the first port, a second receiver block generates a second output signal when the first input signal is obtained from the second port.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: July 9, 2024
    Assignee: E-CON SYSTEMS INDIA PRIVATE LIMITED
    Inventor: Rajesh K
  • Patent number: 12034990
    Abstract: Systems and methods are provided for determining whether to extend a recording of a media asset based on analyzing user data. A media guidance application may determine that a media asset is recording during a scheduled time slot that has a start time and an end time. The media guidance application may determine that the media asset will be transmitted outside of the scheduled time slot based on inputs from a plurality of users. In response to determining that the media asset will be transmitted outside of the scheduled time, the media guidance application may extend the recording of the media asset beyond the scheduled time slot by a predetermined amount of time.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: July 9, 2024
    Assignee: Rovi Guides, Inc.
    Inventor: Rajesh Khanna
  • Patent number: 12033493
    Abstract: In some embodiments, methods and systems are provided for managing emergency notifications and incident reports at a commercial facility. A graphical interface enables a worker associated with a facility to input information regarding an ongoing/impending emergency event, e.g., Active Threat, Acts of Violence, Fire/Explosion, Injury, Power Failure, Missing Child, Severe Weather, Robbery, Hazmat, Bomb Threat, Covid-19, Store Closure, Special Events etc. This information is processed via an analytical engine that evaluates the entered information in view of various business rules in order to identify the appropriate workers to notify, and generates and transmits the notifications to the employees determined to be suitable for receiving a notification. In response to the generation of the emergency notification, an incident report engine evaluates the entered emergency, and automatically generates an incident report, which may be later accessed and/or modified by workers having a suitable employee access level.
    Type: Grant
    Filed: May 9, 2023
    Date of Patent: July 9, 2024
    Assignee: Walmart Apollo, LLC
    Inventors: Tanvi Chopra, Grace K. Shea, Sharon Grayce Randolph, David M. Nelms, Rajesh Singh, Kartik S. Soni
  • Patent number: 12033687
    Abstract: Computer memory systems employing localized generation of a global bit line (GBL) clock signal to reduce clock signal read path divergence for improved signal tracking, and related methods. The memory system includes one or more memory banks that each include a memory array comprised memory bit cells organized in respective memory row and memory column circuits. A global bit line (GBL) keeper circuit in a GBL control path in the memory system is coupled to the GBLs to latch output read data from a word line path in a selected memory row circuit of a selected memory bank in a read operation. To improve tracking of timing of the GBL control path with the word line paths in the memory row circuits, a GBL clock signal and local WL clock signal in a given memory bank are separately sourced from a source clock locally within the selected memory bank.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: July 9, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Rajesh Kumar, Sai Prakash Reddy Bijivemula
  • Patent number: 12034440
    Abstract: Systems, apparatuses, and methods for implementing a combo scheme for direct current (DC) level shifting of signals are disclosed. A receiver circuit receives an input signal on a first interface. The first interface is coupled to a resistor in parallel with a capacitor which passes the input signal to a second interface. Also, the first interface is coupled to a first pair of current sources between ground and a voltage source, and the second interface is coupled to a second pair of current sources between ground and the voltage source. An op-amp drives the current sources based on a difference between a sensed common mode voltage and a reference voltage. Based on this circuit configuration, the receiver circuit is able to prevent baseline wander, perform a DC level shift of the input signal, and achieve linear equalization of the input signal.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: July 9, 2024
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Rajesh Kumar, Edoardo Prete, Gerald R. Talbot, Ethan Crain, Tracy J. Feist, Jeffrey Cooper