Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. The structure includes: an extrinsic base region within a semiconductor substrate material; a shallow trench isolation structure extending into the semiconductor substrate material and bounding the extrinsic base region; an emitter region adjacent to the shallow trench isolation structure and on a side of the extrinsic base region; and a collector region adjacent to the shallow trench isolation structure and on an opposing side of the extrinsic base region.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to high-electron-mobility transistors and methods of manufacture. A structure includes: a semiconductor layer on a semiconductor material; a gate structure on the semiconductor layer; a drain region comprising the semiconductor layer and which is adjacent to the gate structure; an ohmic contact which includes at least one terminal connection connecting to the semiconductor material, the ohmic contact being adjacent to the drain region and spaced away from the gate structure; and a capacitance reducing structure adjacent to the drain region.

Abstract: A fastening system has a conditioner clamp and a penetrating fastener. The conditioner clamp has an upper assembly and a lower assembly attachable together to define a conductor cavity therebetween. At least one threaded opening provides ingress into the conductor cavity. The penetrating fastener is extendable through the at least one threaded opening. The penetrating fastener has a threaded bolt and a penetrating portion with a proximal end at a second end region of the threaded bolt and a distal end spaced therefrom. The penetrating portion has a frustoconical configuration terminating at a tip portion. The tip portion is configured to penetrate into a conductor positioned within the conductor cavity.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. The structure includes: an extrinsic base region within a semiconductor substrate material; a shallow trench isolation structure extending into the semiconductor substrate material and bounding the extrinsic base region; an emitter region adjacent to the shallow trench isolation structure and on a side of the extrinsic base region; and a collector region adjacent to the shallow trench isolation structure and on an opposing side of the extrinsic base region.

Abstract: A fastening system has a conditioner clamp and a penetrating fastener. The conditioner clamp has an upper assembly and a lower assembly attachable together to define a conductor cavity therebetween. At least one threaded opening provides ingress into the conductor cavity. The penetrating fastener is extendable through the at least one threaded opening. The penetrating fastener has a threaded bolt and a penetrating portion with a proximal end at a second end region of the threaded bolt and a distal end spaced therefrom. The penetrating portion has a frustoconical configuration terminating at a tip portion. The tip portion is configured to penetrate into a conductor positioned within the conductor cavity.

Abstract: A fastening system has a conditioner clamp and a penetrating fastener. The conditioner clamp has an upper assembly and a lower assembly attachable together to define a conductor cavity therebetween. At least one threaded opening provides ingress into the conductor cavity. The penetrating fastener is extendable through the at least one threaded opening. The penetrating fastener has a threaded bolt and a penetrating portion with a proximal end at a second end region of the threaded bolt and a distal end spaced therefrom. The penetrating portion has a frustoconical configuration terminating at a tip portion. The tip portion is configured to penetrate into a conductor positioned within the conductor cavity.

Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer.

Abstract: A torque limiting fastener comprises a body. The body defines a first body portion and a second body portion that extend from a first end of the body to a second end of the body. The body comprises an inner surface extending from the first end of the body to the second end of the body. The body further comprises an outer surface extending from the first end of the body to the second end of the body. The body yet further comprises an inner threadform extending substantially along a length of the inner surface of the second body portion and a controlled break region. The controlled break region is disposed at an intersection of the first body portion and the second body portion. The controlled break region includes an outer surface break point formed into the outer surface and an inner surface break point formed into the inner surface.

Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer.

Abstract: A torque limiting fastener comprises a body. The body defines a first body portion and a second body portion that extend from a first end of the body to a second end of the body. The body comprises an inner surface extending from the first end of the body to the second end of the body. The body further comprises an outer surface extending from the first end of the body to the second end of the body. The body yet further comprises an inner threadform extending substantially along a length of the inner surface of the second body portion and a controlled break region. The controlled break region is disposed at an intersection of the first body portion and the second body portion. The controlled break region includes an outer surface break point formed into the outer surface and an inner surface break point formed into the inner surface.

Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer.

Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer.

Abstract: A design structure for an integrated radio frequency (RF) filter on a backside of a semiconductor substrate includes: a device on a first side of a substrate; a radio frequency (RF) filter on a backside of the substrate; and at least one substrate conductor extending from the front side of the substrate to the backside of the substrate and electrically coupling the RF filter to the device.

Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer.

Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer.

Abstract: Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed to be in contact with at least one piezoelectric substrate. The method further includes forming a micro-electro-mechanical structure (MEMS) comprising a MEMS beam in which, upon actuation, the MEMS beam will turn on the at least one piezoelectric filter structure by interleaving electrodes in contact with the piezoelectric substrate or sandwiching the at least one piezoelectric substrate between the electrodes.

Abstract: A semiconductor device may include a transistor gate in a device layer; an interconnect layer over the device layer; and an air gap extending through the interconnect layer to contact an upper surface of the transistor gate. The air gap provides a mechanism to reduce both on-resistance and off-capacitance for applications using SOI substrates such as radio frequency switches.

Abstract: Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed to be in contact with at least one piezoelectric substrate. The method further includes forming a micro-electro-mechanical structure (MEMS) comprising a MEMS beam in which, upon actuation, the MEMS beam will turn on the at least one piezoelectric filter structure by interleaving electrodes in contact with the piezoelectric substrate or sandwiching the at least one piezoelectric substrate between the electrodes.

Abstract: Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed to be in contact with at least one piezoelectric substrate. The method further includes forming a micro-electro-mechanical structure (MEMS) comprising a MEMS beam in which, upon actuation, the MEMS beam will turn on the at least one piezoelectric filter structure by interleaving electrodes in contact with the piezoelectric substrate or sandwiching the at least one piezoelectric substrate between the electrodes.

Abstract: A semiconductor device may include a transistor gate in a device layer; an interconnect layer over the device layer; and an air gap extending through the interconnect layer to contact an upper surface of the transistor gate. The air gap provides a mechanism to reduce both on-resistance and off-capacitance for applications using SOI substrates such as radio frequency switches.