Patents by Inventor Randy L. Wolf
Randy L. Wolf has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150024693Abstract: Disclosed are test structures for radio frequency (RF) power stress and characterization. Each test structure incorporates a single device and is selectively operated in either a stress mode, during which the device is stressed under RF power, or in an analysis mode, during which the impact of the applied stress on the performance of the device is characterized. During the stress mode, an input RF power signal is applied to the device through an RF signal input port and an output RF power signal is captured from the device at an RF signal output port. Depending upon the impedance value of the device at issue, the RF signal input port and the RF signal output port are connected to either the same terminal or opposing terminals and the need for impedance tuning is avoided. Also disclosed are test systems and methods for selectively controlling operation of such a test structure.Type: ApplicationFiled: July 19, 2013Publication date: January 22, 2015Inventors: Donald J. Cook, Hanyi Ding, Xuefeng Liu, Randy L. Wolf
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Patent number: 8910355Abstract: Manufacturing a semiconductor structure including modifying a frequency of a Film Bulk Acoustic Resonator (FBAR) device though a vent hole of a sealing layer surrounding the FBAR device.Type: GrantFiled: December 12, 2011Date of Patent: December 16, 2014Assignee: International Business Machines CorporationInventors: James W. Adkisson, Panglijen Candra, Thomas J. Dunbar, Jeffrey P. Gambino, Mark D. Jaffe, Anthony K. Stamper, Randy L. Wolf
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Publication number: 20140306325Abstract: A silicon device includes an active silicon layer, a buried oxide (BOX) layer beneath the active silicon layer and a high-resistivity silicon layer beneath the BOX layer. The device also includes a harmonic suppression layer at a boundary of the BOX layer and the high-resistivity silicon layer.Type: ApplicationFiled: June 24, 2014Publication date: October 16, 2014Inventors: Alan B. Botula, Mark D. Jaffe, Alvin J. Joseph, Richard A. Phelps, James Slinkman, Randy L. Wolf
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Patent number: 8829920Abstract: Disclosed are a circuit and method for amplifying the power of a multi-tone input signal. The multi-tone input signal is filtered separating out one signal having a tone at a fundamental frequency from another signal having additional tones at additional frequencies. The signal having the tone at the fundamental frequency is amplified and then filtered removing any harmonics added during amplification. The signals are then recombined generating a multi-tone output signal, wherein the tone at the fundamental frequency is boosted (i.e., has a higher power in the multi-tone output signal than in the multi-tone input signal), but the additional tones at the additional frequencies are not (i.e., the additional tones at the additional frequencies have essentially the same power in the multi-tone output and input signals). Also disclosed herein are embodiments of a testing system and method incorporating the above-described circuit to allow for testing of high power devices.Type: GrantFiled: May 31, 2012Date of Patent: September 9, 2014Assignee: International Business Machines CorporationInventor: Randy L. Wolf
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Patent number: 8828746Abstract: A silicon device includes an active silicon layer, a buried oxide (BOX) layer beneath the active silicon layer and a high-resistivity silicon layer beneath the BOX layer. The device also includes a harmonic suppression layer at a boundary of the BOX layer and the high-resistivity silicon layer.Type: GrantFiled: November 14, 2012Date of Patent: September 9, 2014Assignee: International Business Machines CorporationInventors: Alan B. Botula, Mark D. Jaffe, Alvin J. Joseph, Richard A. Phelps, James Slinkman, Randy L. Wolf
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Publication number: 20140191322Abstract: An approach for sinking heat from a transistor is provided. A method includes forming a substrate contact extending from a first portion of a silicon-on-insulator (SOI) island to a substrate. The method also includes forming a transistor in a second portion of the SOI island. The method further includes electrically isolating the substrate contact from the transistor by doping the first portion of the SOI island.Type: ApplicationFiled: January 10, 2013Publication date: July 10, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Alan B. BOTULA, Alvin J. JOSEPH, James A. SLINKMAN, Randy L. WOLF
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Publication number: 20140131800Abstract: A silicon device includes an active silicon layer, a buried oxide (BOX) layer beneath the active silicon layer and a high-resistivity silicon layer beneath the BOX layer. The device also includes a harmonic suppression layer at a boundary of the BOX layer and the high-resistivity silicon layer.Type: ApplicationFiled: November 14, 2012Publication date: May 15, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Alan B. Botula, Mark D. Jaffe, Alvin J. Joseph, Richard A. Phelps, James Slinkman, Randy L. Wolf
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Patent number: 8723392Abstract: Disclosed herein is a surface acoustic wave (SAW) filter and method of making the same. The SAW filter includes a piezoelectric substrate; a planar barrier layer disposed above the piezoelectric substrate, and at least one conductor buried in the piezoelectric substrate and the planar barrier layer.Type: GrantFiled: July 15, 2011Date of Patent: May 13, 2014Assignee: International Business Machines CorporationInventors: James W. Adkisson, Panglijen Candra, Thomas J. Dunbar, Jeffrey P. Gambino, Mark D. Jaffe, Anthony K. Stamper, Randy L. Wolf
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Patent number: 8709903Abstract: Disclosed is semiconductor structure with an insulator layer on a semiconductor substrate and a device layer is on the insulator layer. The substrate is doped with a relatively low dose of a dopant having a given conductivity type such that it has a relatively high resistivity. Additionally, a portion of the semiconductor substrate immediately adjacent to the insulator layer can be doped with a slightly higher dose of the same dopant, a different dopant having the same conductivity type or a combination thereof. Optionally, micro-cavities are created within this same portion so as to balance out any increase in conductivity due to increased doping with a corresponding increase in resistivity. Increasing the dopant concentration at the semiconductor substrate-insulator layer interface raises the threshold voltage (Vt) of any resulting parasitic capacitors and, thereby reduces harmonic behavior. Also disclosed herein are embodiments of a method for forming such a semiconductor structure.Type: GrantFiled: September 5, 2013Date of Patent: April 29, 2014Assignee: International Business Machines CorporationInventors: Alan B. Botula, John J. Ellis-Monaghan, Alvin J. Joseph, Max G. Levy, Richard A. Phelps, James A. Slinkman, Randy L. Wolf
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Patent number: 8698244Abstract: Disclosed is semiconductor structure with an insulator layer on a semiconductor substrate and a device layer is on the insulator layer. The substrate is doped with a relatively low dose of a dopant having a given conductivity type such that it has a relatively high resistivity. Additionally, a portion of the semiconductor substrate immediately adjacent to the insulator layer can be doped with a slightly higher dose of the same dopant, a different dopant having the same conductivity type or a combination thereof. Optionally, micro-cavities are created within this same portion so as to balance out any increase in conductivity with a corresponding increase in resistivity. Increasing the dopant concentration at the semiconductor substrate-insulator layer interface raises the threshold voltage (Vt) of any resulting parasitic capacitors and, thereby reduces harmonic behavior. Also disclosed herein are embodiments of a method and a design structure for such a semiconductor structure.Type: GrantFiled: December 10, 2009Date of Patent: April 15, 2014Assignee: International Business Machines CorporationInventors: Alan B. Botula, John J. Ellis-Monaghan, Alvin J. Joseph, Max G. Levy, Richard A. Phelps, James A. Slinkman, Randy L. Wolf
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Publication number: 20140004687Abstract: Disclosed is semiconductor structure with an insulator layer on a semiconductor substrate and a device layer is on the insulator layer. The substrate is doped with a relatively low dose of a dopant having a given conductivity type such that it has a relatively high resistivity. Additionally, a portion of the semiconductor substrate immediately adjacent to the insulator layer can be doped with a slightly higher dose of the same dopant, a different dopant having the same conductivity type or a combination thereof. Optionally, micro-cavities are created within this same portion so as to balance out any increase in conductivity due to increased doping with a corresponding increase in resistivity. Increasing the dopant concentration at the semiconductor substrate-insulator layer interface raises the threshold voltage (Vt) of any resulting parasitic capacitors and, thereby reduces harmonic behavior. Also disclosed herein are embodiments of a method for forming such a semiconductor structure.Type: ApplicationFiled: September 5, 2013Publication date: January 2, 2014Applicant: International Business Machines CorporationInventors: Alan B. Botula, John J. Ellis-Monaghan, Alvin J. Joseph, Max G. Levy, Richard A. Phelps, James A. Slinkman, Randy L. Wolf
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Publication number: 20130320995Abstract: Disclosed are a circuit and method for amplifying the power of a multi-tone input signal. The multi-tone input signal is filtered separating out one signal having a tone at a fundamental frequency from another signal having additional tones at additional frequencies. The signal having the tone at the fundamental frequency is amplified and then filtered removing any harmonics added during amplification. The signals are then recombined generating a multi-tone output signal, wherein the tone at the fundamental frequency is boosted (i.e., has a higher power in the multi-tone output signal than in the multi-tone input signal), but the additional tones at the additional frequencies are not (i.e., the additional tones at the additional frequencies have essentially the same power in the multi-tone output and input signals). Also disclosed herein are embodiments of a testing system and method incorporating the above-described circuit to allow for testing of high power devices.Type: ApplicationFiled: May 31, 2012Publication date: December 5, 2013Applicant: International Business Machines CorporationInventor: Randy L. Wolf
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Patent number: 8564067Abstract: Disclosed is semiconductor structure with an insulator layer on a semiconductor substrate and a device layer is on the insulator layer. The substrate is doped with a relatively low dose of a dopant having a given conductivity type such that it has a relatively high resistivity. Additionally, a portion of the semiconductor substrate immediately adjacent to the insulator layer can be doped with a slightly higher dose of the same dopant, a different dopant having the same conductivity type or a combination thereof. Optionally, micro-cavities are created within this same portion so as to balance out any increase in conductivity due to increased doping with a corresponding increase in resistivity. Increasing the dopant concentration at the semiconductor substrate-insulator layer interface raises the threshold voltage (Vt) of any resulting parasitic capacitors and, thereby reduces harmonic behavior. Also disclosed herein are embodiments of a method for forming such a semiconductor structure.Type: GrantFiled: February 21, 2013Date of Patent: October 22, 2013Assignee: International Business Machines CorporationInventors: Alan B. Botula, John J. Ellis-Monaghan, Alvin J. Joseph, Max G. Levy, Richard A. Phelps, James A. Slinkman, Randy L. Wolf
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Publication number: 20130214877Abstract: Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed to be in contact with at least one piezoelectric substrate. The method further includes forming a micro-electro-mechanical structure (MEMS) comprising a MEMS beam in which, upon actuation, the MEMS beam will turn on the at least one piezoelectric filter structure by interleaving electrodes in contact with the piezoelectric substrate or sandwiching the at least one piezoelectric substrate between the electrodes.Type: ApplicationFiled: February 21, 2012Publication date: August 22, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: James W. ADKISSON, Panglijen CANDRA, Thomas J. DUNBAR, Mark D. JAFFE, Anthony K. STAMPER, Randy L. WOLF
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Publication number: 20130187246Abstract: A design structure for an integrated radio frequency (RF) filter on a backside of a semiconductor substrate includes: a device on a first side of a substrate; a radio frequency (RF) filter on a backside of the substrate; and at least one substrate conductor extending from the front side of the substrate to the backside of the substrate and electrically coupling the RF filter to the device.Type: ApplicationFiled: January 20, 2012Publication date: July 25, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: James W. ADKISSON, Panglijen CANDRA, Thomas J. DUNBAR, Jeffrey P. GAMBINO, Mark D. JAFFE, Anthony K. STAMPER, Randy L. WOLF
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Publication number: 20130187729Abstract: Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed on a piezoelectric substrate. The method further includes forming a fixed electrode with a plurality of fingers on the piezoelectric substrate. The method further includes forming a moveable electrode with a plurality of fingers over the piezoelectric substrate. The method further includes forming actuators aligned with one or more of the plurality of fingers of the moveable electrode.Type: ApplicationFiled: January 25, 2012Publication date: July 25, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: James W. ADKISSON, Panglijen CANDRA, Thomas J. DUNBAR, Jeffrey P. GAMBINO, Mark D. JAFFE, Anthony K. STAMPER, Randy L. WOLF
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Patent number: 8492294Abstract: A semiconductor-on-insulator substrate and a related semiconductor structure, as well as a method for fabricating the semiconductor-on-insulator substrate and the related semiconductor structure, provide for a multiple order radio frequency harmonic suppressing region located and formed within a base semiconductor substrate at a location beneath an interface of a buried dielectric layer with the base semiconductor substrate within the semiconductor-on-insulator substrate. The multiple order radio frequency harmonic suppressing region may comprise an ion implanted atom, such as but not limited to a noble gas atom, to provide a suppressed multiple order radio frequency harmonic when powering a radio frequency device, such as but not limited to a radio frequency complementary metal oxide semiconductor device (or alternatively a passive device), located and formed within and upon a surface semiconductor layer within the semiconductor structure.Type: GrantFiled: September 10, 2012Date of Patent: July 23, 2013Assignee: International Business Machines CorporationInventors: Joseph R. Greco, Kevin Munger, Richard A. Phelps, Jennifer C. Robbins, William Savaria, James A. Slinkman, Randy L. Wolf
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Patent number: 8492868Abstract: A method, integrated circuit and design structure includes a silicon substrate layer having trench structures and an ion impurity implant. An insulator layer is positioned on and contacts the silicon substrate layer. The insulator layer fills the trench structures. A circuitry layer is positioned on and contacts the buried insulator layer. The circuitry layer comprises groups of active circuits separated by passive structures. The trench structures are positioned between the groups of active circuits when the integrated circuit structure is viewed from the top view. Thus, the trench structures are below the passive structures and are not below the groups of circuits when the integrated circuit structure is viewed from the top view.Type: GrantFiled: August 2, 2010Date of Patent: July 23, 2013Assignee: International Business Machines CorporationInventors: Alan B. Botula, Alvin J. Joseph, James A. Slinkman, Randy L. Wolf
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Publication number: 20130169383Abstract: Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed on a piezoelectric substrate. The method further includes forming a micro-electro-mechanical structure (MEMS) comprising a MEMS beam formed above the piezoelectric substrate and at a location in which, upon actuation, the MEMS beam shorts the piezoelectric filter structure by contacting at least one of the plurality of electrodes.Type: ApplicationFiled: January 3, 2012Publication date: July 4, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: James W. ADKISSON, Panglijen CANDRA, Thomas J. DUNBAR, Jeffrey P. GAMBINO, Mark D. JAFFE, Anthony K. STAMPER, Randy L. WOLF
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Patent number: 8471340Abstract: Disclosed is semiconductor structure with an insulator layer on a semiconductor substrate and a device layer is on the insulator layer. The substrate is doped with a relatively low dose of a dopant having a given conductivity type such that it has a relatively high resistivity. Additionally, a portion of the semiconductor substrate immediately adjacent to the insulator layer can be doped with a slightly higher dose of the same dopant, a different dopant having the same conductivity type or a combination thereof. Optionally, micro-cavities are created within this same portion so as to balance out any increase in conductivity due to increased doping with a corresponding increase in resistivity. Increasing the dopant concentration at the semiconductor substrate-insulator layer interface raises the threshold voltage (Vt) of any resulting parasitic capacitors and, thereby reduces harmonic behavior. Also disclosed herein are embodiments of a method for forming such a semiconductor structure.Type: GrantFiled: November 30, 2009Date of Patent: June 25, 2013Assignee: International Business Machines CorporationInventors: Alan B. Botula, John J. Ellis-Monaghan, Alvin J. Joseph, Max G. Levy, Richard A. Phelps, James A. Slinkman, Randy L. Wolf