Patents by Inventor Ravindra Vaman Shenoy

Ravindra Vaman Shenoy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10199152
    Abstract: An inductor can include a first substrate, a magnetic piece, and a conductor. The first substrate can be formed within a second substrate. The magnetic piece can be connected to a first side of the first substrate. The conductor can be formed within the second substrate, on the second substrate, or both. The conductor can have an input and an output. The conductor can be configured to surround the first substrate without being in contact with the first substrate and without being in contact with the magnetic piece.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: February 5, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Mete Erturk, Ravindra Vaman Shenoy, Kwan-yu Lai, Jitae Kim, Donald William Kidwell, Jr., Jon Bradley Lasiter, James Thomas Doyle, Omar James Bchir
  • Publication number: 20180369866
    Abstract: Implementations of the subject matter described herein relate to sensors including piezoelectric micromechanical ultrasonic transducer (PMUT) sensor elements and arrays thereof. The PMUT sensor elements may be switchable between a non- ultrasonic force detection mode and an ultrasonic imaging mode. A PMUT sensor element may include a diaphragm that is capable of a static displacement on application of a force and is capable of a dynamic displacement when the PMUT sensor element transmits or receives ultrasonic signals. In some implementations, a PMUT sensor element includes a two dimensional-electron gas structure on the diaphragm. The sensors may further include a sensor controller configured to switch between a non-ultrasonic force detection mode and an ultrasonic imaging mode for one or more of the PMUT sensor elements, wherein an applied force is measured in the non-ultrasonic force detection mode and wherein an object is imaged ultrasonically during the ultrasonic imaging mode.
    Type: Application
    Filed: June 26, 2017
    Publication date: December 27, 2018
    Inventors: Firas Sammoura, David William Burns, Ravindra Vaman Shenoy
  • Publication number: 20180342788
    Abstract: The disclosure relates to a glass-based antenna array package. In an aspect, such a glass-based antenna array package includes a single glass substrate layer, one or more antennas attached to a first side of the glass substrate layer, at least one semiconductor device attached to a second side of the glass substrate layer, and a first photoimageable dielectric layer adhered to the second side of the glass substrate layer and encapsulating the at least one semiconductor device. A method of manufacturing the same is also disclosed.
    Type: Application
    Filed: September 18, 2017
    Publication date: November 29, 2018
    Inventors: Jon Bradley LASITER, Ravindra Vaman SHENOY, Donald William KIDWELL, JR., Mohammad Ali TASSOUDJI, Mario Francisco VELEZ
  • Patent number: 10001552
    Abstract: A piezoelectric micromechanical ultrasonic transducer (PMUT) includes a diaphragm disposed over a cavity, the diaphragm including a piezoelectric layer stack including a piezoelectric layer, a first electrode electrically coupled with transceiver circuitry, and a second electrode electrically coupled with the transceiver circuitry. The first electrode may be disposed in a first portion of the diaphragm, and the second electrode may be disposed in a second, separate, portion of the diaphragm. Each of the first and the second electrode is disposed on or proximate to a first surface of the piezoelectric layer, the first surface being opposite from the cavity. The PMUT is configured to transmit first ultrasonic signals by way of the first electrode during a first time period and to receive second ultrasonic signals by way of the second electrode during a second time period, the first time period and the second time period being at least partially overlapping.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: June 19, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Hrishikesh Vijaykumar Panchawagh, Hao-Yen Tang, Yipeng Lu, Kostadin Dimitrov Djordjev, Suryaprakash Ganti, David William Burns, Ravindra Vaman Shenoy, Jon Bradley Lasiter, Nai-Kuei Kuo, Firas Sammoura
  • Publication number: 20170343346
    Abstract: A device may include a surface at least partially defining an enclosed region, a plurality of fluids within the enclosed region, the plurality of fluids comprising at least a first fluid having a first acoustic impedance and a second fluid having a second acoustic impedance different from the first acoustic impedance, a first piezoelectric transducer disposed on the surface, the first piezoelectric transducer being configured to generate a first wave reception signal based, at least in part, on an ultrasonic return wave received through at least one of the plurality of fluids, and a processor coupled to the first piezoelectric transducer and configured to determine a measurement of a tilt of the device based, at least in part, on the first wave reception signal.
    Type: Application
    Filed: May 31, 2016
    Publication date: November 30, 2017
    Inventors: Firas SAMMOURA, Stephanie FUNG, Donald William KIDWELL, JR., Ravindra Vaman SHENOY, David William BURNS
  • Patent number: 9773862
    Abstract: Provided are space-efficient capacitors that have a higher quality factor than conventional designs and improve coupling of electrical energy from a through-glass via (TGV) to a dielectric. For example, provided is a TGV having a non-rectangular cross-section, where one end of the TGV is coupled to a first metal plate. A dielectric material is formed on the first metal plate. A second metal plate is formed on the dielectric material in a manner that overlaps at least a portion of the first metal plate to form at least one overlapped region of the dielectric material. At least a part of the perimeter of the overlapped region is non-planar. The overlapped region can be formed in a shape of a closed ring, in a plurality of portions of a ring shape, in substantially a quarter of a ring shape, and/or in substantially a half of a ring shape.
    Type: Grant
    Filed: December 11, 2016
    Date of Patent: September 26, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Changhan Hobie Yun, Daeik Daniel Kim, Chengjie Zuo, Jonghae Kim, Mario Francisco Velez, Donald William Kidwell, Jr., Jon Bradley Lasiter, Kwan-Yu Lai, Jitae Kim, Ravindra Vaman Shenoy
  • Publication number: 20170246662
    Abstract: An apparatus may include one or more segmented piezoelectric micromechanical ultrasonic transducer (PMUT) elements. Each segmented PMUT element may include a substrate, an anchor structure disposed on the substrate and a membrane disposed proximate the anchor structure. The membrane may include a piezoelectric layer stack and a mechanical layer. The anchor structure may include boundary portions that divide the segmented PMUT element into segments. Each segment may have a corresponding segment cavity. The boundary portions may correspond to nodal lines of the entire membrane. The membrane may include a membrane segment disposed proximate each segment cavity. The membrane may be configured to undergo one or both of flexural motion and vibration when the segmented PMUT element receives or transmits signals.
    Type: Application
    Filed: February 23, 2017
    Publication date: August 31, 2017
    Inventors: Donald William Kidwell, JR., Ravindra Vaman Shenoy, Jon Bradley Lasiter
  • Publication number: 20170125512
    Abstract: Provided are space-efficient capacitors that have a higher quality factor than conventional designs and improve coupling of electrical energy from a through-glass via (TGV) to a dielectric. For example, provided is a TGV having a non-rectangular cross-section, where one end of the TGV is coupled to a first metal plate. A dielectric material is formed on the first metal plate. A second metal plate is formed on the dielectric material in a manner that overlaps at least a portion of the first metal plate to form at least one overlapped region of the dielectric material. At least a part of the perimeter of the overlapped region is non-planar. The overlapped region can be formed in a shape of a closed ring, in a plurality of portions of a ring shape, in substantially a quarter of a ring shape, and/or in substantially a half of a ring shape.
    Type: Application
    Filed: December 11, 2016
    Publication date: May 4, 2017
    Inventors: Changhan Hobie YUN, Daeik Daniel KIM, Chengjie ZUO, Jonghae KIM, Mario Francisco VELEZ, Donald William KIDWELL JR, Jon Bradley LASITER, Kwan-Yu LAI, Jitae KIM, Ravindra Vaman SHENOY
  • Publication number: 20170110504
    Abstract: An ultrasonic sensor pixel includes a substrate, a piezoelectric micromechanical ultrasonic transducer (PMUT) and a sensor pixel circuit. The PMUT includes a piezoelectric layer stack including a piezoelectric layer disposed over a cavity, the cavity being disposed between the piezoelectric layer stack and the substrate, a reference electrode disposed between the piezoelectric layer and the cavity, and one or both of a receive electrode and a transmit electrode disposed on or proximate to a first surface of the piezoelectric layer, the first surface being opposite from the cavity. The sensor pixel circuit is electrically coupled with one or more of the reference electrode, the receive electrode and the transmit electrode and the PMUT and the sensor pixel circuit are integrated with the sensor pixel circuit on the substrate.
    Type: Application
    Filed: October 12, 2016
    Publication date: April 20, 2017
    Inventors: Hrishikesh Vijaykumar Panchawagh, Suryaprakash Ganti, Kostadin Dimitrov Djordjev, David William Burns, Timothy Alan Dickinson, Donald William Kidwell, JR., Ravindra Vaman Shenoy, Jon Bradley Lasiter, Hao-Yen Tang, Yipeng Lu
  • Publication number: 20170086295
    Abstract: An integrated circuit device, such as a system-on-a-chip (SOC) device that includes an integrated or embedded voltage regulator, comprises an integrated capacitor and an integrated inductor having a magnetic core that can be fabricated in the same process as the capacitive structure of the integrated capacitor.
    Type: Application
    Filed: September 20, 2015
    Publication date: March 23, 2017
    Inventors: Mete ERTURK, Farsheed MAHMOUDI, James Thomas DOYLE, Ravindra Vaman SHENOY, Jitae KIM
  • Publication number: 20170062398
    Abstract: A voltage regulator having a coil inductor is integrated or embedded in a system-on-chip (SOC) device. The coil inductor is fabricated on an inductor wafer with through vias, and the inductor wafer is joined with an SOC wafer for integration with the SOC device.
    Type: Application
    Filed: September 2, 2015
    Publication date: March 2, 2017
    Inventors: Karim ARABI, Ravindra Vaman SHENOY, Evgeni Petrovich GOUSEV, Mete ERTURK
  • Patent number: 9548350
    Abstract: Provided are space-efficient capacitors that have a higher quality factor than conventional designs and improve coupling of electrical energy from a through-glass via (TGV) to a dielectric. For example, provided is a TGV having a non-rectangular cross-section, where one end of the TGV is coupled to a first metal plate. A dielectric material is formed on the first metal plate. A second metal plate is formed on the dielectric material in a manner that overlaps at least a portion of the first metal plate to form at least one overlapped region of the dielectric material. At least a part of the perimeter of the overlapped region is non-planar. The overlapped region can be formed in a shape of a closed ring, in a plurality of portions of a ring shape, in substantially a quarter of a ring shape, and/or in substantially a half of a ring shape.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: January 17, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Changhan Hobie Yun, Daeik Daniel Kim, Chengjie Zuo, Jonghae Kim, Mario Francisco Velez, Donald William Kidwell, Jr., Jon Bradley Lasiter, Kwan-Yu Lai, Jitae Kim, Ravindra Vaman Shenoy
  • Patent number: 9510454
    Abstract: An integrated interposer between a first component and a second component includes a substrate. The substrate may have thermal and/or mechanical properties with values lying between the thermal and/or mechanical properties of the first component and the second component. Active devices are disposed on a first surface of the substrate. A contact layer is coupled to the active devices and configured to couple at least the first component and a third component to the integrated interposer. At least one through via(s) is coupled to the contact layer and extends through the substrate to a second surface of the substrate. An interconnect layer is disposed on the second surface of the substrate and coupled to the at least one through via(s). The interconnect layer is configured to couple the second component to the integrated interposer.
    Type: Grant
    Filed: August 19, 2014
    Date of Patent: November 29, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventors: Vidhya Ramachandran, Urmi Ray, Ravindra Vaman Shenoy, Kwan-Yu Lai, Jon Bradley Lasiter
  • Publication number: 20160315024
    Abstract: An integrated circuit package includes a core such as a thin glass core with through-core vias. A photo-patternable material is disposed directly on surfaces of the core and in the through-core vias and is selectively patterned to expose at least an exposed portion of the surface of the core and the through-core vias. A metal layer, such as copper, is disposed in the exposed portion of the core and in the through-core vias. A mechanical handler frame may be used to clamp together the various layers including the core and the photo-patternable material. The photo-patternable material that remains after patterning is permanent, and prevents the mechanical handler frame from directly contacting the core. Thus the photo-patternable material provides mechanical support to the core and protects the core from the mechanical handler.
    Type: Application
    Filed: April 21, 2015
    Publication date: October 27, 2016
    Inventors: Kwan-yu LAI, Ravindra Vaman SHENOY, Urmi RAY
  • Publication number: 20160163443
    Abstract: An inductor can include a first substrate, a magnetic piece, and a conductor. The first substrate can be formed within a second substrate. The magnetic piece can be connected to a first side of the first substrate. The conductor can be formed within the second substrate, on the second substrate, or both. The conductor can have an input and an output. The conductor can be configured to surround the first substrate without being in contact with the first substrate and without being in contact with the magnetic piece.
    Type: Application
    Filed: June 18, 2015
    Publication date: June 9, 2016
    Inventors: Mete ERTURK, Ravindra Vaman SHENOY, Kwan-yu LAI, Jitae KIM, Donald William KIDWELL JR., Jon Bradley LASITER, James Thomas DOYLE, Omar James BCHIR
  • Patent number: 9325420
    Abstract: An apparatus includes a substrate and a waveguide coupled to a surface of the substrate. The surface forms a cladding layer of the waveguide. The apparatus includes a photodetector optically coupled to an end of the waveguide. The photodetector is configured to output an electrical signal responsive to receiving a light signal from a core of the waveguide. The apparatus also includes an amplifier device coupled to the substrate. The amplifier device is electrically coupled to the photodetector to amplify the electrical signal to produce an amplified electrical signal.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: April 26, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Kwan-yu Lai, Ravindra Vaman Shenoy, Jitae Kim, Jon Bradley Lasiter, Donald William Kidwell, Jr., Evgeni Petrovich Gousev
  • Publication number: 20160107194
    Abstract: A piezoelectric micromechanical ultrasonic transducer (PMUT) includes a diaphragm disposed over a cavity, the diaphragm including a piezoelectric layer stack including a piezoelectric layer, a first electrode electrically coupled with transceiver circuitry, and a second electrode electrically coupled with the transceiver circuitry. The first electrode may be disposed in a first portion of the diaphragm, and the second electrode may be disposed in a second, separate, portion of the diaphragm. Each of the first and the second electrode is disposed on or proximate to a first surface of the piezoelectric layer, the first surface being opposite from the cavity. The PMUT is configured to transmit first ultrasonic signals by way of the first electrode during a first time period and to receive second ultrasonic signals by way of the second electrode during a second time period, the first time period and the second time period being at least partially overlapping.
    Type: Application
    Filed: October 14, 2015
    Publication date: April 21, 2016
    Inventors: Hrishikesh Vijaykumar Panchawagh, Hao-Yen Tang, Yipeng Lu, Kostadin Dimitrov Djordjev, Suryaprakash Ganti, David William Burns, Ravindra Vaman Shenoy, Jon Bradley Lasiter, Nai-Kuei Kuo, Firas Sammoura
  • Patent number: 9293245
    Abstract: A particular device includes a coil and a discontinuous magnetic core. The discontinuous magnetic core includes a first elongated portion, a second elongated portion, and at least two curved portions, where the portions are coplanar and physically separated from each other. The discontinuous magnetic core is arranged to form a discontinuous loop. The discontinuous magnetic core is deposited as a first layer above a dielectric substrate. A first portion of the coil extends above a first surface of the magnetic core. A second portion of the coil extends below a second surface of the magnetic core. The second portion of the coil is electrically coupled to the first portion of the coil. The second surface of the magnetic core is opposite the first surface of the magnetic core.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: March 22, 2016
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventors: Philip Jason Stephanou, Jitae Kim, Ravindra Vaman Shenoy, Kwan-yu Lai
  • Patent number: 9263370
    Abstract: A semiconductor device comprising a second surface of a logic die and a second surface of a via bar coupled to a first surface of a substrate, a second surface of a memory die coupled to a first surface of the via bar, a portion of the second surface of the memory die extending over the first surface of the logic die, such that the logic die and the memory die are vertically staggered, and the memory die electrically coupled to the logic die through the via bar. The via bar can be formed from glass, and include through-glass vias (TGVs) and embedded passives such as resistors, capacitors, and inductors. The semiconductor device can be formed as a single package or a package-on-package structure with the via bar and the memory die encapsulated in a package and the substrate and logic die in another package.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: February 16, 2016
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventors: Ravindra Vaman Shenoy, Kwan-yu Lai, Jon Bradley Lasiter, Philip Jason Stephanou, Donald William Kidwell, Jr., Evgeni Gousev
  • Publication number: 20150333831
    Abstract: An apparatus includes a substrate and a waveguide coupled to a surface of the substrate. The surface forms a cladding layer of the waveguide. The apparatus includes a photodetector optically coupled to an end of the waveguide. The photodetector is configured to output an electrical signal responsive to receiving a light signal from a core of the waveguide. The apparatus also includes an amplifier device coupled to the substrate. The amplifier device is electrically coupled to the photodetector to amplify the electrical signal to produce an amplified electrical signal.
    Type: Application
    Filed: May 16, 2014
    Publication date: November 19, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Kwan-yu Lai, Ravindra Vaman Shenoy, Jitae Kim, Jon Bradley Lasiter, Donald William Kidwell, JR., Evgeni Petrovich Gousev