Patents by Inventor Ravishankar Iyer

Ravishankar Iyer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods And Apparatuses For Controlling Thread Contention
    Publication number: 20160077844
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Application
    Filed: November 20, 2015
    Publication date: March 17, 2016
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • REAL TIME VIDEO SUMMARIZATION
    Publication number: 20160070963
    Abstract: System, apparatus, method, and computer readable media for on-the-fly captured video summarization. A video stream is incrementally summarized in concurrence with generation of the stream by a camera module. Saliency of the video stream summary is maintained as the stream evolves by updating the summary to include only the most significant frames. In one exemplary embodiment, saliency is determined by optimizing an objective function including terms that are indicative of both the diversity of a selection, and how representative the selection is to the processed portion of the video data corpus. A device platform including a CM and comporting with the exemplary architecture may provide video camera functionality at ultra-low power, and/or with ultra-low storage resources, and/or with ultra-low communication channel bandwidth.
    Type: Application
    Filed: September 4, 2014
    Publication date: March 10, 2016
    Inventors: SHAYOK CHAKRABORTY, OMESH TICKOO, RAVISHANKAR IYER
  • Application scheduling in heterogeneous multiprocessor computing platform based on a ratio of predicted performance of processor cores
    Patent number: 9268611
    Abstract: Methods and apparatus to schedule applications in heterogeneous multiprocessor computing platforms are described. In one embodiment, information regarding performance (e.g., execution performance and/or power consumption performance) of a plurality of processor cores of a processor is stored (and tracked) in counters and/or tables. Logic in the processor determines which processor core should execute an application based on the stored information. Other embodiments are also claimed and disclosed.
    Type: Grant
    Filed: September 25, 2010
    Date of Patent: February 23, 2016
    Assignee: Intel Corporation
    Inventors: Ravishankar Iyer, Sadagopan Srinivasan, Li Zhao, Rameshkumar G. Illikkal
  • CUTTING TOOL WITH SHOWER CAP
    Publication number: 20160023288
    Abstract: A cutting tool includes a cutter body and a shower cap removably secured to the cutter body. The shower cap includes a cylindrical inside reservoir surface, a cylindrical outside coolant passage surface spaced radially outward from the cylindrical inside reservoir surface, and at least one coolant passage extending radially outward from the cylindrical inside reservoir surface to the cylindrical outside coolant passage surface. The at least one coolant passage is in fluid communication with an inlet opening formed in the cylindrical inside reservoir surface and an outlet opening formed in the cylindrical outside coolant passage surface such that coolant is directed radially outward from the cylindrical inside reservoir surface through the at least one coolant passage to a vicinity of a cutting insert within an insert-receiving pocket of the cutter body.
    Type: Application
    Filed: July 23, 2014
    Publication date: January 28, 2016
    Applicant: Kennametal Inc.
    Inventors: Lewis Ray Morrison, Ravishankar Iyer
  • Methods and apparatuses for controlling thread contention
    Patent number: 9235256
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: January 12, 2016
    Assignee: Intel Corporation
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods and apparatuses for controlling thread contention
    Patent number: 9218046
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: December 22, 2015
    Assignee: Intel Corporation
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Double-sided, nonagon cutting insert
    Patent number: 9211589
    Abstract: A double-sided, nonagon cutting insert includes a top surface, a bottom surface identical to the top surface, nine side surfaces that are identical to each other, a cutting edge formed at an intersection between each of the nine side surfaces and the top and bottom surfaces for a total of eighteen cutting edges, and nine corner radiuses identical to each other, each corner radius extending between the top and bottom surfaces and each of the nine side surfaces. Each cutting edge has a non-symmetric profile with respect to a central, longitudinal axis. The non-symmetrical profile of the cutting edge has the technical advantage of providing a variable cutting force, particularly during fine finishing cutting operations.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: December 15, 2015
    Assignee: KENNAMETAL INC.
    Inventors: Lewis Ray Morrison, Ravishankar Iyer
  • Screw head wedge clamp assembly for cutting tool
    Patent number: 9211590
    Abstract: A screw head wedge clamp assembly for a cutting tool includes a clamp screw having a screw head with a frustum-shaped portion, and a screw head wedge clamp having a body and a clamp head extending from the body. The clamp head has a frustum-shaped portion that is received in a mounting screw bore of a cutting insert. The wedge clamp contacts a radiused bottom wall of the clamp bore when the clamp screw is threaded into a threaded bore of an insert pocket, thereby causing the clamp head to exert a downward and rearward force against a mounting screw bore of the cutting insert to securely hold the cutting insert in the insert pocket. The screw head wedge clamp does not contact a top surface of the cutting insert, but only the frustum-shaped portion contacts the mounting screw bore of the cutting insert.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: December 15, 2015
    Assignee: KENNAMETAL INC.
    Inventors: Lewis Ray Morrison, Ravishankar Iyer
  • Cutting insert with finishing and roughing cutting edges
    Patent number: 9205499
    Abstract: An indexable cutting insert includes a top surface, a bottom surface and a plurality of side surfaces. Each side surface includes a first pair of chip grooves, and a second pair of chip grooves. A planar corner surface is disposed between each side surface. A corner radius extends between the top and bottom surfaces and the planar corner surface. A plurality of primary wiper cutting edges are formed at an intersection between each of the first pair of chip grooves and the top and bottom surfaces. A plurality of secondary roughing cutting edges are formed at an intersection between each corner radius and each of the first pair of chip forming grooves. A plurality of wiper cutting edges are formed at an intersection between each planar corner surface and each of the second pair of chip forming grooves. A milling cutter is also disclosed.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: December 8, 2015
    Assignee: KENNAMETAL INC.
    Inventors: Lewis Ray Morrison, Ravishankar Iyer
  • Multi-modal touch screen emulator
    Patent number: 9201500
    Abstract: Systems and methods may provide for capturing a user input by emulating a touch screen mechanism. In one example, the method may include identifying a point of interest on a front facing display of the device based on gaze information associated with a user of the device, identifying a hand action based on gesture information associated with the user of the device, and initiating a device action with respect to the front facing display based on the point of interest and the hand action.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: December 1, 2015
    Assignee: Intel Corporation
    Inventors: Sadagopan Srinivasan, Rameshkumar Illikkal, Ravishankar Iyer
  • Apparatus and method for reducing the flushing time of a cache
    Patent number: 9128842
    Abstract: A processor is described having cache circuitry and logic circuitry. The logic circuitry is to manage the entry and removal of cache lines from the cache circuitry. The logic circuitry includes storage circuitry and control circuitry. The storage circuitry is to store information identifying a set of cache lines within the cache that are in a modified state. The control circuitry is coupled to the storage circuitry to receive the information from the storage circuitry, responsive to a signal to flush the cache, and determine addresses of the cache therefrom so that the set of cache lines are read from the cache so as to avoid reading cache lines from the cache that are in an invalid or a clean state.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: September 8, 2015
    Assignee: Intel Corporation
    Inventors: Jaideep Moses, Ravishankar Iyer, Rameshkumar G. Illikkal, Sadagopan Srinivasan
  • CUTTING TOOL HAVING INSERT POCKET WITH CANTILEVERED MEMBER
    Publication number: 20150202698
    Abstract: A cutting tool (has a central, longitudinal axis and a tool body including an insert pocket with a bottom wall, a rear wall and at least one side wall. A cantilevered member is machined from the tool body so as to be integrally formed with the tool body. The cantilevered member extends from one of the walls of the insert pocket. An adjustment screw exerts a force against the cantilevered member to selectively adjust a position of a cutting insert mounted on the cantilevered member with respect to the central, longitudinal axis of the cutting tool. A method for selectively adjusting a position of the cutting insert is also disclosed.
    Type: Application
    Filed: January 22, 2014
    Publication date: July 23, 2015
    Applicant: Kennametal Inc.
    Inventors: Lewis Ray Morrison, Ravishankar Iyer, Scott Patrick Rusnock
  • Differentiating cache reliability to reduce minimum on-die voltage
    Patent number: 9047171
    Abstract: Systems and methods may provide for determining whether a memory access request is error-tolerant, and routing the memory access request to a reliable memory region if the memory access request is error-tolerant. Moreover, the memory access request may be routed to an unreliable memory region if the memory access request is error-tolerant. In one example, use of the unreliable memory region enables a reduction in the minimum operating voltage level for a die containing the reliable and unreliable memory regions.
    Type: Grant
    Filed: September 29, 2012
    Date of Patent: June 2, 2015
    Assignee: Intel Corporation
    Inventors: Zhen Fang, Shih-Lien Lu, Ravishankar Iyer, Srihari Makineni
  • DOUBLE-SIDED, NONAGON CUTTING INSERT
    Publication number: 20150098768
    Abstract: A double-sided, nonagon cutting insert includes a top surface, a bottom surface identical to the top surface, nine side surfaces that are identical to each other, a cutting edge formed at an intersection between each of the nine side surfaces and the top and bottom surfaces for a total of eighteen cutting edges, and nine corner radiuses identical to each other, each corner radius extending between the top and bottom surfaces and each of the nine side surfaces. Each cutting edge has a non-symmetric profile with respect to a central, longitudinal axis. The non-symmetrical profile of the cutting edge has the technical advantage of providing a variable cutting force, particularly during fine finishing cutting operations.
    Type: Application
    Filed: October 8, 2013
    Publication date: April 9, 2015
    Applicant: Kennametal Inc.
    Inventors: Lewis Ray Morrison, Ravishankar Iyer
  • Methods And Apparatuses For Controlling Thread Contention
    Publication number: 20150095675
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Application
    Filed: December 9, 2014
    Publication date: April 2, 2015
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • SCREW HEAD WEDGE CLAMP ASSEMBLY FOR CUTTING TOOL
    Publication number: 20150086284
    Abstract: A screw head wedge clamp assembly for a cutting tool includes a clamp screw having a screw head with a frustum-shaped portion, and a screw head wedge clamp having a body and a clamp head extending from the body. The clamp head has a frustum-shaped portion that is received in a mounting screw bore of a cutting insert. The wedge clamp contacts a radiused bottom wall of the clamp bore when the clamp screw is threaded into a threaded bore of an insert pocket, thereby causing the clamp head to exert a downward and rearward force against a mounting screw bore of the cutting insert to securely hold the cutting insert in the insert pocket. The screw head wedge clamp does not contact a top surface of the cutting insert, but only the frustum-shaped portion contacts the mounting screw bore of the cutting insert.
    Type: Application
    Filed: September 20, 2013
    Publication date: March 26, 2015
    Applicant: Kennametal Inc.
    Inventors: Lewis Ray Morrison, Ravishankar Iyer
  • Method, apparatus, and system for energy efficiency and energy conservation including dynamic C0-state cache resizing
    Patent number: 8984311
    Abstract: Embodiments of systems, apparatuses, and methods for energy-efficient operation of a device are described. In some embodiments, a cache performance indicator of a cache is monitored, and a set of one or more cache performance parameters based on the cache performance indicator is determined. The cache is dynamically resized to an optimal cache size based on a comparison of the cache performance parameters to their energy-efficient targets to reduce power consumption.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: March 17, 2015
    Assignee: Intel Corporation
    Inventors: Jaideep Moses, Rameshkumar G. Illikkal, Ravishankar Iyer, Jared E. Bendt, Sadagopan Srinivasan, Andrew J. Herdrich, Ashish V. Choubal, Avinash N. Ananthakrishnan, Vijay S. R. Degalahal
  • CUTTING INSERT WITH FINISHING AND ROUGHING CUTTING EDGES
    Publication number: 20150071717
    Abstract: An indexable cutting insert includes a top surface, a bottom surface and a plurality of side surfaces. Each side surface includes a first pair of chip grooves, and a second pair of chip grooves. A planar corner surface is disposed between each side surface. A corner radius extends between the top and bottom surfaces and the planar corner surface. A plurality of primary wiper cutting edges are formed at an intersection between each of the first pair of chip grooves and the the top and bottom surfaces. A plurality of secondary roughing cutting edges are formed at an intersection between each corner radius and each of the first pair of chip forming grooves. A plurality of wiper cutting edges are formed at an intersection between each planar corner surface and each of the second pair of chip forming grooves. A milling cutter is also disclosed.
    Type: Application
    Filed: September 11, 2013
    Publication date: March 12, 2015
    Applicant: Kennametal Inc.
    Inventors: Lewis Ray Morrison, Ravishankar Iyer
  • Methods and apparatuses for controlling thread contention
    Patent number: 8924748
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: December 30, 2014
    Assignee: Intel Corporation
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Scheduling workloads based on cache asymmetry
    Patent number: 8898390
    Abstract: In one embodiment, a processor includes a first cache and a second cache, a first core associated with the first cache and a second core associated with the second cache. The caches are of asymmetric sizes, and a scheduler can intelligently schedule threads to the cores based at least in part on awareness of this asymmetry and resulting cache performance information obtained during a training phase of at least one of the threads.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: November 25, 2014
    Assignee: Intel Corporation
    Inventors: Xiaowei Jiang, Li Zhao, Ravishankar Iyer