Patents by Inventor Ren Chen

Ren Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12040237
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate. The semiconductor device structure includes a spacer over a side of the gate stack. The semiconductor device structure includes a dielectric layer over the substrate. The dielectric layer has a first recess, the dielectric layer has an upper portion and a first lower portion, the upper portion is over the first recess, the first recess is between the first lower portion and the spacer, and the upper portion has a convex curved sidewall.
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: July 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Heng Tsai, Chun-Sheng Liang, Pei-Lin Wu, Yi-Ren Chen, Shih-Hsun Chang
  • Publication number: 20240231405
    Abstract: The present disclosure discloses an input circuit having adaptive voltage-receiving mechanism. A voltage transmission circuit includes an internal N-type transistor and a first N-type transistor. The internal N-type transistor is coupled between an output node for generating an output voltage and a first node. The first N-type transistor is coupled between a first node and a second node and is controlled by a control voltage. The first N-type transistor generates a first node voltage at the first node. The second node is coupled to an input node for receiving an input voltage. A control voltage generation circuit includes a voltage dividing circuit and a first generation circuit. The voltage dividing circuit receives and compares the input voltage to generate a divided voltage. The first generation circuit receives the divided voltage and a supply voltage to generate the control voltage equaling the supply voltage according to the supply voltage being larger than the divided voltage.
    Type: Application
    Filed: December 12, 2023
    Publication date: July 11, 2024
    Inventor: JYUN-REN CHEN
  • Publication number: 20240234545
    Abstract: A semiconductor structure includes a substrate, a channel structure, a gate structure, two gate spacers and an insulating feature. The gate structure is disposed on the channel structure, and includes an upper gate portion which is located at a level higher than that of an uppermost surface of the channel structure. The two gate spacers are respectively located at two opposite sides of the upper gate portion, and each of the gate spacers has an upward surface having a concave profile. The insulating feature is disposed over the upper gate portion and against the concave profiles of the gate spacers to have an inverted U-shaped profile. The insulating feature includes a cap portion which is disposed on an upper surface of the upper gate portion and extends beyond an edge of the upper surface of the upper gate portion. Methods for manufacturing the semiconductor structure are also disclosed.
    Type: Application
    Filed: January 5, 2023
    Publication date: July 11, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Ren CHEN, Yi-Hsien CHEN, Chun-Ting LEE
  • Publication number: 20240222369
    Abstract: The invention provides a layout pattern of a semiconductor varactor, which comprises a plurality of varactor units arranged on a substrate, wherein each varactor unit comprises a plurality of fin structures arranged in parallel with each other, a plurality of gate structures arranged in parallel with each other, located on the substrate and spanning the fin structures, and a gate metal layer electrically connected with the plurality of gate structures.
    Type: Application
    Filed: January 19, 2023
    Publication date: July 4, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Wen Hung, Peng-Hsiu Chen, Su-Ming Hsieh, Ying-Ren Chen
  • Patent number: 12027396
    Abstract: Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.
    Type: Grant
    Filed: February 2, 2023
    Date of Patent: July 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Peng-Ren Chen, Wen-Hao Cheng, Jyun-Hong Chen, Chien-Hui Chen
  • Patent number: 12027484
    Abstract: An electronic package is provided and includes a carrier for carrying electronic components. Electrical contact pads of the carrier for planting solder balls are connected with a plurality of columnar conductors, and the conductors are electrically connected to a circuit portion in the carrier. By connecting a plurality of conductors with a single electrical contact pad, structural stress can be distributed and breakage of the circuit portion can be prevented.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: July 2, 2024
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chi-Ren Chen, Po-Yung Chang, Pei-Geng Weng, Yuan-Hung Hsu, Chang-Fu Lin, Don-Son Jiang
  • Patent number: 12021050
    Abstract: A semiconductor device including: a first formation site and a second formation site for forming a first conductive bump and a second conductive bump; when a first environmental density corresponding to the first formation site is greater than a second environmental density corresponding to the second formation site, a cross sectional area of the second formation site is greater than a cross sectional area of the first formation site; wherein the first environmental density is determined by a number of formation sites around the first formation site in a predetermined range and the second environmental density is determined by a number of formation sites around the second formation site in the predetermined range; wherein a first area having the first environmental density forms an ellipse layout while a second area having the second environmental density forms a strip layout surrounding the ellipse layout.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: June 25, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ming-Ho Tsai, Jyun-Hong Chen, Chun-Chen Liu, Yu-Nu Hsu, Peng-Ren Chen, Wen-Hao Cheng, Chi-Ming Tsai
  • Publication number: 20240202299
    Abstract: A method for identity verification is provided. At least some initial low-sensitivity information about a person is stored in a database. The method includes the following stages. The identity of the person is obtained. The initial low-sensitivity information associated with the person is searched for in the database based on the identity of the person. Biological signal data from the person are obtained according to the data category of the initial low-sensitivity information associated with the person. The biological signal data from the person are sampled and dimension reduction is performed to generate real-time low-sensitivity information associated with the person. The data category and a data form for comparing the real-time low-sensitivity information with the initial low-sensitivity information are determined. The real-time low-sensitivity information and the initial low-sensitivity information corresponding to the data category and the data form are displayed graphically.
    Type: Application
    Filed: December 20, 2022
    Publication date: June 20, 2024
    Inventors: Wei-Chen LEE, Wei-Chieh LIN, Jian-Ren CHEN
  • Publication number: 20240203573
    Abstract: A data processing method includes the following steps. According to a wound symptom record, a trend of each wound state is analyzed. According to product data of the medical appliances in the treatment record, featured text information are extracted. First correlation weight values and second correlation weight values of the wound states are generated, the first correlation weight values indicate correlations between the wound states and the medical appliances, and the second correlation weight values indicate correlations between the wound states and the featured text information. A query condition is generated according to a target state, and a target nursing keyword is generated according to the query condition. Recommended medical appliances are selected from the medical appliances according to the target nursing keyword and the second correlation weight values.
    Type: Application
    Filed: December 14, 2022
    Publication date: June 20, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yue-Min JIANG, Jian-Ren CHEN, Min-Yi HSIEH
  • Publication number: 20240182527
    Abstract: The present invention relates to novel antimicrobial peptides and compositions comprising the same. The present invention also provides a method for for treating microbial infections, including bacterial infections and fungal infections.
    Type: Application
    Filed: December 2, 2022
    Publication date: June 6, 2024
    Applicant: TZU CHI UNIVERSITY
    Inventors: Je-Wen LIOU, Yu-Ren CHEN, Chin-Hao YANG
  • Publication number: 20240178303
    Abstract: The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a first region and a second region; a first semiconductor mesa formed on the semiconductor substrate within the first region; a second semiconductor mesa formed on the semiconductor substrate within the second region; and a field effect transistor (FET) formed on the semiconductor substrate. The FET includes a first doped feature of a first conductivity type formed in a top portion of the first semiconductor mesa; a second doped feature of a second conductivity type formed in a bottom portion of the first semiconductor mesa, the second semiconductor mesa, and a portion of the semiconductor substrate between the first and second semiconductor mesas; a channel in a middle portion of the first semiconductor mesa and interposed between the source and drain; and a gate formed on sidewall of the first semiconductor mesa.
    Type: Application
    Filed: February 5, 2024
    Publication date: May 30, 2024
    Inventors: Harry-Hak-Lay Chuang, Yi-Ren Chen, Chi-Wen Liu, Chao-Hsiung Wang, Ming Zhu
  • Publication number: 20240178302
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first side and a second side opposing the first side, a source/drain epitaxial feature disposed adjacent the first side of the substrate, wherein the source/drain epitaxial feature comprises a first epitaxial layer, a second epitaxial layer in contact with the first epitaxial layer, and a third epitaxial layer having sidewalls surrounded by and in contact with the second epitaxial layer. The device structure also includes a first silicide layer in contact with the substrate, the first, second, and third epitaxial layers, a first source/drain contact extending through the substrate from the first side to the second side, and a first metal capping layer disposed between the first silicide layer and the first source/drain contact.
    Type: Application
    Filed: January 15, 2023
    Publication date: May 30, 2024
    Inventors: Yi-Ren CHEN, Chung-Ting LI
  • Publication number: 20240170954
    Abstract: A motor control method for coupled an electronic vehicle is provided. The motor controller controls a motor and is powered by a battery. The motor control method includes: when a main relay of the motor controller suddenly breaks contact, in a first phase, feeding back a surge current into the battery to suppress the surge current by a diode and a first current limit resistor of a first protecting circuit of the motor controller; and, in a second phase, conducting a discharge switch of a second protecting circuit of the motor controller by a control unit of the motor controller, and releasing the surge current to a reference voltage range by the discharge switch and a second current limit resistor of the second protecting circuit.
    Type: Application
    Filed: December 27, 2022
    Publication date: May 23, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Nan-Hsiung TSENG, Bing-Ren CHEN, Shin-Hung CHANG, Chin-Hone LIN
  • Publication number: 20240170709
    Abstract: A motion synchronized multi-tier pallet rack and a battery formation apparatus are provided. The pallet rack includes a fixation rack, two movable frames, and two actuators. The movable frames are coupled to two corresponding sides of the fixation rack and each includes telescopic arms, a motor, and a drive rod. The actuators are disposed on other the two corresponding sides of the fixation rack to drive the movable frames to move toward or away from each other. The telescopic arms are kinematically connected to the motor through the drive rod to extend from or retract into the movable frame. The battery formation apparatus includes a motion synchronized multi-tier pallet rack, a conveyor module, a formation cabinet, and a controller. The conveyor module carries a battery module. The controller controls the pallet rack to obtain the battery module from the conveyor module and place the battery module in the formation cabinet.
    Type: Application
    Filed: September 27, 2023
    Publication date: May 23, 2024
    Applicant: CHROMA ATE INC.
    Inventors: Ming-Cheng Huang, Jiun-Ren Chen, Chao-Cheng Wu, Yi-Sheng Hsu
  • Publication number: 20240151304
    Abstract: For a manual gearshift control of conventional vehicle transmission, a vehicle gearshift automatic control device including a first actuator module, a second actuator module and an electronic control unit, is provided in an add-on manner to retrofit the vehicle transmission with both automatic and manual gearshift functions. In an automatic gearshift mode, the electronic control unit executes the vehicle gearshift automatic control method and receives an automatic gearshift command to drive the first actuator module to push a shift lever to implement a lateral shift selection, or to drive the second actuator module to spin a park lever to implement a longitudinal gearshift. For vehicle security, whenever a vehicle gearshift automatic control device failure or a manual gearshift intervention is detected in the automatic gearshift mode, the electronic control unit shuts off the automatic gearshift mode and switches to a manual gearshift mode to perform the manual gearshift function.
    Type: Application
    Filed: February 17, 2023
    Publication date: May 9, 2024
    Inventors: Shao-Yu Lee, Zeng-Lung Huang, Bing-Ren Chen, Jia-Cheng Ke
  • Publication number: 20240139485
    Abstract: Microneedle arrays provided herein enable a minimally invasive platform for ocular drug delivery. Such a design and manufacture technique includes a conformable preformed interlocking mechanism configured about an elongated structure wherein the conformable preformed interlocking mechanism is arranged with a width that decreases in the needle tip direction and decreases in the base direction; and wherein each of the microneedles to include the conformable preformed interlocking mechanism is arranged to increase in area upon fluid tissue contact and decrease in area upon illumination with light.
    Type: Application
    Filed: March 3, 2022
    Publication date: May 2, 2024
    Inventors: Kuen-Ren CHEN, Maher HN AMER
  • Patent number: 11961939
    Abstract: A method of manufacturing a light-emitting device, including: providing a substrate structure including a top surface; forming a precursor layer on the top surface; removing a portion of the precursor layer and a portion of the substrate from the top surface to form a base portion and a plurality of protrusions regularly arranged on the base portion; forming a buffer layer on the base portion and the plurality protrusions; and forming a III-V compound cap layer on the buffer layer; wherein one of the plurality of protrusions comprises a first portion and a second portion formed on the first portion; wherein the first portion is integrated with the base portion and has a first material which is the same as that of the base portion; and wherein the buffer layer contacts side surfaces of the plurality of protrusions and a surface of the base portion.
    Type: Grant
    Filed: June 23, 2022
    Date of Patent: April 16, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Peng Ren Chen, Yu-Shan Chiu, Wen-Hsiang Lin, Shih-Wei Wang, Chen Ou
  • Patent number: 11950920
    Abstract: A device for estimating breast implant volume is provided, which may include an input interface and a processing circuit. A numerical value may be inputted in to the input interface. The processing circuit may calculate the estimation value of breast implant volume according to a linear model and the numerical value. The processing circuit may multiply the numerical value by a coefficient to generate a product, and add a constant to the product to generate the estimation value of breast implant volume, wherein the numerical value may be a breast sample weight or a breast size.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: April 9, 2024
    Assignee: CHANGHUA CHRISTIAN MEDICAL FOUNDATION CHANGHUA CHRISTIAN HOSPITAL
    Inventors: Wei-Chung Shia, Dar-Ren Chen
  • Publication number: 20240096297
    Abstract: In some examples, a controller of a wearable device causes display by the wearable device of a test image, and adjusts a color property of the displayed test image. In response to an input provided by a user responsive to the displayed test image as the color property is adjusted, the controller determines a distribution of color wavelengths for an eye of the user, and detects a color vision deficiency of the user based on the determined distribution of color wavelengths. The controller provides control information to control a display device of the wearable device to compensate for the color vision deficiency.
    Type: Application
    Filed: September 15, 2022
    Publication date: March 21, 2024
    Inventors: Hsiang-Ta Ke, Yu-Ren Chen, Chun-Feng Li
  • Publication number: 20240096834
    Abstract: A method is provided. The method includes determining a first bump map indicative of a first set of positions of bumps. The method includes determining, based upon the first bump map, a first plurality of bump densities associated with a plurality of regions of the first bump map. The method includes smoothing the first plurality of bump densities to determine a second plurality of bump densities associated with the plurality of regions of the first bump map. The method includes determining, based upon the second plurality of bump densities, a second bump map indicative of the first set of positions of the bumps and a set of sizes of the bumps.
    Type: Application
    Filed: March 27, 2023
    Publication date: March 21, 2024
    Inventors: Shih Hsuan HSU, Chan-Chung CHENG, Chun-Chen LIU, Cheng-Hung CHEN, Peng-Ren CHEN, Wen-Hao CHENG, Jong-l MOU