Abstract: A method for preparing V-type granular porous starch includes the following steps: mixing starch and an ethanol aqueous solution in a temperature of 100-150° C. to yield V-type granular starch; and adding a mixed enzyme including alpha-amylase and amyloglucosidase to a mixture of the V-type granular starch and the ethanol aqueous solution, to enzymatically hydrolyze the V-type granular starch to yield V-type granular porous starch.

Abstract: Implementations of the present disclosure provide a method for backup destination selection, an electronic device, and a computer program product. In one method, in a storage device set, a first group of candidate subsets is obtained, and the number of storage devices included in candidate subsets in the first group of candidate subsets is determined based on the number of copies specified by a backup task. A first group of subset codes of the first group of candidate subsets is determined. A second group of subset codes is generated according to the first group of subset codes, and codes in the second group of subset codes uniquely identify the candidate subsets. Based on the first group of candidate subsets and a second group of candidate subsets corresponding to the second group of subset codes, a target subset is selected as a backup destination of the backup task.

Abstract: An embodiment method includes: forming a gate stack over a channel region; growing a source/drain region adjacent the channel region; depositing a first ILD layer over the source/drain region and the gate stack; forming a source/drain contact through the first ILD layer to physically contact the source/drain region; forming a gate contact through the first ILD layer to physically contact the gate stack; performing an etching process to partially expose a first sidewall and a second sidewall, the first sidewall being at a first interface of the source/drain contact and the first ILD layer, the second sidewall being at a second interface of the gate contact and the first ILD layer; forming a first conductive feature physically contacting the first sidewall and a first top surface of the source/drain contact; and forming a second conductive feature physically contacting the second sidewall and a second top surface of the gate contact.

Abstract: Examples may include techniques to control an insertion ratio or rate for a cache. Examples include comparing cache miss ratios for different time intervals or windows for a cache to determine whether to adjust a cache insertion ratio that is based on a ratio of cache misses to cache insertions.

Abstract: One or more computer processors generate a plurality of adversarial perturbations associated with a model, wherein the plurality of adversarial perturbations comprises a universal perturbation and one or more per-sample perturbations. The one or more computer processors identify a plurality of neuron activations associated with the model and the plurality of generated adversarial perturbations. The one or more computer processors maximize the identified plurality of neuron activations. The one or more computer processors determine the model is a Trojan model by leveraging one or more similarities associated with the maximized neuron activations and the generated adversarial perturbations.

Abstract: Methods, apparatus, and systems for adaptive collaborative memory with the assistance of programmable networking devices. Under one example, the programmable networking device is a switch that is deployed in a system or cluster of servers comprising a plurality of nodes. The switch selects one or more nodes to be remote memory server nodes and allocate one or more portions of memory on those nodes to be used as remote memory for one or more remote memory client nodes. The switch receives memory access request messages originating from remote memory client nodes containing indicia identifying memory to be accessed, determines which remote memory server node is to be used for servicing a given memory access request, and sends a memory access request message containing indicia identifying memory to be accessed to the remote memory server node that is determined. The switch also facilitates return of messages containing remote memory access responses to the client nodes.

Abstract: There is disclosed in one example a computing apparatus, including: a processor; a multilevel cache including a plurality of cache levels; a peripheral device configured to write data directly to a selected cache level; and a cache monitoring circuit, including a cache counter to track cache lines evicted from the selected cache level without being processed; and logic to provide a direct write policy according to the cache counter.

Abstract: A method of forming a semiconductor device includes: forming a gate structure over a fin that protrudes above a substrate; forming source/drain regions over the fin on opposing sides of the gate structure; forming a first dielectric layer and a second dielectric layer successively over the source/drain regions; performing a first etching process to form an opening in the first dielectric layer and in the second dielectric layer, where the opening exposes an underlying electrically conductive feature; after performing the first etching process, performing a second etching process to enlarge a lower portion of the opening proximate to the substrate; and forming a contact plug in the opening after the second etching process.

Abstract: A semiconductor structure includes a substrate including a device region, a peripheral region surrounding the device region, and a transition region disposed between the device region and the peripheral region. An epitaxial layer is disposed on the device region, the peripheral region, and the transition region. A first portion of the epitaxial layer on the peripheral region has a poly-crystal structure.

Abstract: A microstructure may be provided by forming a metal layer such as a molybdenum layer over a substrate. An aluminum nitride layer is formed on a top surface of the metal layer. A surface portion of the aluminum nitride layer is converted into a continuous aluminum oxide-containing layer by oxidation. A dielectric spacer layer may be formed over the continuous aluminum oxide-containing layer. Contact via cavities extending through the dielectric spacer layer, the continuous aluminum oxide-containing layer, and the aluminum nitride layer and down to a respective portion of the at least one metal layer may be formed using etch processes that contain a wet etch step while suppressing formation of an undercut in the aluminum nitride layer. Contact via structures may be formed in the contact via cavities. The microstructure may include a micro-electromechanical system (MEMS) device containing a piezoelectric transducer.

Abstract: The lack of robustness of Deep Neural Networks (DNNs) against different types of attacks is problematic in adversarial environments. The long-standing and arguably most powerful natural defense system is the mammalian immune system, which has successfully defended the species against attacks by novel pathogens for millions of years. This disclosure proposes a Robust Adversarial Immune-inspired Learning System (RAILS) inspired by the mammalian immune system. The RAILS approach is demonstrated using adaptive immune system emulation to harden Deep k-Nearest Neighbor (DkNN) architectures against evasion attacks. Using evolutionary programming to simulate new B-cell generation that occurs in natural immune systems, e.g., B-cell flocking, clonal expansion, and affinity maturation, it is shown that the RAILS learning curve exhibits similar learning behavior as observed in in-vitro experiments on B-cell affinity maturation. The life-long learning mechanism allows RAILS to evolve and defend against diverse attacks.

Abstract: Technologies for dynamically managing a batch size of packets include a network device. The network device is to receive, into a queue, packets from a remote node to be processed by the network device, determine a throughput provided by the network device while the packets are processed, determine whether the determined throughput satisfies a predefined condition, and adjust a batch size of packets in response to a determination that the determined throughput satisfies a predefined condition. The batch size is indicative of a threshold number of queued packets required to be present in the queue before the queued packets in the queue can be processed by the network device.

Abstract: Examples include a computing system having a direct memory access (DMA) engine pipeline, a plurality of processing cores, each processing core including a core pipeline, and a memory coupled to the DMA engine pipeline and the plurality of processing cores. The computing system includes a pipeline selector coupled to the plurality of processing cores and the DMA engine pipeline, the pipeline selector to, during initialization, determine at least one threshold for pipeline selection for the computing system, and during runtime, select one of the core pipelines or the DMA engine pipeline to execute a memory copy operation in the memory based at least in part on the at least one threshold.

Abstract: A semiconductor device and method of manufacture are provided which help to support contacts while material is removed to form air gaps. In embodiments a contact is formed with an enlarged base to help support overlying portions of the contact. In other embodiments a scaffold material may also be placed prior to the formation of the air gaps in order to provide additional support.

Abstract: A method may include forming a mask layer on top of a first dielectric layer formed on a first source/drain and a second source/drain, and creating an opening in the mask layer and the first dielectric layer that exposes portions of the first source/drain and the second source/drain. The method may include filling the opening with a metal layer that covers the exposed portions of the first source/drain and the second source/drain, and forming a gap in the metal layer to create a first metal contact and a second metal contact. The first metal contact may electrically couple to the first source/drain and the second metal contact may electrically couple to the second source/drain. The gap may separate the first metal contact from the second metal contact by less than nineteen nanometers.

Abstract: An HEMT includes an aluminum gallium nitride layer. A gallium nitride layer is disposed below the aluminum gallium nitride layer. A zinc oxide layer is disposed under the gallium nitride layer. A source electrode and a drain electrode are disposed on the aluminum gallium nitride layer. A gate electrode is disposed on the aluminum gallium nitride layer and between the drain electrode and the source electrode.

Abstract: A semiconductor device includes a substrate having a P-type device region and an N-type device region, wherein the P-type device region includes germanium dopants. A first gate oxide layer is formed on the P-type device region and a second gate oxide layer is formed on the N-type device region. The first gate oxide layer and the second gate oxide layer are formed through a same oxidation process. The first gate oxide layer includes nitrogen dopants and the second gate oxide layer does not include the nitrogen dopants.

Abstract: Method and system for performing data movement operations is described herein. One embodiment of a method includes: storing data for a first memory address in a cache line of a memory of a first processing unit, the cache line associated with a coherency state indicating that the memory has sole ownership of the cache line; decoding an instruction for execution by a second processing unit, the instruction comprising a source data operand specifying the first memory address and a destination operand specifying a memory location in the second processing unit; and responsive to executing the decoded instruction, copying data from the cache line of the memory of the first processing unit as identified by the first memory address, to the memory location of the second processing unit, wherein responsive to the copy, the cache line is to remain in the memory and the coherency state is to remain unchanged.

Abstract: Methods, apparatus, systems, and articles of manufacture providing a tiered elastic cloud storage to increase data resiliency are disclosed.

Abstract: Embodiments of the present disclosure relate to a data backup method, a data backup device, and a computer program product. The method comprises: receiving a request for backing up stored data; determining a backup requirement based on the request, the backup requirement comprising a requirement with respect to processing backup data of the stored data in a backup system; and determining a backup operation for processing the backup data based on the backup requirement.