Patents by Inventor Ren Wang

Ren Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11257939
    Abstract: A high electron mobility transistor (HEMT) includes a buffer layer on a substrate, in which the buffer layer includes a first buffer layer and a second buffer layer. Preferably, the first buffer layer includes a first layer of the first buffer layer comprising AlyGa1-yN on the substrate and a second layer of the first buffer layer comprising AlxGa1-xN on the first layer of the first buffer layer. The second buffer layer includes a first layer of the second buffer layer comprising AlwGa1-wN on the first buffer layer and a second layer of the second buffer layer comprising AlzGa1-zN on the first layer of the second buffer layer, in which x>z>y>w.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: February 22, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yen-Hsing Chen, Yu-Ming Hsu, Yu-Chi Wang, Tsung-Mu Yang, Yu-Ren Wang
  • Publication number: 20220053005
    Abstract: One or more computer processors generate a plurality of adversarial perturbations associated with a model, wherein the plurality of adversarial perturbations comprises a universal perturbation and one or more per-sample perturbations. The one or more computer processors identify a plurality of neuron activations associated with the model and the plurality of generated adversarial perturbations. The one or more computer processors maximize the identified plurality of neuron activations. The one or more computer processors determine the model is a Trojan model by leveraging one or more similarities associated with the maximized neuron activations and the generated adversarial perturbations.
    Type: Application
    Filed: August 17, 2020
    Publication date: February 17, 2022
    Inventors: Sijia Liu, Pin-Yu Chen, Jinjun Xiong, GAOYUAN ZHANG, Meng Wang, Ren Wang
  • Patent number: 11249862
    Abstract: Embodiments of the present disclosure provide a method, electronic device and computer program product for managing a backup system. The method comprises: determining, based on historical backup information of the backup system in a first time period, at least one temporal feature corresponding to the first time period, the historical backup information indicating a set of numbers of backup jobs executed by the backup system in the first time period; determining, based on the at least one temporal feature, a set of predicted numbers of backup jobs expected to be executed by the backup system in a second time period; and determining a health status of the backup system based on the set of predicted numbers and a set of actual numbers of backup jobs executed actually by the backup system in the second time period. In this way, the health status of the backup system can be determined in time.
    Type: Grant
    Filed: May 5, 2020
    Date of Patent: February 15, 2022
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Aaron Ren Wang, Weiyang Liu, Ming Zhang, Qi Wang, Jerry Zengjie Zhang
  • Publication number: 20220039428
    Abstract: The disclosure provides a method to improve the solubility of double hydrophobic proteins in water. The method includes: 1) adding a first hydrophobic protein and a second hydrophobic protein to distilled water, stirring, adding an aqueous alkali to the mixture until the pH of the mixture is greater than or equal to 10.0; 2) stirring the mixture for 30-120 min at 500-2000 rpm; 3) stirring the mixture obtained from 2) for 45-75 min at 500-2000 rpm and meanwhile dropwise adding an acid solution to the mixture until the pH of the mixture is 7.0, to yield a first solution; 4) dialyzing the first solution of the acid solution and the mixture in 3) for 20-30 hours, to yield a second solution; 5) centrifuging the second solution obtained from 4) at 4000-10000×g for 10-30 min, and collecting a supernatant; and 6) freezing and drying the supernatant.
    Type: Application
    Filed: April 19, 2021
    Publication date: February 10, 2022
    Inventors: Ren WANG, Tao WANG, Wei FENG, Zhengxing CHEN, Lulu LI, Fangsi LI
  • Publication number: 20220043581
    Abstract: Embodiments of the present disclosure provide a storage management method, an electronic device, and a computer program product. The method includes: determining, in a storage device set, a plurality of candidate subsets of storage devices used for data backup, wherein the plurality of candidate subsets include substantially the same number of storage devices. The method further includes: determining global balance degrees respectively corresponding to the plurality of candidate subsets, wherein the global balance degree indicates a usage balance degree of the storage device set when storage devices in a corresponding candidate subset are used for data backup. The method further includes: determining a target subset of storage devices for data backup in the plurality of candidate subsets based on the global balance degrees.
    Type: Application
    Filed: September 30, 2020
    Publication date: February 10, 2022
    Inventors: Qi Wang, Zhen Jia, Yun Zhang, Ren Wang, Jing Yu
  • Publication number: 20220045173
    Abstract: A semiconductor device includes an epitaxial substrate. The epitaxial substrate includes a substrate. A strain relaxed layer covers and contacts the substrate. A III-V compound stacked layer covers and contacts the strain relaxed layer. The III-V compound stacked layer is a multilayer epitaxial structure formed by aluminum nitride, aluminum gallium nitride or a combination of aluminum nitride and aluminum gallium nitride.
    Type: Application
    Filed: October 21, 2021
    Publication date: February 10, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Ming Hsu, Yu-Chi Wang, Yen-Hsing Chen, Tsung-Mu Yang, Yu-Ren Wang
  • Publication number: 20220018009
    Abstract: A microstructure may be provided by forming a metal layer such as a molybdenum layer over a substrate. An aluminum nitride layer is formed on a top surface of the metal layer. A surface portion of the aluminum nitride layer is converted into a continuous aluminum oxide-containing layer by oxidation. A dielectric spacer layer may be formed over the continuous aluminum oxide-containing layer. Contact via cavities extending through the dielectric spacer layer, the continuous aluminum oxide-containing layer, and the aluminum nitride layer and down to a respective portion of the at least one metal layer may be formed using etch processes that contain a wet etch step while suppressing formation of an undercut in the aluminum nitride layer. Contact via structures may be formed in the contact via cavities. The microstructure may include a micro-electromechanical system (MEMS) device containing a piezoelectric transducer.
    Type: Application
    Filed: July 17, 2020
    Publication date: January 20, 2022
    Inventors: Yuan-Chih Hsieh, Yi-Ren Wang, Hung-Hua Lin
  • Patent number: 11222951
    Abstract: A method of semiconductor fabrication includes providing a semiconductor structure having a substrate and first, second, third, and fourth fins above the substrate. The method further includes forming an n-type epitaxial source/drain (S/D) feature on the first and second fins, forming a p-type epitaxial S/D feature on the third and fourth fins, and performing a selective etch process on the semiconductor structure to remove upper portions of the n-type epitaxial S/D feature and the p-type epitaxial S/D feature such that more is removed from the n-type epitaxial S/D feature than the p-type epitaxial S/D feature.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: January 11, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang, Chun-An Lin, Wei-Yuan Lu, Guan-Ren Wang, Peng Wang
  • Publication number: 20210408276
    Abstract: A semiconductor device and method of manufacture are provided which help to support contacts while material is removed to form air gaps. In embodiments a contact is formed with an enlarged base to help support overlying portions of the contact. In other embodiments a scaffold material may also be placed prior to the formation of the air gaps in order to provide additional support.
    Type: Application
    Filed: June 30, 2020
    Publication date: December 30, 2021
    Inventors: Ching-Feng Fu, Guan-Ren Wang, Yun-Min Chang, Yu-Lien Huang
  • Publication number: 20210406147
    Abstract: An apparatus and method for closed loop dynamic resource allocation.
    Type: Application
    Filed: June 27, 2020
    Publication date: December 30, 2021
    Inventors: BIN LI, REN WANG, KSHITIJ ARUN DOSHI, FRANCESC GUIM BERNAT, YIPENG WANG, RAVISHANKAR IYER, ANDREW HERDRICH, TSUNG-YUAN TAI, ZHU ZHOU, RASIKA SUBRAMANIAN
  • Publication number: 20210408231
    Abstract: In an embodiment, a device includes: a first source/drain region; a second source/drain region; an inter-layer dielectric (ILD) layer over the first source/drain region and the second source/drain region; a first source/drain contact extending through the ILD layer, the first source/drain contact connected to the first source/drain region; a second source/drain contact extending through the ILD layer, the second source/drain contact connected to the second source/drain region; and an isolation feature between the first source/drain contact and the second source/drain contact, the isolation feature including a dielectric liner and a void, the dielectric liner surrounding the void.
    Type: Application
    Filed: June 30, 2020
    Publication date: December 30, 2021
    Inventors: Yu-Lien Huang, Guan-Ren Wang, Ching-Feng Fu
  • Patent number: 11204862
    Abstract: A method, a device, and a program product for evaluating an application program interface (API) are provided in embodiments of the present disclosure. According to some embodiments, a method for evaluating an API includes determining a specification score of the API by comparing a definition description for the API with a predetermined specification corresponding to the API. The specification score indicates a degree of matching between the definition description and the predetermined specification. Additionally, the method for evaluating an API includes determining a test score for the API by applying a predetermined test case set to a code set of the API. The test score indicates a test status for the code set. Further, the method for evaluating an API includes determining a maturity metric of the API based on the specification score and the test score.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: December 21, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Aaron Ren Wang, Qi Wang, Yun Zhang, Weiyang Liu, Ming Zhang
  • Publication number: 20210391184
    Abstract: In an embodiment, a structure includes: a contact etch stop layer (CESL) over a substrate; a fin extending through the CESL; an epitaxial source/drain region in the fin, the epitaxial source/drain region extending through the CESL; a silicide contacting upper facets of the epitaxial source/drain region; a source/drain contact contacting the silicide, lower facets of the epitaxial source/drain region, and a first surface of the CESL; and an inter-layer dielectric (ILD) layer surrounding the source/drain contact, the ILD layer contacting the first surface of the CESL.
    Type: Application
    Filed: June 11, 2020
    Publication date: December 16, 2021
    Inventors: Yu-Lien Huang, Guan-Ren Wang, Ching-Feng Fu
  • Patent number: 11201940
    Abstract: Technologies for flow rule aware exact match cache compression include multiple computing devices in communication over a network. A computing device reads a network packet from a network port and extracts one or more key fields from the packet to generate a lookup key. The key fields are identified by a key field specification of an exact match flow cache. The computing device may dynamically configure the key field specification based on an active flow rule set. The computing device may compress the key field specification to match a union of non-wildcard fields of the active flow rule set. The computing device may expand the key field specification in response to insertion of a new flow rule. The computing device looks up the lookup key in the exact match flow cache and, if a match is found, applies the corresponding action. Other embodiments are described and claimed.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: December 14, 2021
    Assignee: Intel Corporation
    Inventors: Yipeng Wang, Ren Wang, Antonio Fischetti, Sameh Gobriel, Tsung-Yuan C. Tai
  • Patent number: 11198606
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a capping structure over a device substrate. The device substrate includes a first microelectromechanical systems (MEMS) device and a second MEMS device laterally offset from the first MEMS device. The capping structure includes a first cavity overlying the first MEMS device and a second cavity overlying the second MEMS device. The first cavity has a first gas pressure and the second cavity has a second gas pressure different from the first cavity. An outgas layer abutting the first cavity. The outgas layer includes an outgas material having an outgas species. The outgas material is amorphous.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: December 14, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Ren Wang, Shing-Chyang Pan, Yuan-Chih Hsieh
  • Publication number: 20210376101
    Abstract: A semiconductor device including source/drain contacts extending into source/drain regions, below topmost surfaces of the source/drain regions, and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a semiconductor substrate; a first channel region over the semiconductor substrate; a first gate stack over the semiconductor substrate and surrounding four sides of the first channel region; a first epitaxial source/drain region adjacent the first gate stack and the first channel region; and a first source/drain contact coupled to the first epitaxial source/drain region, a bottommost surface of the first source/drain contact extending below a topmost surface of the first channel region.
    Type: Application
    Filed: May 29, 2020
    Publication date: December 2, 2021
    Inventors: Guan-Ren Wang, Yun-Min Chang, Yu-Lien Huang, Ching-Feng Fu
  • Publication number: 20210376139
    Abstract: In an embodiment, a structure includes: a gate stack over a channel region of a substrate; a source/drain region adjacent the channel region; a first inter-layer dielectric (ILD) layer over the source/drain region; a silicide between the first ILD layer and the source/drain region, the silicide contacting a top surface of the source/drain region and a bottom surface of the source/drain region; and a first source/drain contact having a first portion and a second portion, the first portion of the first source/drain contact disposed between the silicide and the first ILD layer, the second portion of the first source/drain contact extending through the first ILD layer and contacting the silicide.
    Type: Application
    Filed: June 1, 2020
    Publication date: December 2, 2021
    Inventors: Yu-Lien Huang, Guan-Ren Wang, Ching-Feng Fu
  • Publication number: 20210364560
    Abstract: An apparatus may include a sense resistor comprising a plurality of parallel-coupled resistor elements, a plurality of positive voltage sense points, and a plurality of negative voltage sense points. A first passive combination network may be configured to combine the plurality of positive voltage sense points into a single positive sense terminal and a second passive combination network may be configured to combine the plurality of negative voltage sense points into a single negative sense terminal. The first passive combination network and the second passive combination network may be arranged such that a sense voltage is measurable between the single positive sense terminal and the single negative sense terminal and a dependence of the sense voltage on a variation in current density in the parallel-coupled resistor elements is minimized.
    Type: Application
    Filed: December 10, 2020
    Publication date: November 25, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Kathryn R. HOLLAND, Bo-Ren WANG, Ravi K. KUMMARAGUNTLA, Graeme G. MACKAY, Christian LARSEN
  • Publication number: 20210367887
    Abstract: Apparatus, methods, and systems for tuple space search-based flow classification using cuckoo hash tables and unmasked packet headers are described herein. A device can communicate with one or more hardware switches. The device can include memory to store hash table entries of a hash table. The device can include processing circuitry to perform a hash lookup in the hash table. The lookup can be based on an unmasked key include in a packet header corresponding to a received data packet. The processing circuitry can retrieve an index pointing to a sub-table, the sub-table including a set of rules for handling the data packet. Other embodiments are also described.
    Type: Application
    Filed: August 6, 2021
    Publication date: November 25, 2021
    Inventors: Ren Wang, Tsung-Yuan C. Tai, Yipeng Wang, Sameh Gobriel
  • Publication number: 20210366780
    Abstract: A method may include forming a mask layer on top of a first dielectric layer formed on a first source/drain and a second source/drain, and creating an opening in the mask layer and the first dielectric layer that exposes portions of the first source/drain and the second source/drain. The method may include filling the opening with a metal layer that covers the exposed portions of the first source/drain and the second source/drain, and forming a gap in the metal layer to create a first metal contact and a second metal contact. The first metal contact may electrically couple to the first source/drain and the second metal contact may electrically couple to the second source/drain. The gap may separate the first metal contact from the second metal contact by less than nineteen nanometers.
    Type: Application
    Filed: May 19, 2020
    Publication date: November 25, 2021
    Inventors: Yu-Lien HUANG, Ching-Feng FU, Huan-Just LIN, Fu-Sheng LI, Tsai-Jung HO, Bor Chiuan HSIEH, Guan-Xuan CHEN, Guan-Ren WANG