Patents by Inventor Reshmi Basu
Reshmi Basu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11940874Abstract: Methods, systems, and devices for queue management for a memory system are described. The memory system may include a first decoder associated with a first error control capability and a second decoder associated with a second error control capability. The memory system may receive a command and identify an expected latency for performing an error control operation on the command. The memory system may determine whether to assign the command to a first queue associated with the first decoder or a second queue associated with the second decoder based at least in part on the expected latency for processing the command using the first decoder. Upon assigning the command to a decoder, the command may be processed by the first queue or the second queue.Type: GrantFiled: August 8, 2022Date of Patent: March 26, 2024Assignee: Micron Technology, Inc.Inventors: Nitul Gohain, Jonathan S. Parry, Reshmi Basu
-
Publication number: 20240078020Abstract: Methods, systems, and devices for write booster pinning are described. In some examples, a memory device may receive one or more commands (e.g., write commands) while operating in a first mode (e.g., a write booster mode). Some write commands may include an indication to pin the data to one or more SLCs. For example, a first write command may be associated with first data and a first indicator and a second write command may be associated with second data. Both the first data and the second data may be written to one or more SLCs. When maintenance operations are performed on the SLCs, the second data may be moved (e.g., written) to one or more MLCs. Additionally or alternatively, the memory system may receive one or more commands to unpin data (e.g., the first data) such that it may be moved to one or more MLCs during subsequent maintenance operations.Type: ApplicationFiled: September 6, 2022Publication date: March 7, 2024Inventors: Reshmi Basu, Jonathan S. Parry, Yanhua Bi
-
Patent number: 11907584Abstract: Methods and systems associated with data modification are described. Examples can include receiving, at a controller of a device, data associated with a read or write command transmitted to a memory resource and modifying the data using logic before transmitting the data to a host or image sensor or before writing the data to the memory resource. The modification can include removing one or more bits from the data, reordering one or more bits of the data, changing a format of the data, or any combination thereof. The modified data can be transmitted to the host or image sensor or written to the memory resource. In some examples, a plurality of memory devices can combine modified data for transmitting to a host.Type: GrantFiled: October 17, 2022Date of Patent: February 20, 2024Assignee: Micron Technology, Inc.Inventors: Reshmi Basu, Libo Wang
-
Publication number: 20240053905Abstract: Methods, systems, and devices for compression and decompression of trim data are described. A memory system may store one or more trim settings to a volatile memory in a compressed manner, and may expand (e.g., decompress) the data as part of a write operation to a non-volatile memory (e.g., during a start-up procedure). For example, compressed (e.g., non-expanded) data including trim settings may be stored to a volatile memory, and a portion of the array of volatile memory cells may be temporarily allocated to expand the data (e.g., copy the data, invert the data, copy the inverted data). Once the data is expanded, it may be stored in the non-volatile memory, and the temporarily allocated portion of the array of volatile memory cells may be reallocated (e.g., allocated for another purpose). The expanded data may include multiple copies and inverted copies of the trim settings.Type: ApplicationFiled: August 15, 2022Publication date: February 15, 2024Inventors: Reshmi Basu, Jonathan S. Parry, Giuseppe Cariello, Stephen Hanna
-
Publication number: 20240053925Abstract: Methods, systems, and devices for caching for a multiple-level memory device are described. First data may be received for writing to a memory device that include multiple-level cells that are programmable using multiple programming modes. Based on receiving the first data, the first data may be written to first multiple-level cells using a first programming mode. Based on writing the first data to the first multiple-level cells, the first data may be transferred from the first multiple-level cells to second multiple-level cells using a third programming mode. Later, second data writing to the memory device may be received. Based on receiving the second data, a determination of whether to write the second data to third multiple-level cells using the first programming mode or a second programming mode may be made based on available multiple-level cells that are ready for programming.Type: ApplicationFiled: August 15, 2022Publication date: February 15, 2024Inventors: Reshmi Basu, Jonathan S. Parry, Nitul Gohain
-
Publication number: 20240045762Abstract: Methods, systems, and devices for queue management for a memory system are described. The memory system may include a first decoder associated with a first error control capability and a second decoder associated with a second error control capability. The memory system may receive a command and identify an expected latency for performing an error control operation on the command. The memory system may determine whether to assign the command to a first queue associated with the first decoder or a second queue associated with the second decoder based at least in part on the expected latency for processing the command using the first decoder. Upon assigning the command to a decoder, the command may be processed by the first queue or the second queue.Type: ApplicationFiled: August 8, 2022Publication date: February 8, 2024Inventors: Nitul Gohain, Jonathan S. Parry, Reshmi Basu
-
Publication number: 20240045596Abstract: Methods, systems, and devices for low-power boot-up for memory systems are described. A memory system may be configured to receive, over a first conductive path of a second communication interface, a first indication to boot-up a memory system and a first communication interface associated with the memory system, wherein the first communication interface includes a plurality of conductive paths; receive, over a second conductive path of the second communication interface, a second indication whether to perform a boot-up operation of the memory system using a low-power mode or a high-power mode based at least in part on receiving the first indication; and boot the memory system according to the low-power mode or the high-power mode based at least in part on receiving the second indication.Type: ApplicationFiled: August 4, 2022Publication date: February 8, 2024Inventors: Reshmi Basu, Jonathan S. Parry, David Aaron Palmer, Luca Porzio, Giuseppe Cariello, Stephen Hanna
-
Publication number: 20240037960Abstract: Methods, systems, and apparatuses related to autonomous vehicle object detection are described. An autonomous vehicle can capture an image corresponding to an unknown object disposed within a sight line of the autonomous vehicle. Processing resources available to a plurality of memory devices associated with the autonomous vehicle can be reallocated in response to capturing the image and an operation involving the image corresponding to the unknown object to classify the unknown object can be performed using the reallocated processing resources.Type: ApplicationFiled: October 5, 2023Publication date: February 1, 2024Inventor: Reshmi Basu
-
Patent number: 11886331Abstract: A method includes writing a first codeword to a first set of contiguous partitions in a first memory die of a memory device. The method further includes writing a first portion of a second codeword to a second set of contiguous partitions in the first memory die of the memory device and writing a second portion of the second codeword to a first set of contiguous partitions in a second memory die of the memory device. The method also includes writing a third codewords to a second set of contiguous partitions in the second memory die of the memory device.Type: GrantFiled: February 15, 2023Date of Patent: January 30, 2024Assignee: Micron Technology, Inc.Inventor: Reshmi Basu
-
Publication number: 20240020986Abstract: Methods, systems, and apparatuses related to autonomous vehicle object detection are described. A method can include receiving, by an autonomous vehicle, an indication that the autonomous vehicle has entered a network coverage zone generated by a base station and performing an operation to reallocate computing resources between a plurality of different types of memory devices associated with the autonomous vehicle in response to receiving the indication. The method can further include capturing, by the autonomous vehicle, data corresponding to an unknown object disposed within a sight line of the autonomous vehicle and performing, using the reallocated computing resources, an operation involving the data corresponding to the unknown object to classify the unknown object.Type: ApplicationFiled: September 29, 2023Publication date: January 18, 2024Inventor: Reshmi Basu
-
Patent number: 11874753Abstract: Systems, apparatuses, and methods related log compression are described. In an example, a system log that identifies targeted data may be compiled in a memory resource during an execution of an operation using that memory resource. The system log may be analyzed utilizing a portion of the memory resource that would otherwise be available to be utilized in the execution of the operation. The system log may be compressed during the execution of the operation, the level or timing of such compression may be based on the analysis that occurs contemporaneous to or as a result of executing the operation. In some examples, compressing the system log may include discarding a portion of the system log. Compressing the system log may also include extracting the targeted data from the system log as the system log is being compiled and converting the extracted targeted data to structured data.Type: GrantFiled: October 17, 2022Date of Patent: January 16, 2024Assignee: Micron Technology, Inc.Inventors: Reshmi Basu, Libo Wang
-
Patent number: 11861222Abstract: Systems, apparatuses, and methods related to object management in tiered memory systems are discussed. An example method can include writing a memory object to a first memory device of a first type of memory medium. The example method can include determining that a size of the memory object meets or exceeds a threshold data size. The example method can include writing the memory object to a second memory device that comprises a second type of memory medium different than the first type. The first memory medium can be a non-volatile memory comprising phase-change memory or resistive random access memory (RAM) and the second memory medium can be NAND Flash or NOR Flash.Type: GrantFiled: May 17, 2021Date of Patent: January 2, 2024Assignee: Micron Technology, Inc.Inventor: Reshmi Basu
-
Patent number: 11853558Abstract: Apparatuses and methods can be related power down workload estimations using artificial neural networks. Workload estimation can include predicting a duration of a subsequent power down event of the memory device. A quantity of maintenance operations to be performed on the memory device, may be predicted based on the predicted duration of the subsequent power down event, when the memory device is powered on after the subsequent power down event using an artificial neural network. The quantity of maintenance operations may be performed on the memory device prior to the subsequent power down event of the memory device.Type: GrantFiled: April 12, 2022Date of Patent: December 26, 2023Assignee: Micron Technology, Inc.Inventors: David A. Palmer, Jonathan S. Parry, Reshmi Basu
-
Publication number: 20230376243Abstract: Methods, systems, and devices for storing parity during refresh operations are described. In some examples, refresh operations may be performed on a memory device when the memory device is idle. For example, a refresh operation may entail performing a logical operation on first data and a first set of parity bits and second data and a second set of parity bits. The logical operation may generate a third set of parity bits which may be used for data retention purposes. Moreover, during a read operation, the third set of parity bits may be used to recover corrupt or otherwise invalid data in the event of an error.Type: ApplicationFiled: May 18, 2022Publication date: November 23, 2023Inventors: Reshmi Basu, Jonathan S. Parry
-
Publication number: 20230325122Abstract: In some implementations, a storage system may receive, via a system controller of the storage system, a write command and data associated with the write command. The storage system may classify, via the system controller, the data. The storage system may associate, via the system controller, the data with a queue based on classifying the data. The storage system may retrieve, via a processor of the storage system, the data associated with the queue. The storage system may compress, via the processor, the data to form compressed data for storage in a memory device of the storage system based on the write command.Type: ApplicationFiled: April 4, 2023Publication date: October 12, 2023Inventors: Reshmi BASU, Aditi P. KULKARNI, Kari CRANE
-
Patent number: 11783595Abstract: Methods, systems, and apparatuses related to autonomous vehicle object detection are described. An autonomous vehicle can capture an image corresponding to an unknown object disposed within a sight line of the autonomous vehicle. Processing resources available to a plurality of memory devices associated with the autonomous vehicle can be reallocated in response to capturing the image and an operation involving the image corresponding to the unknown object to classify the unknown object can be performed using the reallocated processing resources.Type: GrantFiled: May 17, 2021Date of Patent: October 10, 2023Assignee: Micron Technology, Inc.Inventor: Reshmi Basu
-
Patent number: 11776278Abstract: Methods, systems, and apparatuses related to autonomous vehicle object detection are described. A method can include receiving, by an autonomous vehicle, an indication that the autonomous vehicle has entered a network coverage zone generated by a base station and performing an operation to reallocate computing resources between a plurality of different types of memory devices associated with the autonomous vehicle in response to receiving the indication. The method can further include capturing, by the autonomous vehicle, data corresponding to an unknown object disposed within a sight line of the autonomous vehicle and performing, using the reallocated computing resources, an operation involving the data corresponding to the unknown object to classify the unknown object.Type: GrantFiled: May 17, 2021Date of Patent: October 3, 2023Assignee: Micron Technology, Inc.Inventor: Reshmi Basu
-
Publication number: 20230305617Abstract: Methods, systems, and devices for dynamic power modes for boot-up procedures are described. A memory system may initiate a boot-up procedure according to a predefined first power mode that is associated with a first power consumption. The memory system may then determine whether to perform the boot-up procedure according to the first power mode or a second power mode associated with a different second power consumption. In cases that the memory system receives an indication of the second power mode from the host system, the memory system may perform the boot-up procedure according to the second power mode. Additionally, in cases that the memory system does not receive an indication of the second power mode from the host system, the memory system may perform the boot-up procedure according to the first power mode.Type: ApplicationFiled: January 12, 2023Publication date: September 28, 2023Inventors: Luca Porzio, Christian M. Gyllenskog, Giuseppe Cariello, Marco Onorato, Roberto IZZI, Stephen Hanna, Jonathan S. Parry, Reshmi Basu, Nadav Grosz, David Aaron Palmer
-
Patent number: 11762553Abstract: Methods, systems, and apparatuses related to runtime selection of memory devices and storage devices in a disaggregated memory system are described. For example, a controller can be coupled to a plurality of memory device and a plurality of storage devices. The controller can receive signaling indicative of a memory request corresponding to execution of an application. Responsive to receiving the signaling indicative of the memory request, the controller can select a memory device or a storage device, or both, selecting from the plurality of memory devices or the plurality of storage devices, or both, to perform a memory operation associated with the memory request. Responsive to receiving the memory request and selecting the memory device or the storage device, or both, the controller can perform the memory operation using the selected memory device or the selected storage device, or both.Type: GrantFiled: July 26, 2022Date of Patent: September 19, 2023Assignee: Micron Technology, Inc.Inventors: Reshmi Basu, Richard C. Murphy
-
Publication number: 20230289283Abstract: A method includes writing a first codeword to a first set of contiguous partitions in a first memory die of a memory device. The method further includes writing a first portion of a second codeword to a second set of contiguous partitions in the first memory die of the memory device and writing a second portion of the second codeword to a first set of contiguous partitions in a second memory die of the memory device. The method also includes writing a third codewords to a second set of contiguous partitions in the second memory die of the memory device.Type: ApplicationFiled: February 15, 2023Publication date: September 14, 2023Inventor: Reshmi Basu