Abstract: Printed micro-LEDs have a top metal anode electrode that is relatively tall and narrow and a bottom cathode electrode. After the LED ink is cured, the bottom electrodes are in electrical contact with a conductive layer on a substrate. The locations of the LEDs are random. A thin dielectric layer is then printed between the LEDs, and a thin conductive layer, such as a nano-wire layer, is then printed over the dielectric layer to contact the anode electrodes. The top conductive layer over the tall anode electrodes has bumps corresponding with the locations of the LEDs. An omniphobic liquid is then printed which only resides in the “low” areas of the top conductive layer between the bumps. Any optical material is then uniformly printed over the resulting surface. The printed optical material accumulates only on the bump areas by adhesion and surface tension, so is self-aligned with the individual LEDs.

Abstract: In one embodiment, a power MOSFET vertically conducts current. A bottom electrode may be connected to a positive voltage, and a top electrode may be connected to a low voltage, such as a load connected to ground. A gate and/or a field plate, such as polysilicon, is within a trench. The trench has a tapered oxide layer insulating the polysilicon from the silicon walls. The oxide is much thicker near the bottom of the trench than near the top to increase the breakdown voltage. The tapered oxide is formed by implanting nitrogen into the trench walls to form a tapered nitrogen dopant concentration. This forms a tapered silicon nitride layer after an anneal. The tapered silicon nitride variably inhibits oxide growth in a subsequent oxidation step.

Abstract: Methods of expressing animation in a data stream are disclosed. In one embodiment, a method of expressing animation in a data stream includes defining animation states in the data stream with each state having at least one property such that properties are animated as a group. The animation states that are defined in the data stream may be expressed as an extension of a styling sheet language. The data stream may include web content and the defined animation states.

Abstract: In one embodiment, an authentication area on a portable object comprises a random arrangement of printed LEDs and a wavelength conversion layer. The object to be authenticated may be a credit card, casino chip, or other object. When the LEDs are energized during authentication of the object, the emitted spectrum and/or persistence of the wavelength conversion layer is detected and encoded in a first code, then compared to valid codes stored in the database. If there is a match, the object is authenticated. The LED power may be remotely inductively coupled and may flash the LEDs, while the wavelength conversion layer emission slowly decays during its optical detection. The flash of blue LED light may be emitted from the edges of the object, which may act as a light guide, for optical feedback to the user that the object is being authenticated.

Abstract: Printed micro-LEDs have a top metal anode electrode that is relatively tall and narrow and a bottom cathode electrode. After the LED ink is cured, the bottom electrodes are in electrical contact with a conductive layer on a substrate. The locations of the LEDs are random. A thin dielectric layer is then printed between the LEDs, and a thin conductive layer, such as a nano-wire layer, is then printed over the dielectric layer to contact the anode electrodes. The top conductive layer over the tall anode electrodes has bumps corresponding with the locations of the LEDs. An omniphobic liquid is then printed which only resides in the “low” areas of the top conductive layer between the bumps. Any optical material is then uniformly printed over the resulting surface. The printed optical material accumulates only on the bump areas by adhesion and surface tension, so is self-aligned with the individual LEDs.

Abstract: An insulated gate turn-off (IGTO) device, formed as a die, has a layered structure including a p+ layer (e.g., a substrate), an n? epi layer, a p-well, trenched insulated gate regions formed in the p-well, and n+ regions between the gate regions, so that vertical NPN and PNP transistors are formed. The device may be formed of a matrix of cells or may be interdigitated. To turn the device on, a positive voltage is applied to the gate, referenced to the cathode. The cells further contain a vertical p-channel MOSFET, for rapidly turning the device off. The p-channel MOSFET may be made a depletion mode device by implanting boron ions at an angle into the trenches to create a p-channel. This allows the IGTO device to be turned off with a zero gate voltage while in a latch-up condition, when the device is acting like a thyristor.

Abstract: Dual-base two-sided bipolar power transistors which use an insulated field plate to separate the emitter/collector diffusions from the nearest base contact diffusion. This provides a surprising improvement in turn-off performance, and in breakdown voltage.

Abstract: In one embodiment, an authentication area on a portable object comprises a random arrangement of printed LEDs and a wavelength conversion layer. The object to be authenticated may be a credit card, casino chip, or other object. When the LEDs are energized during authentication of the object, the emitted spectrum and/or persistence of the wavelength conversion layer is detected and encoded in a first code, then compared to valid codes stored in the database. If there is a match, the object is authenticated. The LED power may be remotely inductively coupled and may flash the LEDs, while the wavelength conversion layer emission slowly decays during its optical detection. The flash of blue LED light may be emitted from the edges of the object, which may act as a light guide, for optical feedback to the user that the object is being authenticated.

Abstract: In one embodiment, a printed LED area comprises a random arrangement of printed LEDs and a wavelength conversion layer. The LED area is embedded in an object to be authenticated, such as a credit card or a casino chip. The object may include a light guide for enabling the generated light to be emitted from any portion of the object. In one embodiment, when the LEDs are energized during authentication of the object, the existence of light emitted by the object is sufficient authentication and/or provides feedback to the user that the object is being detected. For added security, the emitted spectrum vs. intensity and persistence of the wavelength conversion layer is detected and encoded in a first code, then compared to valid codes stored in the database. If there is a match, the object is authenticated.

Abstract: A vertical bidirectional insulated gate turn-off (IGTO) device includes a top half formed over a top surface of a substrate and a bottom half formed over the bottom surface of the substrate. A top electrode is formed over the top half, and a bottom electrode is formed over the bottom half. The layered structure forms vertical NPN and PNP transistors. Each half includes trenched gates. When a first polarity voltage is applied across the electrodes, one of the halves may be turned on by biasing its gates to conduct current between the top and bottom electrodes. When a voltage of an opposite polarity is applied across the electrodes, the other one of the halves may be turned on by biasing its gates to conduct current between the two electrodes. In one embodiment, biasing the gates increases the beta of the NPN transistor to turn on the device.

Abstract: Printed micro-LEDs have a top metal anode electrode that is relatively tall and narrow and a bottom cathode electrode. After the LED ink is cured, the bottom electrodes are in electrical contact with a conductive layer on a substrate. The locations of the LEDs are random. A thin dielectric layer is then printed between the LEDs, and a thin conductive layer, such as a nano-wire layer, is then printed over the dielectric layer to contact the anode electrodes. The top conductive layer over the tall anode electrodes has bumps corresponding with the locations of the LEDs. An omniphobic liquid is then printed which only resides in the “low” areas of the top conductive layer between the bumps. Any optical material is then uniformly printed over the resulting surface. The printed optical material accumulates only on the bump areas by adhesion and surface tension, so is self-aligned with the individual LEDs.

Abstract: Power devices using refilled trenches with permanent charge at or near their sidewalls. These trenches extend vertically into a drift region.

Abstract: Structures and fabrication methods for increasing the density of trench transistor devices and the like. During fabrication of a trench transistor device, a vertical protrusion (or “hat”) of oxide is left in place above the gate trench. This vertical protrusion is self-aligned to the gate trench, and is used to define the positions of sidewall spacers (made e.g. of silicon nitride). These sidewall spacers define a space outward from the edge of the gate trench; by performing a recess etch which is delimited by these sidewall spacers, the resistance of the source contact and the body contact is minimized. The spacing between the gate trench and the recessed-contact field-plate trench can therefore be minimized and well controlled, which improves density without degrading on-resistance nor breakdown voltage.

Abstract: A high power vertical insulated-gate switch is described that includes an active region, containing a cell array, and a surrounding termination region. The termination region is for at least the purpose of controlling a breakdown voltage and does not contain any switching cells. Assuming the anode is the silicon substrate (p-type), it is desirable to have good hole injection efficiency from the substrate in the active region in the device's on-state. Therefore, the substrate should be highly doped (p++) in the active region. It is desirable to have poor hole injection efficiency in the termination region so that there is a minimum concentration of holes in the termination region when the switch is turned off. Various doping techniques are disclosed that cause the substrate to efficiency inject holes into the active region but inefficiently inject holes into the termination region during the on-state.

Abstract: An insulated gate turn-off (IGTO) device, formed as a die, has a layered structure including a P+ layer (e.g., a substrate), an N? epi layer, a P-well, vertical insulated gates formed in the P-well, and N+ regions between at least some of the gates, so that vertical NPN and PNP transistors are formed. A source/emitter electrode is on top, and a drain/cathode electrode is on the bottom of the substrate. The device is formed of a matrix of cells. To turn the device on, a positive voltage is applied to the gates, referenced to the source/emitter electrode. Some of the cells are passive, having gates that are either not connected to the active gates or having gates that are shorted to their associated N+ regions, to customize the input capacitance and lower the saturation current. Other techniques are described to form the passive cells.

Abstract: Dual-base two-sided bipolar power transistors which use an insulated field plate to separate the emitter/collector diffusions from the nearest base contact diffusion. This provides a surprising improvement in turn-off performance, and in breakdown voltage.

Abstract: Methods and systems for power semiconductor devices integrating multiple trench transistors on a single chip. Multiple power transistors (or active regions) are paralleled, but one transistor has a lower threshold voltage. This reduces the voltage drop when the transistor is forward-biased. In an alternative embodiment, the power device with lower threshold voltage is simply connected as a depletion diode, to thereby shunt the body diodes of the active transistors, without affecting turn-on and ON-state behavior.

Abstract: An insulated gate turn-off (IGTO) device, formed as a die, has a layered structure including a p+ layer (e.g., a substrate), an n? epi layer, a p-well, vertical insulated gate electrodes formed in the p-well, and n+ regions between the gate electrodes, so that vertical npn and pnp transistors are formed. The device is formed of a matrix of cells. To turn the device on, a positive voltage is applied to the gate electrodes, referenced to the cathode. To speed up the removal of residual electrons in the p-well after the gate electrode voltage is removed, a p+ region is added adjacent the n+ regions, and an n-layer is added below the p+ region. The cathode electrode directly contacts the p+ region and the n+ regions. During turn-off, the p+ region provides holes which recombine with the residual electrons to rapidly terminate the current flow.

Abstract: A new semiconductor rectifier structure. In general, a MOS-transistor-like structure is located above a JFET-like deeper structure. The present application teaches ways to combine and optimize these two structures in a merged device so that the resulting combined structure achieves both a low forward voltage and a high reverse breakdown voltage in a relatively small area. In one class of innovative implementations, an insulated (or partially insulated) trench is used to define a vertical channel in a body region along the sidewall of a trench, so that majority carriers from a “source” region (typically n+) can flow through the channel. An added “pocket” diffusion, of the same conductivity type as the body region (p-type in this example), provides an intermediate region around the bottom of the trench. This intermediate diffusion, and an additional deep region of the same conductivity type, define a deep JFET-like device which is in series with the MOS channel portion of the diode.

Abstract: Methods and systems for operating a double-base bidirectional power bipolar transistor. Two timing phases are used to transition into turn-off: one where each base is shorted to its nearest emitter/collector region, and a second one where negative drive is applied to the emitter-side base to reduce the minority carrier population in the bulk substrate. A diode prevents reverse turn-on while negative base drive is being applied.